Mercurial > hg > graal-jvmci-8
annotate src/cpu/x86/vm/c1_Runtime1_x86.cpp @ 2054:3c0a889a176b
Added GC stats. Enabling intrinsics.
author | Thomas Wuerthinger <wuerthinger@ssw.jku.at> |
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date | Wed, 12 Jan 2011 19:14:32 +0100 |
parents | 06f017f7daa7 |
children | 91fe28b03d6a |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "c1/c1_Defs.hpp" | |
27 #include "c1/c1_MacroAssembler.hpp" | |
28 #include "c1/c1_Runtime1.hpp" | |
29 #include "interpreter/interpreter.hpp" | |
30 #include "nativeInst_x86.hpp" | |
31 #include "oops/compiledICHolderOop.hpp" | |
32 #include "oops/oop.inline.hpp" | |
33 #include "prims/jvmtiExport.hpp" | |
34 #include "register_x86.hpp" | |
35 #include "runtime/sharedRuntime.hpp" | |
36 #include "runtime/signature.hpp" | |
37 #include "runtime/vframeArray.hpp" | |
38 #include "vmreg_x86.inline.hpp" | |
0 | 39 |
40 | |
41 // Implementation of StubAssembler | |
42 | |
43 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { | |
44 // setup registers | |
304 | 45 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) |
0 | 46 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); |
47 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); | |
48 assert(args_size >= 0, "illegal args_size"); | |
49 | |
304 | 50 #ifdef _LP64 |
51 mov(c_rarg0, thread); | |
52 set_num_rt_args(0); // Nothing on stack | |
53 #else | |
0 | 54 set_num_rt_args(1 + args_size); |
55 | |
56 // push java thread (becomes first argument of C function) | |
57 get_thread(thread); | |
304 | 58 push(thread); |
59 #endif // _LP64 | |
0 | 60 |
61 set_last_Java_frame(thread, noreg, rbp, NULL); | |
304 | 62 |
0 | 63 // do the call |
64 call(RuntimeAddress(entry)); | |
65 int call_offset = offset(); | |
66 // verify callee-saved register | |
67 #ifdef ASSERT | |
68 guarantee(thread != rax, "change this code"); | |
304 | 69 push(rax); |
0 | 70 { Label L; |
71 get_thread(rax); | |
304 | 72 cmpptr(thread, rax); |
0 | 73 jcc(Assembler::equal, L); |
74 int3(); | |
75 stop("StubAssembler::call_RT: rdi not callee saved?"); | |
76 bind(L); | |
77 } | |
304 | 78 pop(rax); |
0 | 79 #endif |
80 reset_last_Java_frame(thread, true, false); | |
81 | |
82 // discard thread and arguments | |
304 | 83 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); |
0 | 84 |
85 // check for pending exceptions | |
86 { Label L; | |
304 | 87 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 88 jcc(Assembler::equal, L); |
89 // exception pending => remove activation and forward to exception handler | |
304 | 90 movptr(rax, Address(thread, Thread::pending_exception_offset())); |
0 | 91 // make sure that the vm_results are cleared |
92 if (oop_result1->is_valid()) { | |
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93 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 94 } |
95 if (oop_result2->is_valid()) { | |
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96 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 97 } |
98 if (frame_size() == no_frame_size) { | |
99 leave(); | |
100 jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
101 } else if (_stub_id == Runtime1::forward_exception_id) { | |
102 should_not_reach_here(); | |
103 } else { | |
104 jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); | |
105 } | |
106 bind(L); | |
107 } | |
108 // get oop results if there are any and reset the values in the thread | |
109 if (oop_result1->is_valid()) { | |
304 | 110 movptr(oop_result1, Address(thread, JavaThread::vm_result_offset())); |
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111 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 112 verify_oop(oop_result1); |
113 } | |
114 if (oop_result2->is_valid()) { | |
304 | 115 movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); |
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116 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 117 verify_oop(oop_result2); |
118 } | |
119 return call_offset; | |
120 } | |
121 | |
122 | |
123 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { | |
304 | 124 #ifdef _LP64 |
125 mov(c_rarg1, arg1); | |
126 #else | |
127 push(arg1); | |
128 #endif // _LP64 | |
0 | 129 return call_RT(oop_result1, oop_result2, entry, 1); |
130 } | |
131 | |
132 | |
133 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { | |
304 | 134 #ifdef _LP64 |
135 if (c_rarg1 == arg2) { | |
136 if (c_rarg2 == arg1) { | |
137 xchgq(arg1, arg2); | |
138 } else { | |
139 mov(c_rarg2, arg2); | |
140 mov(c_rarg1, arg1); | |
141 } | |
142 } else { | |
143 mov(c_rarg1, arg1); | |
144 mov(c_rarg2, arg2); | |
145 } | |
146 #else | |
147 push(arg2); | |
148 push(arg1); | |
149 #endif // _LP64 | |
0 | 150 return call_RT(oop_result1, oop_result2, entry, 2); |
151 } | |
152 | |
153 | |
154 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { | |
304 | 155 #ifdef _LP64 |
156 // if there is any conflict use the stack | |
157 if (arg1 == c_rarg2 || arg1 == c_rarg3 || | |
158 arg2 == c_rarg1 || arg1 == c_rarg3 || | |
159 arg3 == c_rarg1 || arg1 == c_rarg2) { | |
160 push(arg3); | |
161 push(arg2); | |
162 push(arg1); | |
163 pop(c_rarg1); | |
164 pop(c_rarg2); | |
165 pop(c_rarg3); | |
166 } else { | |
167 mov(c_rarg1, arg1); | |
168 mov(c_rarg2, arg2); | |
169 mov(c_rarg3, arg3); | |
170 } | |
171 #else | |
172 push(arg3); | |
173 push(arg2); | |
174 push(arg1); | |
175 #endif // _LP64 | |
0 | 176 return call_RT(oop_result1, oop_result2, entry, 3); |
177 } | |
178 | |
179 | |
180 // Implementation of StubFrame | |
181 | |
182 class StubFrame: public StackObj { | |
183 private: | |
184 StubAssembler* _sasm; | |
185 | |
186 public: | |
187 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); | |
188 void load_argument(int offset_in_words, Register reg); | |
189 | |
190 ~StubFrame(); | |
191 }; | |
192 | |
193 | |
194 #define __ _sasm-> | |
195 | |
196 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { | |
197 _sasm = sasm; | |
198 __ set_info(name, must_gc_arguments); | |
199 __ enter(); | |
200 } | |
201 | |
202 // load parameters that were stored with LIR_Assembler::store_parameter | |
203 // Note: offsets for store_parameter and load_argument must match | |
204 void StubFrame::load_argument(int offset_in_words, Register reg) { | |
205 // rbp, + 0: link | |
206 // + 1: return address | |
207 // + 2: argument with offset 0 | |
208 // + 3: argument with offset 1 | |
209 // + 4: ... | |
210 | |
304 | 211 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); |
0 | 212 } |
213 | |
214 | |
215 StubFrame::~StubFrame() { | |
216 __ leave(); | |
217 __ ret(0); | |
218 } | |
219 | |
220 #undef __ | |
221 | |
222 | |
223 // Implementation of Runtime1 | |
224 | |
225 #define __ sasm-> | |
226 | |
304 | 227 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; |
228 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; | |
0 | 229 |
230 // Stack layout for saving/restoring all the registers needed during a runtime | |
231 // call (this includes deoptimization) | |
232 // Note: note that users of this frame may well have arguments to some runtime | |
233 // while these values are on the stack. These positions neglect those arguments | |
234 // but the code in save_live_registers will take the argument count into | |
235 // account. | |
236 // | |
304 | 237 #ifdef _LP64 |
238 #define SLOT2(x) x, | |
239 #define SLOT_PER_WORD 2 | |
240 #else | |
241 #define SLOT2(x) | |
242 #define SLOT_PER_WORD 1 | |
243 #endif // _LP64 | |
244 | |
0 | 245 enum reg_save_layout { |
304 | 246 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that |
247 // happen and will assert if the stack size we create is misaligned | |
248 #ifdef _LP64 | |
249 align_dummy_0, align_dummy_1, | |
250 #endif // _LP64 | |
251 dummy1, SLOT2(dummy1H) // 0, 4 | |
252 dummy2, SLOT2(dummy2H) // 8, 12 | |
0 | 253 // Two temps to be used as needed by users of save/restore callee registers |
304 | 254 temp_2_off, SLOT2(temp_2H_off) // 16, 20 |
255 temp_1_off, SLOT2(temp_1H_off) // 24, 28 | |
256 xmm_regs_as_doubles_off, // 32 | |
257 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 | |
258 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 | |
259 // fpu_state_end_off is exclusive | |
260 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 | |
261 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 | |
262 extra_space_offset, // 360 | |
263 #ifdef _LP64 | |
264 r15_off = extra_space_offset, r15H_off, // 360, 364 | |
265 r14_off, r14H_off, // 368, 372 | |
266 r13_off, r13H_off, // 376, 380 | |
267 r12_off, r12H_off, // 384, 388 | |
268 r11_off, r11H_off, // 392, 396 | |
269 r10_off, r10H_off, // 400, 404 | |
270 r9_off, r9H_off, // 408, 412 | |
271 r8_off, r8H_off, // 416, 420 | |
272 rdi_off, rdiH_off, // 424, 428 | |
273 #else | |
0 | 274 rdi_off = extra_space_offset, |
304 | 275 #endif // _LP64 |
276 rsi_off, SLOT2(rsiH_off) // 432, 436 | |
277 rbp_off, SLOT2(rbpH_off) // 440, 444 | |
278 rsp_off, SLOT2(rspH_off) // 448, 452 | |
279 rbx_off, SLOT2(rbxH_off) // 456, 460 | |
280 rdx_off, SLOT2(rdxH_off) // 464, 468 | |
281 rcx_off, SLOT2(rcxH_off) // 472, 476 | |
282 rax_off, SLOT2(raxH_off) // 480, 484 | |
283 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 | |
284 return_off, SLOT2(returnH_off) // 496, 500 | |
285 reg_save_frame_size, // As noted: neglects any parameters to runtime // 504 | |
286 | |
287 #ifdef _WIN64 | |
288 c_rarg0_off = rcx_off, | |
289 #else | |
290 c_rarg0_off = rdi_off, | |
291 #endif // WIN64 | |
0 | 292 |
293 // equates | |
294 | |
295 // illegal instruction handler | |
296 continue_dest_off = temp_1_off, | |
297 | |
298 // deoptimization equates | |
299 fp0_off = float_regs_as_doubles_off, // slot for java float/double return value | |
300 xmm0_off = xmm_regs_as_doubles_off, // slot for java float/double return value | |
301 deopt_type = temp_2_off, // slot for type of deopt in progress | |
302 ret_type = temp_1_off // slot for return type | |
303 }; | |
304 | |
305 | |
306 | |
307 // Save off registers which might be killed by calls into the runtime. | |
308 // Tries to smart of about FP registers. In particular we separate | |
309 // saving and describing the FPU registers for deoptimization since we | |
310 // have to save the FPU registers twice if we describe them and on P4 | |
311 // saving FPU registers which don't contain anything appears | |
312 // expensive. The deopt blob is the only thing which needs to | |
313 // describe FPU registers. In all other cases it should be sufficient | |
314 // to simply save their current value. | |
315 | |
316 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, | |
317 bool save_fpu_registers = true) { | |
304 | 318 |
319 // In 64bit all the args are in regs so there are no additional stack slots | |
320 LP64_ONLY(num_rt_args = 0); | |
321 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) | |
322 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread | |
323 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); | |
0 | 324 |
325 // record saved value locations in an OopMap | |
326 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread | |
304 | 327 OopMap* map = new OopMap(frame_size_in_slots, 0); |
0 | 328 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); |
329 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); | |
330 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); | |
331 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); | |
332 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); | |
333 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); | |
304 | 334 #ifdef _LP64 |
335 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); | |
336 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); | |
337 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); | |
338 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); | |
339 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); | |
340 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); | |
341 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); | |
342 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); | |
343 | |
344 // This is stupid but needed. | |
345 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); | |
346 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); | |
347 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); | |
348 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); | |
349 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); | |
350 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); | |
351 | |
352 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); | |
353 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); | |
354 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); | |
355 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); | |
356 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); | |
357 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); | |
358 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); | |
359 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); | |
360 #endif // _LP64 | |
0 | 361 |
362 if (save_fpu_registers) { | |
363 if (UseSSE < 2) { | |
364 int fpu_off = float_regs_as_doubles_off; | |
365 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { | |
366 VMReg fpu_name_0 = FrameMap::fpu_regname(n); | |
367 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); | |
368 // %%% This is really a waste but we'll keep things as they were for now | |
369 if (true) { | |
370 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); | |
371 } | |
372 fpu_off += 2; | |
373 } | |
374 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); | |
375 } | |
376 | |
377 if (UseSSE >= 2) { | |
378 int xmm_off = xmm_regs_as_doubles_off; | |
379 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
380 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
381 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
382 // %%% This is really a waste but we'll keep things as they were for now | |
383 if (true) { | |
384 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); | |
385 } | |
386 xmm_off += 2; | |
387 } | |
388 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
389 | |
390 } else if (UseSSE == 1) { | |
391 int xmm_off = xmm_regs_as_doubles_off; | |
392 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
393 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
394 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
395 xmm_off += 2; | |
396 } | |
397 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
398 } | |
399 } | |
400 | |
401 return map; | |
402 } | |
403 | |
404 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, | |
405 bool save_fpu_registers = true) { | |
406 __ block_comment("save_live_registers"); | |
407 | |
304 | 408 // 64bit passes the args in regs to the c++ runtime |
409 int frame_size_in_slots = reg_save_frame_size NOT_LP64(+ num_rt_args); // args + thread | |
0 | 410 // frame_size = round_to(frame_size, 4); |
304 | 411 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); |
0 | 412 |
304 | 413 __ pusha(); // integer registers |
0 | 414 |
415 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
416 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
417 | |
304 | 418 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 419 |
420 #ifdef ASSERT | |
304 | 421 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 422 #endif |
423 | |
424 if (save_fpu_registers) { | |
425 if (UseSSE < 2) { | |
426 // save FPU stack | |
304 | 427 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 428 __ fwait(); |
429 | |
430 #ifdef ASSERT | |
431 Label ok; | |
304 | 432 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
0 | 433 __ jccb(Assembler::equal, ok); |
434 __ stop("corrupted control word detected"); | |
435 __ bind(ok); | |
436 #endif | |
437 | |
438 // Reset the control word to guard against exceptions being unmasked | |
439 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
440 // into the on stack copy and then reload that to make sure that the | |
441 // current and future values are correct. | |
304 | 442 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
443 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); | |
0 | 444 |
445 // Save the FPU registers in de-opt-able form | |
304 | 446 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
447 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
448 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
449 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
450 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
451 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
452 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
453 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 454 } |
455 | |
456 if (UseSSE >= 2) { | |
457 // save XMM registers | |
458 // XMM registers can contain float or double values, but this is not known here, | |
459 // so always save them as doubles. | |
460 // note that float values are _not_ converted automatically, so for float values | |
461 // the second word contains only garbage data. | |
304 | 462 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
463 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
464 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
465 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
466 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
467 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
468 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
469 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
470 #ifdef _LP64 | |
471 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8); | |
472 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9); | |
473 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10); | |
474 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11); | |
475 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12); | |
476 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13); | |
477 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14); | |
478 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15); | |
479 #endif // _LP64 | |
0 | 480 } else if (UseSSE == 1) { |
481 // save XMM registers as float because double not supported without SSE2 | |
304 | 482 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
483 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
484 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
485 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
486 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
487 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
488 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
489 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
0 | 490 } |
491 } | |
492 | |
493 // FPU stack must be empty now | |
494 __ verify_FPU(0, "save_live_registers"); | |
495 | |
496 return generate_oop_map(sasm, num_rt_args, save_fpu_registers); | |
497 } | |
498 | |
499 | |
500 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
501 if (restore_fpu_registers) { | |
502 if (UseSSE >= 2) { | |
503 // restore XMM registers | |
304 | 504 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
505 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
506 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
507 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
508 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
509 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
510 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
511 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
512 #ifdef _LP64 | |
513 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64)); | |
514 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72)); | |
515 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80)); | |
516 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88)); | |
517 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96)); | |
518 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104)); | |
519 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112)); | |
520 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120)); | |
521 #endif // _LP64 | |
0 | 522 } else if (UseSSE == 1) { |
523 // restore XMM registers | |
304 | 524 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
525 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
526 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
527 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
528 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
529 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
530 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
531 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 532 } |
533 | |
534 if (UseSSE < 2) { | |
304 | 535 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 536 } else { |
537 // check that FPU stack is really empty | |
538 __ verify_FPU(0, "restore_live_registers"); | |
539 } | |
540 | |
541 } else { | |
542 // check that FPU stack is really empty | |
543 __ verify_FPU(0, "restore_live_registers"); | |
544 } | |
545 | |
546 #ifdef ASSERT | |
547 { | |
548 Label ok; | |
304 | 549 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 550 __ jcc(Assembler::equal, ok); |
551 __ stop("bad offsets in frame"); | |
552 __ bind(ok); | |
553 } | |
304 | 554 #endif // ASSERT |
0 | 555 |
304 | 556 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 557 } |
558 | |
559 | |
560 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
561 __ block_comment("restore_live_registers"); | |
562 | |
563 restore_fpu(sasm, restore_fpu_registers); | |
304 | 564 __ popa(); |
0 | 565 } |
566 | |
567 | |
568 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
569 __ block_comment("restore_live_registers_except_rax"); | |
570 | |
571 restore_fpu(sasm, restore_fpu_registers); | |
572 | |
304 | 573 #ifdef _LP64 |
574 __ movptr(r15, Address(rsp, 0)); | |
575 __ movptr(r14, Address(rsp, wordSize)); | |
576 __ movptr(r13, Address(rsp, 2 * wordSize)); | |
577 __ movptr(r12, Address(rsp, 3 * wordSize)); | |
578 __ movptr(r11, Address(rsp, 4 * wordSize)); | |
579 __ movptr(r10, Address(rsp, 5 * wordSize)); | |
580 __ movptr(r9, Address(rsp, 6 * wordSize)); | |
581 __ movptr(r8, Address(rsp, 7 * wordSize)); | |
582 __ movptr(rdi, Address(rsp, 8 * wordSize)); | |
583 __ movptr(rsi, Address(rsp, 9 * wordSize)); | |
584 __ movptr(rbp, Address(rsp, 10 * wordSize)); | |
585 // skip rsp | |
586 __ movptr(rbx, Address(rsp, 12 * wordSize)); | |
587 __ movptr(rdx, Address(rsp, 13 * wordSize)); | |
588 __ movptr(rcx, Address(rsp, 14 * wordSize)); | |
589 | |
590 __ addptr(rsp, 16 * wordSize); | |
591 #else | |
592 | |
593 __ pop(rdi); | |
594 __ pop(rsi); | |
595 __ pop(rbp); | |
596 __ pop(rbx); // skip this value | |
597 __ pop(rbx); | |
598 __ pop(rdx); | |
599 __ pop(rcx); | |
600 __ addptr(rsp, BytesPerWord); | |
601 #endif // _LP64 | |
0 | 602 } |
603 | |
604 | |
605 void Runtime1::initialize_pd() { | |
606 // nothing to do | |
607 } | |
608 | |
609 | |
610 // target: the entry point of the method that creates and posts the exception oop | |
611 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) | |
612 | |
613 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { | |
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614 OopMapSet* oop_maps = new OopMapSet(); |
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615 if (UseC1X) { |
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616 // c1x passes the argument in r10 |
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617 OopMap* oop_map = save_live_registers(sasm, 1); |
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618 |
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619 // now all registers are saved and can be used freely |
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620 // verify that no old value is used accidentally |
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621 __ invalidate_registers(true, true, true, true, true, true); |
0 | 622 |
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623 // registers used by this stub |
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624 const Register temp_reg = rbx; |
0 | 625 |
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626 // load argument for exception that is passed as an argument into the stub |
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627 if (has_argument) { |
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628 __ movptr(c_rarg1, r10); |
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629 } |
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630 int call_offset = __ call_RT(noreg, noreg, target, has_argument ? 1 : 0); |
0 | 631 |
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632 oop_maps->add_gc_map(call_offset, oop_map); |
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633 } else { |
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634 // preserve all registers |
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635 int num_rt_args = has_argument ? 2 : 1; |
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636 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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637 |
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638 // now all registers are saved and can be used freely |
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639 // verify that no old value is used accidentally |
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640 __ invalidate_registers(true, true, true, true, true, true); |
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641 |
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642 // registers used by this stub |
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643 const Register temp_reg = rbx; |
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644 |
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645 // load argument for exception that is passed as an argument into the stub |
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646 if (has_argument) { |
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647 #ifdef _LP64 |
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648 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); |
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649 #else |
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650 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); |
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651 __ push(temp_reg); |
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652 #endif // _LP64 |
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653 } |
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654 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); |
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655 |
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656 oop_maps->add_gc_map(call_offset, oop_map); |
0 | 657 } |
658 | |
659 __ stop("should not reach here"); | |
660 | |
661 return oop_maps; | |
662 } | |
663 | |
664 | |
665 void Runtime1::generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map, bool save_fpu_registers) { | |
666 // incoming parameters | |
667 const Register exception_oop = rax; | |
668 const Register exception_pc = rdx; | |
669 // other registers used in this stub | |
670 const Register real_return_addr = rbx; | |
304 | 671 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 672 |
673 __ block_comment("generate_handle_exception"); | |
674 | |
675 #ifdef TIERED | |
676 // C2 can leave the fpu stack dirty | |
677 if (UseSSE < 2 ) { | |
678 __ empty_FPU_stack(); | |
679 } | |
680 #endif // TIERED | |
681 | |
682 // verify that only rax, and rdx is valid at this time | |
683 __ invalidate_registers(false, true, true, false, true, true); | |
684 // verify that rax, contains a valid exception | |
685 __ verify_not_null_oop(exception_oop); | |
686 | |
687 // load address of JavaThread object for thread-local data | |
304 | 688 NOT_LP64(__ get_thread(thread);) |
0 | 689 |
690 #ifdef ASSERT | |
691 // check that fields in JavaThread for exception oop and issuing pc are | |
692 // empty before writing to them | |
693 Label oop_empty; | |
304 | 694 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
0 | 695 __ jcc(Assembler::equal, oop_empty); |
696 __ stop("exception oop already set"); | |
697 __ bind(oop_empty); | |
698 | |
699 Label pc_empty; | |
304 | 700 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 701 __ jcc(Assembler::equal, pc_empty); |
702 __ stop("exception pc already set"); | |
703 __ bind(pc_empty); | |
704 #endif | |
705 | |
706 // save exception oop and issuing pc into JavaThread | |
707 // (exception handler will load it from here) | |
304 | 708 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
709 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); | |
0 | 710 |
711 // save real return address (pc that called this stub) | |
304 | 712 __ movptr(real_return_addr, Address(rbp, 1*BytesPerWord)); |
713 __ movptr(Address(rsp, temp_1_off * VMRegImpl::stack_slot_size), real_return_addr); | |
0 | 714 |
715 // patch throwing pc into return address (has bci & oop map) | |
304 | 716 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc); |
0 | 717 |
718 // compute the exception handler. | |
719 // the exception oop and the throwing pc are read from the fields in JavaThread | |
720 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); | |
721 oop_maps->add_gc_map(call_offset, oop_map); | |
722 | |
1295 | 723 // rax,: handler address |
0 | 724 // will be the deopt blob if nmethod was deoptimized while we looked up |
725 // handler regardless of whether handler existed in the nmethod. | |
726 | |
727 // only rax, is valid at this time, all other registers have been destroyed by the runtime call | |
728 __ invalidate_registers(false, true, true, true, true, true); | |
729 | |
1295 | 730 #ifdef ASSERT |
0 | 731 // Do we have an exception handler in the nmethod? |
732 Label done; | |
304 | 733 __ testptr(rax, rax); |
1295 | 734 __ jcc(Assembler::notZero, done); |
735 __ stop("no handler found"); | |
736 __ bind(done); | |
737 #endif | |
0 | 738 |
739 // exception handler found | |
740 // patch the return address -> the stub will directly return to the exception handler | |
304 | 741 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
0 | 742 |
743 // restore registers | |
744 restore_live_registers(sasm, save_fpu_registers); | |
745 | |
746 // return to exception handler | |
747 __ leave(); | |
748 __ ret(0); | |
749 | |
750 } | |
751 | |
1429
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752 void Runtime1::c1x_generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map) { |
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753 NOT_LP64(fatal("64 bit only")); |
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754 // incoming parameters |
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755 const Register exception_oop = j_rarg0; |
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756 // other registers used in this stub |
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757 const Register exception_pc = j_rarg1; |
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758 const Register thread = r15_thread; |
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759 |
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760 __ block_comment("c1x_generate_handle_exception"); |
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761 |
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762 // verify that rax, contains a valid exception |
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763 __ verify_not_null_oop(exception_oop); |
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764 |
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765 #ifdef ASSERT |
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766 // check that fields in JavaThread for exception oop and issuing pc are |
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767 // empty before writing to them |
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768 Label oop_empty; |
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769 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
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770 __ jcc(Assembler::equal, oop_empty); |
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771 __ stop("exception oop already set"); |
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772 __ bind(oop_empty); |
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773 |
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774 Label pc_empty; |
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775 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
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776 __ jcc(Assembler::equal, pc_empty); |
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777 __ stop("exception pc already set"); |
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778 __ bind(pc_empty); |
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779 #endif |
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780 |
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781 // save exception oop and issuing pc into JavaThread |
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782 // (exception handler will load it from here) |
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783 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
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784 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
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785 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
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786 |
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787 // compute the exception handler. |
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788 // the exception oop and the throwing pc are read from the fields in JavaThread |
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789 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); |
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790 oop_maps->add_gc_map(call_offset, oop_map); |
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791 |
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792 // rax,: handler address |
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793 // will be the deopt blob if nmethod was deoptimized while we looked up |
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794 // handler regardless of whether handler existed in the nmethod. |
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795 |
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796 // only rax, is valid at this time, all other registers have been destroyed by the runtime call |
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797 __ invalidate_registers(false, true, true, true, true, true); |
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798 |
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799 #ifdef ASSERT |
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800 // Do we have an exception handler in the nmethod? |
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801 Label done; |
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802 __ testptr(rax, rax); |
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803 __ jcc(Assembler::notZero, done); |
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804 __ stop("no handler found"); |
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805 __ bind(done); |
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806 #endif |
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807 |
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808 // exception handler found |
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809 // patch the return address -> the stub will directly return to the exception handler |
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810 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
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811 |
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812 // restore registers |
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813 restore_live_registers(sasm, false); |
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814 |
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815 // return to exception handler |
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816 __ leave(); |
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817 __ ret(0); |
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818 } |
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819 |
0 | 820 |
821 void Runtime1::generate_unwind_exception(StubAssembler *sasm) { | |
822 // incoming parameters | |
823 const Register exception_oop = rax; | |
1295 | 824 // callee-saved copy of exception_oop during runtime call |
825 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); | |
0 | 826 // other registers used in this stub |
827 const Register exception_pc = rdx; | |
828 const Register handler_addr = rbx; | |
304 | 829 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 830 |
831 // verify that only rax, is valid at this time | |
832 __ invalidate_registers(false, true, true, true, true, true); | |
833 | |
834 #ifdef ASSERT | |
835 // check that fields in JavaThread for exception oop and issuing pc are empty | |
304 | 836 NOT_LP64(__ get_thread(thread);) |
0 | 837 Label oop_empty; |
304 | 838 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); |
0 | 839 __ jcc(Assembler::equal, oop_empty); |
840 __ stop("exception oop must be empty"); | |
841 __ bind(oop_empty); | |
842 | |
843 Label pc_empty; | |
304 | 844 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 845 __ jcc(Assembler::equal, pc_empty); |
846 __ stop("exception pc must be empty"); | |
847 __ bind(pc_empty); | |
848 #endif | |
849 | |
850 // clear the FPU stack in case any FPU results are left behind | |
851 __ empty_FPU_stack(); | |
852 | |
1295 | 853 // save exception_oop in callee-saved register to preserve it during runtime calls |
854 __ verify_not_null_oop(exception_oop); | |
855 __ movptr(exception_oop_callee_saved, exception_oop); | |
856 | |
857 NOT_LP64(__ get_thread(thread);) | |
858 // Get return address (is on top of stack after leave). | |
304 | 859 __ movptr(exception_pc, Address(rsp, 0)); |
0 | 860 |
1295 | 861 // search the exception handler address of the caller (using the return address) |
862 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); | |
863 // rax: exception handler address of the caller | |
0 | 864 |
1295 | 865 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. |
866 __ invalidate_registers(false, true, true, true, false, true); | |
0 | 867 |
868 // move result of call into correct register | |
304 | 869 __ movptr(handler_addr, rax); |
0 | 870 |
1295 | 871 // Restore exception oop to RAX (required convention of exception handler). |
872 __ movptr(exception_oop, exception_oop_callee_saved); | |
0 | 873 |
1295 | 874 // verify that there is really a valid exception in rax |
875 __ verify_not_null_oop(exception_oop); | |
0 | 876 |
877 // get throwing pc (= return address). | |
878 // rdx has been destroyed by the call, so it must be set again | |
879 // the pop is also necessary to simulate the effect of a ret(0) | |
304 | 880 __ pop(exception_pc); |
0 | 881 |
1295 | 882 // Restore SP from BP if the exception PC is a MethodHandle call site. |
883 NOT_LP64(__ get_thread(thread);) | |
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884 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
1564 | 885 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
0 | 886 |
887 // continue at exception handler (return address removed) | |
888 // note: do *not* remove arguments when unwinding the | |
889 // activation since the caller assumes having | |
890 // all arguments on the stack when entering the | |
891 // runtime to determine the exception handler | |
892 // (GC happens at call site with arguments!) | |
1295 | 893 // rax: exception oop |
0 | 894 // rdx: throwing pc |
1295 | 895 // rbx: exception handler |
0 | 896 __ jmp(handler_addr); |
897 } | |
898 | |
899 | |
900 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { | |
901 // use the maximum number of runtime-arguments here because it is difficult to | |
902 // distinguish each RT-Call. | |
903 // Note: This number affects also the RT-Call in generate_handle_exception because | |
904 // the oop-map is shared for all calls. | |
905 const int num_rt_args = 2; // thread + dummy | |
906 | |
907 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); | |
908 assert(deopt_blob != NULL, "deoptimization blob must have been created"); | |
909 | |
910 OopMap* oop_map = save_live_registers(sasm, num_rt_args); | |
911 | |
304 | 912 #ifdef _LP64 |
913 const Register thread = r15_thread; | |
914 // No need to worry about dummy | |
915 __ mov(c_rarg0, thread); | |
916 #else | |
917 __ push(rax); // push dummy | |
0 | 918 |
919 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) | |
920 // push java thread (becomes first argument of C function) | |
921 __ get_thread(thread); | |
304 | 922 __ push(thread); |
923 #endif // _LP64 | |
0 | 924 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
925 // do the call | |
926 __ call(RuntimeAddress(target)); | |
927 OopMapSet* oop_maps = new OopMapSet(); | |
928 oop_maps->add_gc_map(__ offset(), oop_map); | |
929 // verify callee-saved register | |
930 #ifdef ASSERT | |
931 guarantee(thread != rax, "change this code"); | |
304 | 932 __ push(rax); |
0 | 933 { Label L; |
934 __ get_thread(rax); | |
304 | 935 __ cmpptr(thread, rax); |
0 | 936 __ jcc(Assembler::equal, L); |
304 | 937 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); |
0 | 938 __ bind(L); |
939 } | |
304 | 940 __ pop(rax); |
0 | 941 #endif |
942 __ reset_last_Java_frame(thread, true, false); | |
304 | 943 #ifndef _LP64 |
944 __ pop(rcx); // discard thread arg | |
945 __ pop(rcx); // discard dummy | |
946 #endif // _LP64 | |
0 | 947 |
948 // check for pending exceptions | |
949 { Label L; | |
304 | 950 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 951 __ jcc(Assembler::equal, L); |
952 // exception pending => remove activation and forward to exception handler | |
953 | |
304 | 954 __ testptr(rax, rax); // have we deoptimized? |
0 | 955 __ jump_cc(Assembler::equal, |
956 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); | |
957 | |
958 // the deopt blob expects exceptions in the special fields of | |
959 // JavaThread, so copy and clear pending exception. | |
960 | |
961 // load and clear pending exception | |
304 | 962 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
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963 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
0 | 964 |
965 // check that there is really a valid exception | |
966 __ verify_not_null_oop(rax); | |
967 | |
968 // load throwing pc: this is the return address of the stub | |
304 | 969 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); |
0 | 970 |
971 #ifdef ASSERT | |
972 // check that fields in JavaThread for exception oop and issuing pc are empty | |
973 Label oop_empty; | |
304 | 974 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); |
0 | 975 __ jcc(Assembler::equal, oop_empty); |
976 __ stop("exception oop must be empty"); | |
977 __ bind(oop_empty); | |
978 | |
979 Label pc_empty; | |
304 | 980 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); |
0 | 981 __ jcc(Assembler::equal, pc_empty); |
982 __ stop("exception pc must be empty"); | |
983 __ bind(pc_empty); | |
984 #endif | |
985 | |
986 // store exception oop and throwing pc to JavaThread | |
304 | 987 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); |
988 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 989 |
990 restore_live_registers(sasm); | |
991 | |
992 __ leave(); | |
304 | 993 __ addptr(rsp, BytesPerWord); // remove return address from stack |
0 | 994 |
995 // Forward the exception directly to deopt blob. We can blow no | |
996 // registers and must leave throwing pc on the stack. A patch may | |
997 // have values live in registers so the entry point with the | |
998 // exception in tls. | |
999 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); | |
1000 | |
1001 __ bind(L); | |
1002 } | |
1003 | |
1004 | |
1005 // Runtime will return true if the nmethod has been deoptimized during | |
1006 // the patching process. In that case we must do a deopt reexecute instead. | |
1007 | |
1008 Label reexecuteEntry, cont; | |
1009 | |
304 | 1010 __ testptr(rax, rax); // have we deoptimized? |
0 | 1011 __ jcc(Assembler::equal, cont); // no |
1012 | |
1013 // Will reexecute. Proper return address is already on the stack we just restore | |
1014 // registers, pop all of our frame but the return address and jump to the deopt blob | |
1015 restore_live_registers(sasm); | |
1016 __ leave(); | |
1017 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); | |
1018 | |
1019 __ bind(cont); | |
1020 restore_live_registers(sasm); | |
1021 __ leave(); | |
1022 __ ret(0); | |
1023 | |
1024 return oop_maps; | |
1025 | |
1026 } | |
1027 | |
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1028 JRT_ENTRY(void, c1x_create_null_exception(JavaThread* thread)) |
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1029 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_NullPointerException(), NULL)()); |
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1030 JRT_END |
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1031 |
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1032 |
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1033 |
0 | 1034 |
1035 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { | |
1036 | |
1037 // for better readability | |
1038 const bool must_gc_arguments = true; | |
1039 const bool dont_gc_arguments = false; | |
1040 | |
1041 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu | |
1042 bool save_fpu_registers = true; | |
1043 | |
1044 // stub code & info for the different stubs | |
1045 OopMapSet* oop_maps = NULL; | |
1046 switch (id) { | |
1047 case forward_exception_id: | |
1048 { | |
1049 // we're handling an exception in the context of a compiled | |
1050 // frame. The registers have been saved in the standard | |
1051 // places. Perform an exception lookup in the caller and | |
1052 // dispatch to the handler if found. Otherwise unwind and | |
1053 // dispatch to the callers exception handler. | |
1054 | |
304 | 1055 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 1056 const Register exception_oop = rax; |
1057 const Register exception_pc = rdx; | |
1058 | |
1059 // load pending exception oop into rax, | |
304 | 1060 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); |
0 | 1061 // clear pending exception |
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1062 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
0 | 1063 |
1064 // load issuing PC (the return address for this stub) into rdx | |
304 | 1065 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
0 | 1066 |
1067 // make sure that the vm_results are cleared (may be unnecessary) | |
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1068 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
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1069 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 1070 |
1071 // verify that that there is really a valid exception in rax, | |
1072 __ verify_not_null_oop(exception_oop); | |
1073 | |
1074 | |
1075 oop_maps = new OopMapSet(); | |
1076 OopMap* oop_map = generate_oop_map(sasm, 1); | |
1077 generate_handle_exception(sasm, oop_maps, oop_map); | |
1078 __ stop("should not reach here"); | |
1079 } | |
1080 break; | |
1081 | |
1082 case new_instance_id: | |
1083 case fast_new_instance_id: | |
1084 case fast_new_instance_init_check_id: | |
1085 { | |
1086 Register klass = rdx; // Incoming | |
1087 Register obj = rax; // Result | |
1088 | |
1089 if (id == new_instance_id) { | |
1090 __ set_info("new_instance", dont_gc_arguments); | |
1091 } else if (id == fast_new_instance_id) { | |
1092 __ set_info("fast new_instance", dont_gc_arguments); | |
1093 } else { | |
1094 assert(id == fast_new_instance_init_check_id, "bad StubID"); | |
1095 __ set_info("fast new_instance init check", dont_gc_arguments); | |
1096 } | |
1097 | |
1098 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && | |
1099 UseTLAB && FastTLABRefill) { | |
1100 Label slow_path; | |
1101 Register obj_size = rcx; | |
1102 Register t1 = rbx; | |
1103 Register t2 = rsi; | |
1104 assert_different_registers(klass, obj, obj_size, t1, t2); | |
1105 | |
304 | 1106 __ push(rdi); |
1107 __ push(rbx); | |
0 | 1108 |
1109 if (id == fast_new_instance_init_check_id) { | |
1110 // make sure the klass is initialized | |
1111 __ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized); | |
1112 __ jcc(Assembler::notEqual, slow_path); | |
1113 } | |
1114 | |
1115 #ifdef ASSERT | |
1116 // assert object can be fast path allocated | |
1117 { | |
1118 Label ok, not_ok; | |
1119 __ movl(obj_size, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); | |
1120 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) | |
1121 __ jcc(Assembler::lessEqual, not_ok); | |
1122 __ testl(obj_size, Klass::_lh_instance_slow_path_bit); | |
1123 __ jcc(Assembler::zero, ok); | |
1124 __ bind(not_ok); | |
1125 __ stop("assert(can be fast path allocated)"); | |
1126 __ should_not_reach_here(); | |
1127 __ bind(ok); | |
1128 } | |
1129 #endif // ASSERT | |
1130 | |
1131 // if we got here then the TLAB allocation failed, so try | |
1132 // refilling the TLAB or allocating directly from eden. | |
1133 Label retry_tlab, try_eden; | |
1134 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass) | |
1135 | |
1136 __ bind(retry_tlab); | |
1137 | |
304 | 1138 // get the instance size (size is postive so movl is fine for 64bit) |
0 | 1139 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
1140 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); | |
1141 __ initialize_object(obj, klass, obj_size, 0, t1, t2); | |
1142 __ verify_oop(obj); | |
304 | 1143 __ pop(rbx); |
1144 __ pop(rdi); | |
0 | 1145 __ ret(0); |
1146 | |
1147 __ bind(try_eden); | |
304 | 1148 // get the instance size (size is postive so movl is fine for 64bit) |
0 | 1149 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
1150 __ eden_allocate(obj, obj_size, 0, t1, slow_path); | |
1151 __ initialize_object(obj, klass, obj_size, 0, t1, t2); | |
1152 __ verify_oop(obj); | |
304 | 1153 __ pop(rbx); |
1154 __ pop(rdi); | |
0 | 1155 __ ret(0); |
1156 | |
1157 __ bind(slow_path); | |
304 | 1158 __ pop(rbx); |
1159 __ pop(rdi); | |
0 | 1160 } |
1161 | |
1162 __ enter(); | |
1163 OopMap* map = save_live_registers(sasm, 2); | |
1164 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); | |
1165 oop_maps = new OopMapSet(); | |
1166 oop_maps->add_gc_map(call_offset, map); | |
1167 restore_live_registers_except_rax(sasm); | |
1168 __ verify_oop(obj); | |
1169 __ leave(); | |
1170 __ ret(0); | |
1171 | |
1172 // rax,: new instance | |
1173 } | |
1174 | |
1175 break; | |
1176 | |
1177 case counter_overflow_id: | |
1178 { | |
1783 | 1179 Register bci = rax, method = rbx; |
0 | 1180 __ enter(); |
1783 | 1181 OopMap* map = save_live_registers(sasm, 3); |
0 | 1182 // Retrieve bci |
1183 __ movl(bci, Address(rbp, 2*BytesPerWord)); | |
1783 | 1184 // And a pointer to the methodOop |
1185 __ movptr(method, Address(rbp, 3*BytesPerWord)); | |
1186 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); | |
0 | 1187 oop_maps = new OopMapSet(); |
1188 oop_maps->add_gc_map(call_offset, map); | |
1189 restore_live_registers(sasm); | |
1190 __ leave(); | |
1191 __ ret(0); | |
1192 } | |
1193 break; | |
1194 | |
1195 case new_type_array_id: | |
1196 case new_object_array_id: | |
1197 { | |
1198 Register length = rbx; // Incoming | |
1199 Register klass = rdx; // Incoming | |
1200 Register obj = rax; // Result | |
1201 | |
1202 if (id == new_type_array_id) { | |
1203 __ set_info("new_type_array", dont_gc_arguments); | |
1204 } else { | |
1205 __ set_info("new_object_array", dont_gc_arguments); | |
1206 } | |
1207 | |
1208 #ifdef ASSERT | |
1209 // assert object type is really an array of the proper kind | |
1210 { | |
1211 Label ok; | |
1212 Register t0 = obj; | |
1213 __ movl(t0, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); | |
1214 __ sarl(t0, Klass::_lh_array_tag_shift); | |
1215 int tag = ((id == new_type_array_id) | |
1216 ? Klass::_lh_array_tag_type_value | |
1217 : Klass::_lh_array_tag_obj_value); | |
1218 __ cmpl(t0, tag); | |
1219 __ jcc(Assembler::equal, ok); | |
1220 __ stop("assert(is an array klass)"); | |
1221 __ should_not_reach_here(); | |
1222 __ bind(ok); | |
1223 } | |
1224 #endif // ASSERT | |
1225 | |
1226 if (UseTLAB && FastTLABRefill) { | |
1227 Register arr_size = rsi; | |
1228 Register t1 = rcx; // must be rcx for use as shift count | |
1229 Register t2 = rdi; | |
1230 Label slow_path; | |
1231 assert_different_registers(length, klass, obj, arr_size, t1, t2); | |
1232 | |
1233 // check that array length is small enough for fast path. | |
1234 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length); | |
1235 __ jcc(Assembler::above, slow_path); | |
1236 | |
1237 // if we got here then the TLAB allocation failed, so try | |
1238 // refilling the TLAB or allocating directly from eden. | |
1239 Label retry_tlab, try_eden; | |
1240 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx, & rdx | |
1241 | |
1242 __ bind(retry_tlab); | |
1243 | |
1244 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
304 | 1245 // since size is postive movl does right thing on 64bit |
0 | 1246 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
304 | 1247 // since size is postive movl does right thing on 64bit |
0 | 1248 __ movl(arr_size, length); |
1249 assert(t1 == rcx, "fixed register usage"); | |
304 | 1250 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1251 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1252 __ andptr(t1, Klass::_lh_header_size_mask); | |
1253 __ addptr(arr_size, t1); | |
1254 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1255 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1256 |
1257 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size | |
1258 | |
1259 __ initialize_header(obj, klass, length, t1, t2); | |
1260 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); | |
1261 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); | |
1262 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1263 __ andptr(t1, Klass::_lh_header_size_mask); |
1264 __ subptr(arr_size, t1); // body length | |
1265 __ addptr(t1, obj); // body start | |
0 | 1266 __ initialize_body(t1, arr_size, 0, t2); |
1267 __ verify_oop(obj); | |
1268 __ ret(0); | |
1269 | |
1270 __ bind(try_eden); | |
1271 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
304 | 1272 // since size is postive movl does right thing on 64bit |
0 | 1273 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
304 | 1274 // since size is postive movl does right thing on 64bit |
0 | 1275 __ movl(arr_size, length); |
1276 assert(t1 == rcx, "fixed register usage"); | |
304 | 1277 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1278 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1279 __ andptr(t1, Klass::_lh_header_size_mask); | |
1280 __ addptr(arr_size, t1); | |
1281 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1282 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1283 |
1284 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size | |
1285 | |
1286 __ initialize_header(obj, klass, length, t1, t2); | |
1287 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); | |
1288 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); | |
1289 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1290 __ andptr(t1, Klass::_lh_header_size_mask); |
1291 __ subptr(arr_size, t1); // body length | |
1292 __ addptr(t1, obj); // body start | |
0 | 1293 __ initialize_body(t1, arr_size, 0, t2); |
1294 __ verify_oop(obj); | |
1295 __ ret(0); | |
1296 | |
1297 __ bind(slow_path); | |
1298 } | |
1299 | |
1300 __ enter(); | |
1301 OopMap* map = save_live_registers(sasm, 3); | |
1302 int call_offset; | |
1303 if (id == new_type_array_id) { | |
1304 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); | |
1305 } else { | |
1306 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); | |
1307 } | |
1308 | |
1309 oop_maps = new OopMapSet(); | |
1310 oop_maps->add_gc_map(call_offset, map); | |
1311 restore_live_registers_except_rax(sasm); | |
1312 | |
1313 __ verify_oop(obj); | |
1314 __ leave(); | |
1315 __ ret(0); | |
1316 | |
1317 // rax,: new array | |
1318 } | |
1319 break; | |
1320 | |
1321 case new_multi_array_id: | |
1322 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments); | |
1323 // rax,: klass | |
1324 // rbx,: rank | |
1325 // rcx: address of 1st dimension | |
1326 OopMap* map = save_live_registers(sasm, 4); | |
1327 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); | |
1328 | |
1329 oop_maps = new OopMapSet(); | |
1330 oop_maps->add_gc_map(call_offset, map); | |
1331 restore_live_registers_except_rax(sasm); | |
1332 | |
1333 // rax,: new multi array | |
1334 __ verify_oop(rax); | |
1335 } | |
1336 break; | |
1337 | |
1338 case register_finalizer_id: | |
1339 { | |
1340 __ set_info("register_finalizer", dont_gc_arguments); | |
1341 | |
304 | 1342 // This is called via call_runtime so the arguments |
1343 // will be place in C abi locations | |
1344 | |
1345 #ifdef _LP64 | |
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1346 __ verify_oop((UseC1X) ? j_rarg0 : c_rarg0); |
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1347 __ mov(rax, (UseC1X) ? j_rarg0 : c_rarg0); |
304 | 1348 #else |
0 | 1349 // The object is passed on the stack and we haven't pushed a |
1350 // frame yet so it's one work away from top of stack. | |
304 | 1351 __ movptr(rax, Address(rsp, 1 * BytesPerWord)); |
0 | 1352 __ verify_oop(rax); |
304 | 1353 #endif // _LP64 |
0 | 1354 |
1355 // load the klass and check the has finalizer flag | |
1356 Label register_finalizer; | |
1357 Register t = rsi; | |
2002 | 1358 __ load_klass(t, rax); |
0 | 1359 __ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc))); |
1360 __ testl(t, JVM_ACC_HAS_FINALIZER); | |
1361 __ jcc(Assembler::notZero, register_finalizer); | |
1362 __ ret(0); | |
1363 | |
1364 __ bind(register_finalizer); | |
1365 __ enter(); | |
1366 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); | |
1367 int call_offset = __ call_RT(noreg, noreg, | |
1368 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); | |
1369 oop_maps = new OopMapSet(); | |
1370 oop_maps->add_gc_map(call_offset, oop_map); | |
1371 | |
1372 // Now restore all the live registers | |
1373 restore_live_registers(sasm); | |
1374 | |
1375 __ leave(); | |
1376 __ ret(0); | |
1377 } | |
1378 break; | |
1379 | |
1380 case throw_range_check_failed_id: | |
1381 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); | |
1382 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); | |
1383 } | |
1384 break; | |
1385 | |
1386 case throw_index_exception_id: | |
1387 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); | |
1388 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); | |
1389 } | |
1390 break; | |
1391 | |
1392 case throw_div0_exception_id: | |
1393 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); | |
1394 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); | |
1395 } | |
1396 break; | |
1397 | |
1398 case throw_null_pointer_exception_id: | |
1399 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); | |
1400 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); | |
1401 } | |
1402 break; | |
1403 | |
1404 case handle_exception_nofpu_id: | |
1405 save_fpu_registers = false; | |
1406 // fall through | |
1407 case handle_exception_id: | |
1408 { StubFrame f(sasm, "handle_exception", dont_gc_arguments); | |
1409 oop_maps = new OopMapSet(); | |
1410 OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers); | |
1411 generate_handle_exception(sasm, oop_maps, oop_map, save_fpu_registers); | |
1412 } | |
1413 break; | |
1414 | |
1415 case unwind_exception_id: | |
1429
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1416 { |
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1417 __ set_info("unwind_exception", dont_gc_arguments); |
0 | 1418 // note: no stubframe since we are about to leave the current |
1419 // activation and we are calling a leaf VM function only. | |
1420 generate_unwind_exception(sasm); | |
1421 } | |
1422 break; | |
1423 | |
1424 case throw_array_store_exception_id: | |
1425 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); | |
1426 // tos + 0: link | |
1427 // + 1: return address | |
1428 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), false); | |
1429 } | |
1430 break; | |
1431 | |
1432 case throw_class_cast_exception_id: | |
1433 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); | |
1434 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); | |
1435 } | |
1436 break; | |
1437 | |
1438 case throw_incompatible_class_change_error_id: | |
1439 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); | |
1440 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); | |
1441 } | |
1442 break; | |
1443 | |
1444 case slow_subtype_check_id: | |
1445 { | |
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1446 // Typical calling sequence: |
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1447 // __ push(klass_RInfo); // object klass or other subclass |
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1448 // __ push(sup_k_RInfo); // array element klass or other superclass |
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1449 // __ call(slow_subtype_check); |
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1450 // Note that the subclass is pushed first, and is therefore deepest. |
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1451 // Previous versions of this code reversed the names 'sub' and 'super'. |
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1452 // This was operationally harmless but made the code unreadable. |
0 | 1453 enum layout { |
304 | 1454 rax_off, SLOT2(raxH_off) |
1455 rcx_off, SLOT2(rcxH_off) | |
1456 rsi_off, SLOT2(rsiH_off) | |
1457 rdi_off, SLOT2(rdiH_off) | |
1458 // saved_rbp_off, SLOT2(saved_rbpH_off) | |
1459 return_off, SLOT2(returnH_off) | |
644
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1460 sup_k_off, SLOT2(sup_kH_off) |
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1461 klass_off, SLOT2(superH_off) |
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1462 framesize, |
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1463 result_off = klass_off // deepest argument is also the return value |
0 | 1464 }; |
1465 | |
1466 __ set_info("slow_subtype_check", dont_gc_arguments); | |
304 | 1467 __ push(rdi); |
1468 __ push(rsi); | |
1469 __ push(rcx); | |
1470 __ push(rax); | |
0 | 1471 |
304 | 1472 // This is called by pushing args and not with C abi |
644
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1473 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass |
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1474 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass |
0 | 1475 |
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1476 Label success; |
0 | 1477 Label miss; |
1423
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1478 if (UseC1X) { |
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1479 // TODO this should really be within the XirSnippets |
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1480 __ check_klass_subtype_fast_path(rsi, rax, rcx, &success, &miss, NULL); |
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1481 }; |
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1482 |
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1483 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); |
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1484 |
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1485 // fallthrough on success: |
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1486 __ bind(success); |
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1487 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result |
304 | 1488 __ pop(rax); |
1489 __ pop(rcx); | |
1490 __ pop(rsi); | |
1491 __ pop(rdi); | |
0 | 1492 __ ret(0); |
1493 | |
1494 __ bind(miss); | |
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1495 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result |
304 | 1496 __ pop(rax); |
1497 __ pop(rcx); | |
1498 __ pop(rsi); | |
1499 __ pop(rdi); | |
0 | 1500 __ ret(0); |
1501 } | |
1502 break; | |
1503 | |
1504 case monitorenter_nofpu_id: | |
1505 save_fpu_registers = false; | |
1506 // fall through | |
1507 case monitorenter_id: | |
1508 { | |
1509 StubFrame f(sasm, "monitorenter", dont_gc_arguments); | |
1510 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); | |
1511 | |
304 | 1512 // Called with store_parameter and not C abi |
1513 | |
0 | 1514 f.load_argument(1, rax); // rax,: object |
1515 f.load_argument(0, rbx); // rbx,: lock address | |
1516 | |
1517 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); | |
1518 | |
1519 oop_maps = new OopMapSet(); | |
1520 oop_maps->add_gc_map(call_offset, map); | |
1521 restore_live_registers(sasm, save_fpu_registers); | |
1522 } | |
1523 break; | |
1524 | |
1525 case monitorexit_nofpu_id: | |
1526 save_fpu_registers = false; | |
1527 // fall through | |
1528 case monitorexit_id: | |
1529 { | |
1530 StubFrame f(sasm, "monitorexit", dont_gc_arguments); | |
1531 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); | |
1532 | |
304 | 1533 // Called with store_parameter and not C abi |
1534 | |
0 | 1535 f.load_argument(0, rax); // rax,: lock address |
1536 | |
1537 // note: really a leaf routine but must setup last java sp | |
1538 // => use call_RT for now (speed can be improved by | |
1539 // doing last java sp setup manually) | |
1540 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); | |
1541 | |
1542 oop_maps = new OopMapSet(); | |
1543 oop_maps->add_gc_map(call_offset, map); | |
1544 restore_live_registers(sasm, save_fpu_registers); | |
1545 | |
1546 } | |
1547 break; | |
1548 | |
1549 case access_field_patching_id: | |
1550 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments); | |
1551 // we should set up register map | |
1552 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); | |
1553 } | |
1554 break; | |
1555 | |
1556 case load_klass_patching_id: | |
1557 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); | |
1558 // we should set up register map | |
1559 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); | |
1560 } | |
1561 break; | |
1562 | |
1563 case jvmti_exception_throw_id: | |
1564 { // rax,: exception oop | |
1565 StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments); | |
1566 // Preserve all registers across this potentially blocking call | |
1567 const int num_rt_args = 2; // thread, exception oop | |
1568 OopMap* map = save_live_registers(sasm, num_rt_args); | |
1569 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), rax); | |
1570 oop_maps = new OopMapSet(); | |
1571 oop_maps->add_gc_map(call_offset, map); | |
1572 restore_live_registers(sasm); | |
1573 } | |
1574 break; | |
1575 | |
1576 case dtrace_object_alloc_id: | |
1577 { // rax,: object | |
1578 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); | |
1579 // we can't gc here so skip the oopmap but make sure that all | |
1580 // the live registers get saved. | |
1581 save_live_registers(sasm, 1); | |
1582 | |
304 | 1583 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); |
0 | 1584 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); |
304 | 1585 NOT_LP64(__ pop(rax)); |
0 | 1586 |
1587 restore_live_registers(sasm); | |
1588 } | |
1589 break; | |
1590 | |
1591 case fpu2long_stub_id: | |
1592 { | |
1593 // rax, and rdx are destroyed, but should be free since the result is returned there | |
1594 // preserve rsi,ecx | |
304 | 1595 __ push(rsi); |
1596 __ push(rcx); | |
1597 LP64_ONLY(__ push(rdx);) | |
0 | 1598 |
1599 // check for NaN | |
1600 Label return0, do_return, return_min_jlong, do_convert; | |
1601 | |
304 | 1602 Address value_high_word(rsp, wordSize + 4); |
1603 Address value_low_word(rsp, wordSize); | |
1604 Address result_high_word(rsp, 3*wordSize + 4); | |
1605 Address result_low_word(rsp, 3*wordSize); | |
0 | 1606 |
304 | 1607 __ subptr(rsp, 32); // more than enough on 32bit |
0 | 1608 __ fst_d(value_low_word); |
1609 __ movl(rax, value_high_word); | |
1610 __ andl(rax, 0x7ff00000); | |
1611 __ cmpl(rax, 0x7ff00000); | |
1612 __ jcc(Assembler::notEqual, do_convert); | |
1613 __ movl(rax, value_high_word); | |
1614 __ andl(rax, 0xfffff); | |
1615 __ orl(rax, value_low_word); | |
1616 __ jcc(Assembler::notZero, return0); | |
1617 | |
1618 __ bind(do_convert); | |
1619 __ fnstcw(Address(rsp, 0)); | |
304 | 1620 __ movzwl(rax, Address(rsp, 0)); |
0 | 1621 __ orl(rax, 0xc00); |
1622 __ movw(Address(rsp, 2), rax); | |
1623 __ fldcw(Address(rsp, 2)); | |
1624 __ fwait(); | |
1625 __ fistp_d(result_low_word); | |
1626 __ fldcw(Address(rsp, 0)); | |
1627 __ fwait(); | |
304 | 1628 // This gets the entire long in rax on 64bit |
1629 __ movptr(rax, result_low_word); | |
1630 // testing of high bits | |
0 | 1631 __ movl(rdx, result_high_word); |
304 | 1632 __ mov(rcx, rax); |
0 | 1633 // What the heck is the point of the next instruction??? |
1634 __ xorl(rcx, 0x0); | |
1635 __ movl(rsi, 0x80000000); | |
1636 __ xorl(rsi, rdx); | |
1637 __ orl(rcx, rsi); | |
1638 __ jcc(Assembler::notEqual, do_return); | |
1639 __ fldz(); | |
1640 __ fcomp_d(value_low_word); | |
1641 __ fnstsw_ax(); | |
304 | 1642 #ifdef _LP64 |
1643 __ testl(rax, 0x4100); // ZF & CF == 0 | |
1644 __ jcc(Assembler::equal, return_min_jlong); | |
1645 #else | |
0 | 1646 __ sahf(); |
1647 __ jcc(Assembler::above, return_min_jlong); | |
304 | 1648 #endif // _LP64 |
0 | 1649 // return max_jlong |
304 | 1650 #ifndef _LP64 |
0 | 1651 __ movl(rdx, 0x7fffffff); |
1652 __ movl(rax, 0xffffffff); | |
304 | 1653 #else |
1654 __ mov64(rax, CONST64(0x7fffffffffffffff)); | |
1655 #endif // _LP64 | |
0 | 1656 __ jmp(do_return); |
1657 | |
1658 __ bind(return_min_jlong); | |
304 | 1659 #ifndef _LP64 |
0 | 1660 __ movl(rdx, 0x80000000); |
1661 __ xorl(rax, rax); | |
304 | 1662 #else |
1663 __ mov64(rax, CONST64(0x8000000000000000)); | |
1664 #endif // _LP64 | |
0 | 1665 __ jmp(do_return); |
1666 | |
1667 __ bind(return0); | |
1668 __ fpop(); | |
304 | 1669 #ifndef _LP64 |
1670 __ xorptr(rdx,rdx); | |
1671 __ xorptr(rax,rax); | |
1672 #else | |
1673 __ xorptr(rax, rax); | |
1674 #endif // _LP64 | |
0 | 1675 |
1676 __ bind(do_return); | |
304 | 1677 __ addptr(rsp, 32); |
1678 LP64_ONLY(__ pop(rdx);) | |
1679 __ pop(rcx); | |
1680 __ pop(rsi); | |
0 | 1681 __ ret(0); |
1682 } | |
1683 break; | |
1684 | |
342 | 1685 #ifndef SERIALGC |
1686 case g1_pre_barrier_slow_id: | |
1687 { | |
1688 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); | |
1689 // arg0 : previous value of memory | |
1690 | |
1691 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1692 if (bs->kind() != BarrierSet::G1SATBCTLogging) { | |
362 | 1693 __ movptr(rax, (int)id); |
342 | 1694 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
1695 __ should_not_reach_here(); | |
1696 break; | |
1697 } | |
362 | 1698 __ push(rax); |
1699 __ push(rdx); | |
342 | 1700 |
1701 const Register pre_val = rax; | |
362 | 1702 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1703 const Register tmp = rdx; |
1704 | |
362 | 1705 NOT_LP64(__ get_thread(thread);) |
342 | 1706 |
1707 Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1708 PtrQueue::byte_offset_of_active())); | |
1709 | |
1710 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1711 PtrQueue::byte_offset_of_index())); | |
1712 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1713 PtrQueue::byte_offset_of_buf())); | |
1714 | |
1715 | |
1716 Label done; | |
1717 Label runtime; | |
1718 | |
1719 // Can we store original value in the thread's buffer? | |
1720 | |
362 | 1721 #ifdef _LP64 |
1572 | 1722 __ movslq(tmp, queue_index); |
362 | 1723 __ cmpq(tmp, 0); |
1724 #else | |
342 | 1725 __ cmpl(queue_index, 0); |
362 | 1726 #endif |
342 | 1727 __ jcc(Assembler::equal, runtime); |
362 | 1728 #ifdef _LP64 |
1729 __ subq(tmp, wordSize); | |
1730 __ movl(queue_index, tmp); | |
1731 __ addq(tmp, buffer); | |
1732 #else | |
342 | 1733 __ subl(queue_index, wordSize); |
1734 __ movl(tmp, buffer); | |
1735 __ addl(tmp, queue_index); | |
362 | 1736 #endif |
1737 | |
342 | 1738 // prev_val (rax) |
1739 f.load_argument(0, pre_val); | |
362 | 1740 __ movptr(Address(tmp, 0), pre_val); |
342 | 1741 __ jmp(done); |
1742 | |
1743 __ bind(runtime); | |
1572 | 1744 __ push(rcx); |
1745 #ifdef _LP64 | |
1746 __ push(r8); | |
1747 __ push(r9); | |
1748 __ push(r10); | |
1749 __ push(r11); | |
1750 # ifndef _WIN64 | |
1751 __ push(rdi); | |
1752 __ push(rsi); | |
1753 # endif | |
1754 #endif | |
342 | 1755 // load the pre-value |
1756 f.load_argument(0, rcx); | |
1757 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); | |
1572 | 1758 #ifdef _LP64 |
1759 # ifndef _WIN64 | |
1760 __ pop(rsi); | |
1761 __ pop(rdi); | |
1762 # endif | |
1763 __ pop(r11); | |
1764 __ pop(r10); | |
1765 __ pop(r9); | |
1766 __ pop(r8); | |
1767 #endif | |
362 | 1768 __ pop(rcx); |
1572 | 1769 __ bind(done); |
342 | 1770 |
362 | 1771 __ pop(rdx); |
1772 __ pop(rax); | |
342 | 1773 } |
1774 break; | |
1775 | |
1776 case g1_post_barrier_slow_id: | |
1777 { | |
1778 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); | |
1779 | |
1780 | |
1781 // arg0: store_address | |
1782 Address store_addr(rbp, 2*BytesPerWord); | |
1783 | |
1784 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1785 CardTableModRefBS* ct = (CardTableModRefBS*)bs; | |
1786 Label done; | |
1787 Label runtime; | |
1788 | |
1789 // At this point we know new_value is non-NULL and the new_value crosses regsion. | |
1790 // Must check to see if card is already dirty | |
1791 | |
362 | 1792 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1793 |
1794 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1795 PtrQueue::byte_offset_of_index())); | |
1796 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1797 PtrQueue::byte_offset_of_buf())); | |
1798 | |
362 | 1799 __ push(rax); |
1572 | 1800 __ push(rcx); |
342 | 1801 |
362 | 1802 NOT_LP64(__ get_thread(thread);) |
1803 ExternalAddress cardtable((address)ct->byte_map_base); | |
342 | 1804 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
1805 | |
1572 | 1806 const Register card_addr = rcx; |
362 | 1807 #ifdef _LP64 |
1808 const Register tmp = rscratch1; | |
1809 f.load_argument(0, card_addr); | |
1810 __ shrq(card_addr, CardTableModRefBS::card_shift); | |
1811 __ lea(tmp, cardtable); | |
1812 // get the address of the card | |
1813 __ addq(card_addr, tmp); | |
1814 #else | |
1572 | 1815 const Register card_index = rcx; |
362 | 1816 f.load_argument(0, card_index); |
1817 __ shrl(card_index, CardTableModRefBS::card_shift); | |
1818 | |
342 | 1819 Address index(noreg, card_index, Address::times_1); |
1820 __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index))); | |
362 | 1821 #endif |
1822 | |
342 | 1823 __ cmpb(Address(card_addr, 0), 0); |
1824 __ jcc(Assembler::equal, done); | |
1825 | |
1826 // storing region crossing non-NULL, card is clean. | |
1827 // dirty card and log. | |
1828 | |
1829 __ movb(Address(card_addr, 0), 0); | |
1830 | |
1831 __ cmpl(queue_index, 0); | |
1832 __ jcc(Assembler::equal, runtime); | |
1833 __ subl(queue_index, wordSize); | |
1834 | |
1835 const Register buffer_addr = rbx; | |
362 | 1836 __ push(rbx); |
1837 | |
1838 __ movptr(buffer_addr, buffer); | |
342 | 1839 |
362 | 1840 #ifdef _LP64 |
1841 __ movslq(rscratch1, queue_index); | |
1842 __ addptr(buffer_addr, rscratch1); | |
1843 #else | |
1844 __ addptr(buffer_addr, queue_index); | |
1845 #endif | |
1846 __ movptr(Address(buffer_addr, 0), card_addr); | |
1847 | |
1848 __ pop(rbx); | |
342 | 1849 __ jmp(done); |
1850 | |
1851 __ bind(runtime); | |
1572 | 1852 __ push(rdx); |
1853 #ifdef _LP64 | |
1854 __ push(r8); | |
1855 __ push(r9); | |
1856 __ push(r10); | |
1857 __ push(r11); | |
1858 # ifndef _WIN64 | |
1859 __ push(rdi); | |
1860 __ push(rsi); | |
1861 # endif | |
1862 #endif | |
342 | 1863 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
1572 | 1864 #ifdef _LP64 |
1865 # ifndef _WIN64 | |
1866 __ pop(rsi); | |
1867 __ pop(rdi); | |
1868 # endif | |
1869 __ pop(r11); | |
1870 __ pop(r10); | |
1871 __ pop(r9); | |
1872 __ pop(r8); | |
1873 #endif | |
1874 __ pop(rdx); | |
1875 __ bind(done); | |
342 | 1876 |
1572 | 1877 __ pop(rcx); |
362 | 1878 __ pop(rax); |
342 | 1879 |
1880 } | |
1881 break; | |
1882 #endif // !SERIALGC | |
1883 | |
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1884 case c1x_unwind_exception_call_id: { |
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1885 // remove the frame from the stack |
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1886 __ movptr(rsp, rbp); |
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1887 __ pop(rbp); |
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1888 // exception_oop is passed using ordinary java calling conventions |
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1889 __ movptr(rax, j_rarg0); |
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1890 |
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1891 Label nonNullExceptionOop; |
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1892 __ testptr(rax, rax); |
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1893 __ jcc(Assembler::notZero, nonNullExceptionOop); |
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1894 { |
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1895 __ enter(); |
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1896 oop_maps = new OopMapSet(); |
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1897 OopMap* oop_map = save_live_registers(sasm, 0); |
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1898 int call_offset = __ call_RT(rax, noreg, (address)c1x_create_null_exception, 0); |
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1899 oop_maps->add_gc_map(call_offset, oop_map); |
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1900 __ leave(); |
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1901 } |
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1902 __ bind(nonNullExceptionOop); |
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1903 |
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1904 __ set_info("unwind_exception", dont_gc_arguments); |
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1905 // note: no stubframe since we are about to leave the current |
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1906 // activation and we are calling a leaf VM function only. |
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1907 generate_unwind_exception(sasm); |
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1908 __ should_not_reach_here(); |
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1909 break; |
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1910 } |
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1911 |
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1912 case c1x_handle_exception_id: { |
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1913 StubFrame f(sasm, "c1x_handle_exception", dont_gc_arguments); |
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1914 oop_maps = new OopMapSet(); |
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1915 OopMap* oop_map = save_live_registers(sasm, 1, false); |
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1916 c1x_generate_handle_exception(sasm, oop_maps, oop_map); |
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1917 break; |
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1918 } |
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1919 |
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1920 case c1x_global_implicit_null_id: { |
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1921 __ push(rax); |
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1922 __ push(rax); |
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1923 // move saved fp to make space for the inserted return address |
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1924 __ get_thread(rax); |
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1925 __ movptr(rax, Address(rax, JavaThread::saved_exception_pc_offset())); |
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1926 __ movptr(Address(rsp, HeapWordSize), rax); |
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1927 __ pop(rax); |
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1928 |
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1929 { StubFrame f(sasm, "c1x_global_implicit_null_id", dont_gc_arguments); |
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1930 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); |
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1931 } |
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1932 break; |
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1933 } |
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1934 |
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1935 case c1x_throw_div0_exception_id: { |
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1936 __ push(rax); |
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1937 __ push(rax); |
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1938 // move saved fp to make space for the inserted return address |
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1939 __ get_thread(rax); |
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1940 __ movptr(rax, Address(rax, JavaThread::saved_exception_pc_offset())); |
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1941 __ movptr(Address(rsp, HeapWordSize), rax); |
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1942 __ pop(rax); |
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1943 |
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1944 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); |
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1945 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); |
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1946 } |
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1947 break; |
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1948 } |
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1949 |
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1950 case c1x_slow_subtype_check_id: { |
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1951 Label success; |
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1952 Label miss; |
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1953 |
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1954 // TODO this should really be within the XirSnippets |
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1955 __ check_klass_subtype_fast_path(j_rarg0, j_rarg1, j_rarg2, &success, &miss, NULL); |
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1956 __ check_klass_subtype_slow_path(j_rarg0, j_rarg1, j_rarg2, j_rarg3, NULL, &miss); |
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1957 |
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1958 // fallthrough on success: |
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1959 __ bind(success); |
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1960 __ movptr(rax, 1); |
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1961 __ ret(0); |
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1962 |
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1963 __ bind(miss); |
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1964 __ movptr(rax, NULL_WORD); |
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1965 __ ret(0); |
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1966 break; |
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1967 } |
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1968 |
1449
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1969 case c1x_verify_pointer_id: { |
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1970 __ verify_oop(r13, "c1x verify pointer"); |
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Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
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1971 __ ret(0); |
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Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
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1972 break; |
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Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
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1973 } |
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Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
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1974 |
1434
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1975 case c1x_arithmetic_frem_id: { |
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1976 __ subptr(rsp, 8); |
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1977 __ movflt(Address(rsp, 0), xmm1); |
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1978 __ fld_s(Address(rsp, 0)); |
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1979 __ movflt(Address(rsp, 0), xmm0); |
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1980 __ fld_s(Address(rsp, 0)); |
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1981 Label L; |
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1982 __ bind(L); |
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1983 __ fprem(); |
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1984 __ fwait(); |
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1985 __ fnstsw_ax(); |
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1986 __ testl(rax, 0x400); |
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1987 __ jcc(Assembler::notZero, L); |
72cfb36c6bb2
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Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
1988 __ fxch(1); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1989 __ fpop(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1990 __ fstp_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1991 __ movflt(xmm0, Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
1992 __ addptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1993 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1994 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1995 } |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1996 case c1x_arithmetic_drem_id: { |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1997 __ subptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1998 __ movdbl(Address(rsp, 0), xmm1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1999 __ fld_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2000 __ movdbl(Address(rsp, 0), xmm0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2001 __ fld_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2002 Label L; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2003 __ bind(L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2004 __ fprem(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2005 __ fwait(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2006 __ fnstsw_ax(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2007 __ testl(rax, 0x400); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2008 __ jcc(Assembler::notZero, L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2009 __ fxch(1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2010 __ fpop(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2011 __ fstp_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2012 __ movdbl(xmm0, Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2013 __ addptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2014 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2015 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2016 } |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2017 case c1x_monitorenter_id: { |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2018 Label slow_case; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2019 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2020 Register obj = j_rarg0; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2021 Register lock = j_rarg1; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2022 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2023 Register scratch1 = rax; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2024 Register scratch2 = rbx; |
1942
00bc9eaf0e24
Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1930
diff
changeset
|
2025 assert_different_registers(obj, lock, scratch1, scratch2); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2026 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2027 // copied from LIR_Assembler::emit_lock |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2028 if (UseFastLocking) { |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2029 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2030 __ lock_object(scratch1, obj, lock, scratch2, slow_case); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2031 __ ret(0); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2032 } |
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2033 |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2034 __ bind(slow_case); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2035 { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2036 StubFrame f(sasm, "c1x_monitorenter", dont_gc_arguments); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2037 OopMap* map = save_live_registers(sasm, 1, save_fpu_registers); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2038 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2039 // Called with store_parameter and not C abi |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2040 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), obj, lock); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2041 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2042 oop_maps = new OopMapSet(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2043 oop_maps->add_gc_map(call_offset, map); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2044 restore_live_registers(sasm, save_fpu_registers); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2045 } |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2046 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2047 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2048 } |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2049 case c1x_monitorexit_id: { |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2050 Label slow_case; |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2051 |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2052 Register obj = j_rarg0; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2053 Register lock = j_rarg1; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2054 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2055 // needed in rax later on... |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2056 Register lock2 = rax; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2057 __ mov(lock2, lock); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2058 Register scratch1 = rbx; |
1942
00bc9eaf0e24
Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1930
diff
changeset
|
2059 assert_different_registers(obj, lock, scratch1, lock2); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2060 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2061 // copied from LIR_Assembler::emit_lock |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2062 if (UseFastLocking) { |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2063 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2064 __ unlock_object(scratch1, obj, lock2, slow_case); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2065 __ ret(0); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2066 } |
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2067 |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2068 __ bind(slow_case); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2069 { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2070 StubFrame f(sasm, "c1x_monitorexit", dont_gc_arguments); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2071 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2072 |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2073 // note: really a leaf routine but must setup last java sp |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2074 // => use call_RT for now (speed can be improved by |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2075 // doing last java sp setup manually) |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2076 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), lock); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2077 |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2078 oop_maps = new OopMapSet(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2079 oop_maps->add_gc_map(call_offset, map); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2080 restore_live_registers(sasm, save_fpu_registers); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2081 } |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2082 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2083 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2084 } |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2085 |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2086 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2087 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2088 |
0 | 2089 default: |
2090 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); | |
304 | 2091 __ movptr(rax, (int)id); |
0 | 2092 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
2093 __ should_not_reach_here(); | |
2094 } | |
2095 break; | |
2096 } | |
2097 return oop_maps; | |
2098 } | |
2099 | |
2100 #undef __ | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
2101 |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
2102 const char *Runtime1::pd_name_for_address(address entry) { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
2103 return "<unknown function>"; |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
2104 } |