Mercurial > hg > graal-jvmci-8
annotate src/share/vm/opto/regmask.cpp @ 23799:535618ab1c04
6675699: need comprehensive fix for unconstrained ConvI2L with narrowed type
Summary: Emit CastII to make narrow ConvI2L dependent on the corresponding range check.
Reviewed-by: kvn, roland
author | thartmann |
---|---|
date | Wed, 27 Jan 2016 09:02:51 +0100 |
parents | ddce0b7cee93 |
children | dd9cc155639c |
rev | line source |
---|---|
0 | 1 /* |
22851
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17937
diff
changeset
|
2 * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
0
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
0
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
0
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "opto/compile.hpp" | |
27 #include "opto/regmask.hpp" | |
22851
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17937
diff
changeset
|
28 #if defined AD_MD_HPP |
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17937
diff
changeset
|
29 # include AD_MD_HPP |
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17937
diff
changeset
|
30 #elif defined TARGET_ARCH_MODEL_x86_32 |
1972 | 31 # include "adfiles/ad_x86_32.hpp" |
22851
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17937
diff
changeset
|
32 #elif defined TARGET_ARCH_MODEL_x86_64 |
1972 | 33 # include "adfiles/ad_x86_64.hpp" |
22851
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17937
diff
changeset
|
34 #elif defined TARGET_ARCH_MODEL_sparc |
1972 | 35 # include "adfiles/ad_sparc.hpp" |
22851
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17937
diff
changeset
|
36 #elif defined TARGET_ARCH_MODEL_zero |
1972 | 37 # include "adfiles/ad_zero.hpp" |
22851
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17937
diff
changeset
|
38 #elif defined TARGET_ARCH_MODEL_ppc_64 |
14391 | 39 # include "adfiles/ad_ppc_64.hpp" |
2192
b92c45f2bc75
7016023: Enable building ARM and PPC from src/closed repository
bobv
parents:
1972
diff
changeset
|
40 #endif |
0 | 41 |
42 #define RM_SIZE _RM_SIZE /* a constant private to the class RegMask */ | |
43 | |
44 //-------------Non-zero bit search methods used by RegMask--------------------- | |
45 // Find lowest 1, or return 32 if empty | |
46 int find_lowest_bit( uint32 mask ) { | |
47 int n = 0; | |
48 if( (mask & 0xffff) == 0 ) { | |
49 mask >>= 16; | |
50 n += 16; | |
51 } | |
52 if( (mask & 0xff) == 0 ) { | |
53 mask >>= 8; | |
54 n += 8; | |
55 } | |
56 if( (mask & 0xf) == 0 ) { | |
57 mask >>= 4; | |
58 n += 4; | |
59 } | |
60 if( (mask & 0x3) == 0 ) { | |
61 mask >>= 2; | |
62 n += 2; | |
63 } | |
64 if( (mask & 0x1) == 0 ) { | |
65 mask >>= 1; | |
66 n += 1; | |
67 } | |
68 if( mask == 0 ) { | |
69 n = 32; | |
70 } | |
71 return n; | |
72 } | |
73 | |
74 // Find highest 1, or return 32 if empty | |
75 int find_hihghest_bit( uint32 mask ) { | |
76 int n = 0; | |
77 if( mask > 0xffff ) { | |
78 mask >>= 16; | |
79 n += 16; | |
80 } | |
81 if( mask > 0xff ) { | |
82 mask >>= 8; | |
83 n += 8; | |
84 } | |
85 if( mask > 0xf ) { | |
86 mask >>= 4; | |
87 n += 4; | |
88 } | |
89 if( mask > 0x3 ) { | |
90 mask >>= 2; | |
91 n += 2; | |
92 } | |
93 if( mask > 0x1 ) { | |
94 mask >>= 1; | |
95 n += 1; | |
96 } | |
97 if( mask == 0 ) { | |
98 n = 32; | |
99 } | |
100 return n; | |
101 } | |
102 | |
103 //------------------------------dump------------------------------------------- | |
104 | |
105 #ifndef PRODUCT | |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
106 void OptoReg::dump(int r, outputStream *st) { |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
107 switch (r) { |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
108 case Special: st->print("r---"); break; |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
109 case Bad: st->print("rBAD"); break; |
0 | 110 default: |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
14391
diff
changeset
|
111 if (r < _last_Mach_Reg) st->print("%s", Matcher::regName[r]); |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
112 else st->print("rS%d",r); |
0 | 113 break; |
114 } | |
115 } | |
116 #endif | |
117 | |
118 | |
119 //============================================================================= | |
120 const RegMask RegMask::Empty( | |
121 # define BODY(I) 0, | |
122 FORALL_BODY | |
123 # undef BODY | |
124 0 | |
125 ); | |
126 | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
127 //============================================================================= |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
128 bool RegMask::is_vector(uint ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
129 return (ireg == Op_VecS || ireg == Op_VecD || ireg == Op_VecX || ireg == Op_VecY); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
130 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
131 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
132 int RegMask::num_registers(uint ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
133 switch(ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
134 case Op_VecY: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
135 return 8; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
136 case Op_VecX: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
137 return 4; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
138 case Op_VecD: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
139 case Op_RegD: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
140 case Op_RegL: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
141 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
142 case Op_RegP: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
143 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
144 return 2; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
145 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
146 // Op_VecS and the rest ideal registers. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
147 return 1; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
148 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
149 |
0 | 150 //------------------------------find_first_pair-------------------------------- |
151 // Find the lowest-numbered register pair in the mask. Return the | |
152 // HIGHEST register number in the pair, or BAD if no pairs. | |
153 OptoReg::Name RegMask::find_first_pair() const { | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
154 verify_pairs(); |
0 | 155 for( int i = 0; i < RM_SIZE; i++ ) { |
156 if( _A[i] ) { // Found some bits | |
157 int bit = _A[i] & -_A[i]; // Extract low bit | |
158 // Convert to bit number, return hi bit in pair | |
159 return OptoReg::Name((i<<_LogWordBits)+find_lowest_bit(bit)+1); | |
160 } | |
161 } | |
162 return OptoReg::Bad; | |
163 } | |
164 | |
165 //------------------------------ClearToPairs----------------------------------- | |
166 // Clear out partial bits; leave only bit pairs | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
167 void RegMask::clear_to_pairs() { |
0 | 168 for( int i = 0; i < RM_SIZE; i++ ) { |
169 int bits = _A[i]; | |
170 bits &= ((bits & 0x55555555)<<1); // 1 hi-bit set for each pair | |
171 bits |= (bits>>1); // Smear 1 hi-bit into a pair | |
172 _A[i] = bits; | |
173 } | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
174 verify_pairs(); |
0 | 175 } |
176 | |
177 //------------------------------SmearToPairs----------------------------------- | |
178 // Smear out partial bits; leave only bit pairs | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
179 void RegMask::smear_to_pairs() { |
0 | 180 for( int i = 0; i < RM_SIZE; i++ ) { |
181 int bits = _A[i]; | |
182 bits |= ((bits & 0x55555555)<<1); // Smear lo bit hi per pair | |
183 bits |= ((bits & 0xAAAAAAAA)>>1); // Smear hi bit lo per pair | |
184 _A[i] = bits; | |
185 } | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
186 verify_pairs(); |
0 | 187 } |
188 | |
189 //------------------------------is_aligned_pairs------------------------------- | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
190 bool RegMask::is_aligned_pairs() const { |
0 | 191 // Assert that the register mask contains only bit pairs. |
192 for( int i = 0; i < RM_SIZE; i++ ) { | |
193 int bits = _A[i]; | |
194 while( bits ) { // Check bits for pairing | |
195 int bit = bits & -bits; // Extract low bit | |
196 // Low bit is not odd means its mis-aligned. | |
197 if( (bit & 0x55555555) == 0 ) return false; | |
198 bits -= bit; // Remove bit from mask | |
199 // Check for aligned adjacent bit | |
200 if( (bits & (bit<<1)) == 0 ) return false; | |
201 bits -= (bit<<1); // Remove other halve of pair | |
202 } | |
203 } | |
204 return true; | |
205 } | |
206 | |
207 //------------------------------is_bound1-------------------------------------- | |
208 // Return TRUE if the mask contains a single bit | |
209 int RegMask::is_bound1() const { | |
210 if( is_AllStack() ) return false; | |
211 int bit = -1; // Set to hold the one bit allowed | |
212 for( int i = 0; i < RM_SIZE; i++ ) { | |
213 if( _A[i] ) { // Found some bits | |
214 if( bit != -1 ) return false; // Already had bits, so fail | |
215 bit = _A[i] & -_A[i]; // Extract 1 bit from mask | |
216 if( bit != _A[i] ) return false; // Found many bits, so fail | |
217 } | |
218 } | |
219 // True for both the empty mask and for a single bit | |
220 return true; | |
221 } | |
222 | |
223 //------------------------------is_bound2-------------------------------------- | |
224 // Return TRUE if the mask contains an adjacent pair of bits and no other bits. | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
225 int RegMask::is_bound_pair() const { |
0 | 226 if( is_AllStack() ) return false; |
227 | |
228 int bit = -1; // Set to hold the one bit allowed | |
229 for( int i = 0; i < RM_SIZE; i++ ) { | |
230 if( _A[i] ) { // Found some bits | |
231 if( bit != -1 ) return false; // Already had bits, so fail | |
232 bit = _A[i] & -(_A[i]); // Extract 1 bit from mask | |
233 if( (bit << 1) != 0 ) { // Bit pair stays in same word? | |
234 if( (bit | (bit<<1)) != _A[i] ) | |
235 return false; // Require adjacent bit pair and no more bits | |
236 } else { // Else its a split-pair case | |
237 if( bit != _A[i] ) return false; // Found many bits, so fail | |
238 i++; // Skip iteration forward | |
8044
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
239 if( i >= RM_SIZE || _A[i] != 1 ) |
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
240 return false; // Require 1 lo bit in next word |
0 | 241 } |
242 } | |
243 } | |
244 // True for both the empty mask and for a bit pair | |
245 return true; | |
246 } | |
247 | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
248 static int low_bits[3] = { 0x55555555, 0x11111111, 0x01010101 }; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
249 //------------------------------find_first_set--------------------------------- |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
250 // Find the lowest-numbered register set in the mask. Return the |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
251 // HIGHEST register number in the set, or BAD if no sets. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
252 // Works also for size 1. |
8044
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
253 OptoReg::Name RegMask::find_first_set(const int size) const { |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
254 verify_sets(size); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
255 for (int i = 0; i < RM_SIZE; i++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
256 if (_A[i]) { // Found some bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
257 int bit = _A[i] & -_A[i]; // Extract low bit |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
258 // Convert to bit number, return hi bit in pair |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
259 return OptoReg::Name((i<<_LogWordBits)+find_lowest_bit(bit)+(size-1)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
260 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
261 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
262 return OptoReg::Bad; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
263 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
264 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
265 //------------------------------clear_to_sets---------------------------------- |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
266 // Clear out partial bits; leave only aligned adjacent bit pairs |
8044
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
267 void RegMask::clear_to_sets(const int size) { |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
268 if (size == 1) return; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
269 assert(2 <= size && size <= 8, "update low bits table"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
270 assert(is_power_of_2(size), "sanity"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
271 int low_bits_mask = low_bits[size>>2]; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
272 for (int i = 0; i < RM_SIZE; i++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
273 int bits = _A[i]; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
274 int sets = (bits & low_bits_mask); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
275 for (int j = 1; j < size; j++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
276 sets = (bits & (sets<<1)); // filter bits which produce whole sets |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
277 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
278 sets |= (sets>>1); // Smear 1 hi-bit into a set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
279 if (size > 2) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
280 sets |= (sets>>2); // Smear 2 hi-bits into a set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
281 if (size > 4) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
282 sets |= (sets>>4); // Smear 4 hi-bits into a set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
283 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
284 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
285 _A[i] = sets; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
286 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
287 verify_sets(size); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
288 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
289 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
290 //------------------------------smear_to_sets---------------------------------- |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
291 // Smear out partial bits to aligned adjacent bit sets |
8044
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
292 void RegMask::smear_to_sets(const int size) { |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
293 if (size == 1) return; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
294 assert(2 <= size && size <= 8, "update low bits table"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
295 assert(is_power_of_2(size), "sanity"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
296 int low_bits_mask = low_bits[size>>2]; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
297 for (int i = 0; i < RM_SIZE; i++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
298 int bits = _A[i]; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
299 int sets = 0; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
300 for (int j = 0; j < size; j++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
301 sets |= (bits & low_bits_mask); // collect partial bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
302 bits = bits>>1; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
303 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
304 sets |= (sets<<1); // Smear 1 lo-bit into a set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
305 if (size > 2) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
306 sets |= (sets<<2); // Smear 2 lo-bits into a set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
307 if (size > 4) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
308 sets |= (sets<<4); // Smear 4 lo-bits into a set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
309 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
310 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
311 _A[i] = sets; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
312 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
313 verify_sets(size); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
314 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
315 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
316 //------------------------------is_aligned_set-------------------------------- |
8044
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
317 bool RegMask::is_aligned_sets(const int size) const { |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
318 if (size == 1) return true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
319 assert(2 <= size && size <= 8, "update low bits table"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
320 assert(is_power_of_2(size), "sanity"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
321 int low_bits_mask = low_bits[size>>2]; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
322 // Assert that the register mask contains only bit sets. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
323 for (int i = 0; i < RM_SIZE; i++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
324 int bits = _A[i]; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
325 while (bits) { // Check bits for pairing |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
326 int bit = bits & -bits; // Extract low bit |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
327 // Low bit is not odd means its mis-aligned. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
328 if ((bit & low_bits_mask) == 0) return false; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
329 // Do extra work since (bit << size) may overflow. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
330 int hi_bit = bit << (size-1); // high bit |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
331 int set = hi_bit + ((hi_bit-1) & ~(bit-1)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
332 // Check for aligned adjacent bits in this set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
333 if ((bits & set) != set) return false; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
334 bits -= set; // Remove this set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
335 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
336 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
337 return true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
338 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
339 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
340 //------------------------------is_bound_set----------------------------------- |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
341 // Return TRUE if the mask contains one adjacent set of bits and no other bits. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
342 // Works also for size 1. |
8044
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
343 int RegMask::is_bound_set(const int size) const { |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
344 if( is_AllStack() ) return false; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
345 assert(1 <= size && size <= 8, "update low bits table"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
346 int bit = -1; // Set to hold the one bit allowed |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
347 for (int i = 0; i < RM_SIZE; i++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
348 if (_A[i] ) { // Found some bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
349 if (bit != -1) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
350 return false; // Already had bits, so fail |
8044
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
351 bit = _A[i] & -_A[i]; // Extract low bit from mask |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
352 int hi_bit = bit << (size-1); // high bit |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
353 if (hi_bit != 0) { // Bit set stays in same word? |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
354 int set = hi_bit + ((hi_bit-1) & ~(bit-1)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
355 if (set != _A[i]) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
356 return false; // Require adjacent bit set and no more bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
357 } else { // Else its a split-set case |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
358 if (((-1) & ~(bit-1)) != _A[i]) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
359 return false; // Found many bits, so fail |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
360 i++; // Skip iteration forward and check high part |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
361 // The lower 24 bits should be 0 since it is split case and size <= 8. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
362 int set = bit>>24; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
363 set = set & -set; // Remove sign extension. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
364 set = (((set << size) - 1) >> 8); |
8044
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
365 if (i >= RM_SIZE || _A[i] != set) |
2c673161698a
8007402: Code cleanup to remove Parfait false positive
drchase
parents:
7636
diff
changeset
|
366 return false; // Require expected low bits in next word |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
367 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
368 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
369 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
370 // True for both the empty mask and for a bit set |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
371 return true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
372 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
2426
diff
changeset
|
373 |
0 | 374 //------------------------------is_UP------------------------------------------ |
375 // UP means register only, Register plus stack, or stack only is DOWN | |
376 bool RegMask::is_UP() const { | |
377 // Quick common case check for DOWN (any stack slot is legal) | |
378 if( is_AllStack() ) | |
379 return false; | |
380 // Slower check for any stack bits set (also DOWN) | |
381 if( overlap(Matcher::STACK_ONLY_mask) ) | |
382 return false; | |
383 // Not DOWN, so must be UP | |
384 return true; | |
385 } | |
386 | |
387 //------------------------------Size------------------------------------------- | |
388 // Compute size of register mask in bits | |
389 uint RegMask::Size() const { | |
390 extern uint8 bitsInByte[256]; | |
391 uint sum = 0; | |
392 for( int i = 0; i < RM_SIZE; i++ ) | |
393 sum += | |
394 bitsInByte[(_A[i]>>24) & 0xff] + | |
395 bitsInByte[(_A[i]>>16) & 0xff] + | |
396 bitsInByte[(_A[i]>> 8) & 0xff] + | |
397 bitsInByte[ _A[i] & 0xff]; | |
398 return sum; | |
399 } | |
400 | |
401 #ifndef PRODUCT | |
402 //------------------------------print------------------------------------------ | |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
403 void RegMask::dump(outputStream *st) const { |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
404 st->print("["); |
0 | 405 RegMask rm = *this; // Structure copy into local temp |
406 | |
407 OptoReg::Name start = rm.find_first_elem(); // Get a register | |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
408 if (OptoReg::is_valid(start)) { // Check for empty mask |
0 | 409 rm.Remove(start); // Yank from mask |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
410 OptoReg::dump(start, st); // Print register |
0 | 411 OptoReg::Name last = start; |
412 | |
413 // Now I have printed an initial register. | |
414 // Print adjacent registers as "rX-rZ" instead of "rX,rY,rZ". | |
415 // Begin looping over the remaining registers. | |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
416 while (1) { // |
0 | 417 OptoReg::Name reg = rm.find_first_elem(); // Get a register |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
418 if (!OptoReg::is_valid(reg)) |
0 | 419 break; // Empty mask, end loop |
420 rm.Remove(reg); // Yank from mask | |
421 | |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
422 if (last+1 == reg) { // See if they are adjacent |
0 | 423 // Adjacent registers just collect into long runs, no printing. |
424 last = reg; | |
425 } else { // Ending some kind of run | |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
426 if (start == last) { // 1-register run; no special printing |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
427 } else if (start+1 == last) { |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
428 st->print(","); // 2-register run; print as "rX,rY" |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
429 OptoReg::dump(last, st); |
0 | 430 } else { // Multi-register run; print as "rX-rZ" |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
431 st->print("-"); |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
432 OptoReg::dump(last, st); |
0 | 433 } |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
434 st->print(","); // Seperate start of new run |
0 | 435 start = last = reg; // Start a new register run |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
436 OptoReg::dump(start, st); // Print register |
0 | 437 } // End of if ending a register run or not |
438 } // End of while regmask not empty | |
439 | |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
440 if (start == last) { // 1-register run; no special printing |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
441 } else if (start+1 == last) { |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
442 st->print(","); // 2-register run; print as "rX,rY" |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
443 OptoReg::dump(last, st); |
0 | 444 } else { // Multi-register run; print as "rX-rZ" |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
445 st->print("-"); |
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
446 OptoReg::dump(last, st); |
0 | 447 } |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
448 if (rm.is_AllStack()) st->print("..."); |
0 | 449 } |
7636
a7114d3d712e
8005055: pass outputStream to more opto debug routines
kvn
parents:
6179
diff
changeset
|
450 st->print("]"); |
0 | 451 } |
452 #endif |