Mercurial > hg > graal-jvmci-8
annotate src/share/vm/opto/postaloc.cpp @ 23054:55d07ec5bde4
8036851: volatile double accesses are not explicitly atomic in C2
Summary: The C2 structure is adapted to distinguish between volatile and non-volatile double accesses.
Reviewed-by: twisti, kvn
Contributed-by: Tobias Hartmann <tobias.hartmann@oracle.com>
author | anoll |
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date | Tue, 06 May 2014 09:17:57 +0200 |
parents | 93c6b977591b |
children | dd9cc155639c |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "memory/allocation.inline.hpp" | |
27 #include "opto/chaitin.hpp" | |
28 #include "opto/machnode.hpp" | |
0 | 29 |
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30 // See if this register (or pairs, or vector) already contains the value. |
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31 static bool register_contains_value(Node* val, OptoReg::Name reg, int n_regs, |
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32 Node_List& value) { |
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33 for (int i = 0; i < n_regs; i++) { |
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34 OptoReg::Name nreg = OptoReg::add(reg,-i); |
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35 if (value[nreg] != val) |
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36 return false; |
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37 } |
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38 return true; |
0 | 39 } |
40 | |
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41 //---------------------------may_be_copy_of_callee----------------------------- |
0 | 42 // Check to see if we can possibly be a copy of a callee-save value. |
43 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const { | |
44 // Short circuit if there are no callee save registers | |
45 if (_matcher.number_of_saved_registers() == 0) return false; | |
46 | |
47 // Expect only a spill-down and reload on exit for callee-save spills. | |
48 // Chains of copies cannot be deep. | |
49 // 5008997 - This is wishful thinking. Register allocator seems to | |
50 // be splitting live ranges for callee save registers to such | |
51 // an extent that in large methods the chains can be very long | |
52 // (50+). The conservative answer is to return true if we don't | |
605 | 53 // know as this prevents optimizations from occurring. |
0 | 54 |
55 const int limit = 60; | |
56 int i; | |
57 for( i=0; i < limit; i++ ) { | |
58 if( def->is_Proj() && def->in(0)->is_Start() && | |
10111 | 59 _matcher.is_save_on_entry(lrgs(_lrg_map.live_range_id(def)).reg())) |
0 | 60 return true; // Direct use of callee-save proj |
61 if( def->is_Copy() ) // Copies carry value through | |
62 def = def->in(def->is_Copy()); | |
63 else if( def->is_Phi() ) // Phis can merge it from any direction | |
64 def = def->in(1); | |
65 else | |
66 break; | |
67 guarantee(def != NULL, "must not resurrect dead copy"); | |
68 } | |
69 // If we reached the end and didn't find a callee save proj | |
70 // then this may be a callee save proj so we return true | |
71 // as the conservative answer. If we didn't reach then end | |
72 // we must have discovered that it was not a callee save | |
73 // else we would have returned. | |
74 return i == limit; | |
75 } | |
76 | |
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77 //------------------------------yank----------------------------------- |
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78 // Helper function for yank_if_dead |
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79 int PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) { |
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80 int blk_adjust=0; |
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81 Block *oldb = _cfg.get_block_for_node(old); |
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82 oldb->find_remove(old); |
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83 // Count 1 if deleting an instruction from the current block |
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84 if (oldb == current_block) { |
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85 blk_adjust++; |
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86 } |
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87 _cfg.unmap_node_from_block(old); |
10111 | 88 OptoReg::Name old_reg = lrgs(_lrg_map.live_range_id(old)).reg(); |
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89 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available? |
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90 value->map(old_reg,NULL); // Yank from value/regnd maps |
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91 regnd->map(old_reg,NULL); // This register's value is now unknown |
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92 } |
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93 return blk_adjust; |
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94 } |
0 | 95 |
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96 #ifdef ASSERT |
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97 static bool expected_yanked_node(Node *old, Node *orig_old) { |
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98 // This code is expected only next original nodes: |
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99 // - load from constant table node which may have next data input nodes: |
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100 // MachConstantBase, MachTemp, MachSpillCopy |
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101 // - Phi nodes that are considered Junk |
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102 // - load constant node which may have next data input nodes: |
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103 // MachTemp, MachSpillCopy |
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104 // - MachSpillCopy |
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105 // - MachProj and Copy dead nodes |
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106 if (old->is_MachSpillCopy()) { |
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107 return true; |
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108 } else if (old->is_Con()) { |
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109 return true; |
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110 } else if (old->is_MachProj()) { // Dead kills projection of Con node |
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111 return (old == orig_old); |
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112 } else if (old->is_Copy()) { // Dead copy of a callee-save value |
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113 return (old == orig_old); |
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114 } else if (old->is_MachTemp()) { |
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115 return orig_old->is_Con(); |
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116 } else if (old->is_Phi()) { // Junk phi's |
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117 return true; |
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118 } else if (old->is_MachConstantBase()) { |
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119 return (orig_old->is_Con() && orig_old->is_MachConstant()); |
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120 } |
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121 return false; |
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122 } |
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123 #endif |
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124 |
0 | 125 //------------------------------yank_if_dead----------------------------------- |
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126 // Removed edges from 'old'. Yank if dead. Return adjustment counts to |
0 | 127 // iterators in the current block. |
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128 int PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block, |
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129 Node_List *value, Node_List *regnd) { |
0 | 130 int blk_adjust=0; |
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131 if (old->outcnt() == 0 && old != C->top()) { |
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132 #ifdef ASSERT |
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133 if (!expected_yanked_node(old, orig_old)) { |
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134 tty->print_cr("=============================================="); |
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135 tty->print_cr("orig_old:"); |
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136 orig_old->dump(); |
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137 tty->print_cr("old:"); |
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138 old->dump(); |
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139 assert(false, "unexpected yanked node"); |
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140 } |
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141 if (old->is_Con()) |
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142 orig_old = old; // Reset to satisfy expected nodes checks. |
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143 #endif |
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144 blk_adjust += yank(old, current_block, value, regnd); |
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145 |
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146 for (uint i = 1; i < old->req(); i++) { |
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147 Node* n = old->in(i); |
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148 if (n != NULL) { |
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149 old->set_req(i, NULL); |
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150 blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd); |
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151 } |
0 | 152 } |
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153 // Disconnect control and remove precedence edges if any exist |
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154 old->disconnect_inputs(NULL, C); |
0 | 155 } |
156 return blk_adjust; | |
157 } | |
158 | |
159 //------------------------------use_prior_register----------------------------- | |
160 // Use the prior value instead of the current value, in an effort to make | |
161 // the current value go dead. Return block iterator adjustment, in case | |
162 // we yank some instructions from this block. | |
163 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) { | |
164 // No effect? | |
165 if( def == n->in(idx) ) return 0; | |
166 // Def is currently dead and can be removed? Do not resurrect | |
167 if( def->outcnt() == 0 ) return 0; | |
168 | |
169 // Not every pair of physical registers are assignment compatible, | |
170 // e.g. on sparc floating point registers are not assignable to integer | |
171 // registers. | |
10111 | 172 const LRG &def_lrg = lrgs(_lrg_map.live_range_id(def)); |
0 | 173 OptoReg::Name def_reg = def_lrg.reg(); |
174 const RegMask &use_mask = n->in_RegMask(idx); | |
175 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0) | |
176 : (use_mask.is_AllStack() != 0)); | |
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177 if (!RegMask::is_vector(def->ideal_reg())) { |
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178 // Check for a copy to or from a misaligned pair. |
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179 // It is workaround for a sparc with misaligned pairs. |
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180 can_use = can_use && !use_mask.is_misaligned_pair() && !def_lrg.mask().is_misaligned_pair(); |
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181 } |
0 | 182 if (!can_use) |
183 return 0; | |
184 | |
185 // Capture the old def in case it goes dead... | |
186 Node *old = n->in(idx); | |
187 | |
188 // Save-on-call copies can only be elided if the entire copy chain can go | |
189 // away, lest we get the same callee-save value alive in 2 locations at | |
190 // once. We check for the obvious trivial case here. Although it can | |
191 // sometimes be elided with cooperation outside our scope, here we will just | |
192 // miss the opportunity. :-( | |
193 if( may_be_copy_of_callee(def) ) { | |
194 if( old->outcnt() > 1 ) return 0; // We're the not last user | |
195 int idx = old->is_Copy(); | |
196 assert( idx, "chain of copies being removed" ); | |
197 Node *old2 = old->in(idx); // Chain of copies | |
198 if( old2->outcnt() > 1 ) return 0; // old is not the last user | |
199 int idx2 = old2->is_Copy(); | |
200 if( !idx2 ) return 0; // Not a chain of 2 copies | |
201 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies | |
202 } | |
203 | |
204 // Use the new def | |
205 n->set_req(idx,def); | |
206 _post_alloc++; | |
207 | |
208 // Is old def now dead? We successfully yanked a copy? | |
209 return yank_if_dead(old,current_block,&value,®nd); | |
210 } | |
211 | |
212 | |
213 //------------------------------skip_copies------------------------------------ | |
214 // Skip through any number of copies (that don't mod oop-i-ness) | |
215 Node *PhaseChaitin::skip_copies( Node *c ) { | |
216 int idx = c->is_Copy(); | |
10111 | 217 uint is_oop = lrgs(_lrg_map.live_range_id(c))._is_oop; |
0 | 218 while (idx != 0) { |
219 guarantee(c->in(idx) != NULL, "must not resurrect dead copy"); | |
10111 | 220 if (lrgs(_lrg_map.live_range_id(c->in(idx)))._is_oop != is_oop) { |
0 | 221 break; // casting copy, not the same value |
10111 | 222 } |
0 | 223 c = c->in(idx); |
224 idx = c->is_Copy(); | |
225 } | |
226 return c; | |
227 } | |
228 | |
229 //------------------------------elide_copy------------------------------------- | |
230 // Remove (bypass) copies along Node n, edge k. | |
231 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) { | |
232 int blk_adjust = 0; | |
233 | |
10111 | 234 uint nk_idx = _lrg_map.live_range_id(n->in(k)); |
235 OptoReg::Name nk_reg = lrgs(nk_idx).reg(); | |
0 | 236 |
237 // Remove obvious same-register copies | |
238 Node *x = n->in(k); | |
239 int idx; | |
240 while( (idx=x->is_Copy()) != 0 ) { | |
241 Node *copy = x->in(idx); | |
242 guarantee(copy != NULL, "must not resurrect dead copy"); | |
10111 | 243 if(lrgs(_lrg_map.live_range_id(copy)).reg() != nk_reg) { |
244 break; | |
245 } | |
0 | 246 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd); |
10111 | 247 if (n->in(k) != copy) { |
248 break; // Failed for some cutout? | |
249 } | |
0 | 250 x = copy; // Progress, try again |
251 } | |
252 | |
253 // Phis and 2-address instructions cannot change registers so easily - their | |
254 // outputs must match their input. | |
255 if( !can_change_regs ) | |
256 return blk_adjust; // Only check stupid copies! | |
257 | |
258 // Loop backedges won't have a value-mapping yet | |
259 if( &value == NULL ) return blk_adjust; | |
260 | |
261 // Skip through all copies to the _value_ being used. Do not change from | |
262 // int to pointer. This attempts to jump through a chain of copies, where | |
263 // intermediate copies might be illegal, i.e., value is stored down to stack | |
264 // then reloaded BUT survives in a register the whole way. | |
265 Node *val = skip_copies(n->in(k)); | |
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266 if (val == x) return blk_adjust; // No progress? |
0 | 267 |
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268 int n_regs = RegMask::num_registers(val->ideal_reg()); |
10111 | 269 uint val_idx = _lrg_map.live_range_id(val); |
0 | 270 OptoReg::Name val_reg = lrgs(val_idx).reg(); |
271 | |
272 // See if it happens to already be in the correct register! | |
273 // (either Phi's direct register, or the common case of the name | |
274 // never-clobbered original-def register) | |
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275 if (register_contains_value(val, val_reg, n_regs, value)) { |
0 | 276 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd); |
277 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying | |
278 return blk_adjust; | |
279 } | |
280 | |
281 // See if we can skip the copy by changing registers. Don't change from | |
282 // using a register to using the stack unless we know we can remove a | |
283 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill | |
284 // ops reading from memory instead of just loading once and using the | |
285 // register. | |
286 | |
287 // Also handle duplicate copies here. | |
288 const Type *t = val->is_Con() ? val->bottom_type() : NULL; | |
289 | |
290 // Scan all registers to see if this value is around already | |
291 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) { | |
400
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292 if (reg == (uint)nk_reg) { |
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293 // Found ourselves so check if there is only one user of this |
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294 // copy and keep on searching for a better copy if so. |
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295 bool ignore_self = true; |
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296 x = n->in(k); |
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297 DUIterator_Fast imax, i = x->fast_outs(imax); |
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298 Node* first = x->fast_out(i); i++; |
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299 while (i < imax && ignore_self) { |
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300 Node* use = x->fast_out(i); i++; |
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301 if (use != first) ignore_self = false; |
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302 } |
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303 if (ignore_self) continue; |
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304 } |
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305 |
0 | 306 Node *vv = value[reg]; |
6185 | 307 if (n_regs > 1) { // Doubles and vectors check for aligned-adjacent set |
308 uint last = (n_regs-1); // Looking for the last part of a set | |
309 if ((reg&last) != last) continue; // Wrong part of a set | |
310 if (!register_contains_value(vv, reg, n_regs, value)) continue; // Different value | |
0 | 311 } |
312 if( vv == val || // Got a direct hit? | |
313 (t && vv && vv->bottom_type() == t && vv->is_Mach() && | |
314 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant? | |
315 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" ); | |
316 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR | |
317 OptoReg::is_reg(reg) || // turning into a register use OR | |
318 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use | |
319 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd); | |
320 if( n->in(k) == regnd[reg] ) // Success! Quit trying | |
321 return blk_adjust; | |
322 } // End of if not degrading to a stack | |
323 } // End of if found value in another register | |
324 } // End of scan all machine registers | |
325 return blk_adjust; | |
326 } | |
327 | |
328 | |
329 // | |
330 // Check if nreg already contains the constant value val. Normal copy | |
331 // elimination doesn't doesn't work on constants because multiple | |
332 // nodes can represent the same constant so the type and rule of the | |
333 // MachNode must be checked to ensure equivalence. | |
334 // | |
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335 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n, |
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336 Block *current_block, |
0 | 337 Node_List& value, Node_List& regnd, |
338 OptoReg::Name nreg, OptoReg::Name nreg2) { | |
339 if (value[nreg] != val && val->is_Con() && | |
340 value[nreg] != NULL && value[nreg]->is_Con() && | |
341 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) && | |
342 value[nreg]->bottom_type() == val->bottom_type() && | |
343 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) { | |
344 // This code assumes that two MachNodes representing constants | |
345 // which have the same rule and the same bottom type will produce | |
346 // identical effects into a register. This seems like it must be | |
347 // objectively true unless there are hidden inputs to the nodes | |
348 // but if that were to change this code would need to updated. | |
349 // Since they are equivalent the second one if redundant and can | |
350 // be removed. | |
351 // | |
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352 // n will be replaced with the old value but n might have |
0 | 353 // kills projections associated with it so remove them now so that |
605 | 354 // yank_if_dead will be able to eliminate the copy once the uses |
0 | 355 // have been transferred to the old[value]. |
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356 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { |
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357 Node* use = n->fast_out(i); |
0 | 358 if (use->is_Proj() && use->outcnt() == 0) { |
359 // Kill projections have no users and one input | |
360 use->set_req(0, C->top()); | |
361 yank_if_dead(use, current_block, &value, ®nd); | |
362 --i; --imax; | |
363 } | |
364 } | |
365 _post_alloc++; | |
366 return true; | |
367 } | |
368 return false; | |
369 } | |
370 | |
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371 // The algorithms works as follows: |
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372 // We traverse the block top to bottom. possibly_merge_multidef() is invoked for every input edge k |
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373 // of the instruction n. We check to see if the input is a multidef lrg. If it is, we record the fact that we've |
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374 // seen a definition (coming as an input) and add that fact to the reg2defuse array. The array maps registers to their |
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375 // current reaching definitions (we track only multidefs though). With each definition we also associate the first |
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376 // instruction we saw use it. If we encounter the situation when we observe an def (an input) that is a part of the |
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377 // same lrg but is different from the previous seen def we merge the two with a MachMerge node and substitute |
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378 // all the uses that we've seen so far to use the merge. After that we keep replacing the new defs in the same lrg |
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379 // as they get encountered with the merge node and keep adding these defs to the merge inputs. |
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380 void PhaseChaitin::merge_multidefs() { |
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381 NOT_PRODUCT( Compile::TracePhase t3("mergeMultidefs", &_t_mergeMultidefs, TimeCompiler); ) |
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382 ResourceMark rm; |
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383 // Keep track of the defs seen in registers and collect their uses in the block. |
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384 RegToDefUseMap reg2defuse(_max_reg, _max_reg, RegDefUse()); |
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385 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
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386 Block* block = _cfg.get_block(i); |
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387 for (uint j = 1; j < block->number_of_nodes(); j++) { |
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388 Node* n = block->get_node(j); |
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389 if (n->is_Phi()) continue; |
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390 for (uint k = 1; k < n->req(); k++) { |
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391 j += possibly_merge_multidef(n, k, block, reg2defuse); |
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392 } |
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393 // Null out the value produced by the instruction itself, since we're only interested in defs |
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394 // implicitly defined by the uses. We are actually interested in tracking only redefinitions |
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395 // of the multidef lrgs in the same register. For that matter it's enough to track changes in |
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396 // the base register only and ignore other effects of multi-register lrgs and fat projections. |
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397 // It is also ok to ignore defs coming from singledefs. After an implicit overwrite by one of |
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398 // those our register is guaranteed to be used by another lrg and we won't attempt to merge it. |
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399 uint lrg = _lrg_map.live_range_id(n); |
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400 if (lrg > 0 && lrgs(lrg).is_multidef()) { |
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401 OptoReg::Name reg = lrgs(lrg).reg(); |
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402 reg2defuse.at(reg).clear(); |
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403 } |
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404 } |
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405 // Clear reg->def->use tracking for the next block |
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406 for (int j = 0; j < reg2defuse.length(); j++) { |
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407 reg2defuse.at(j).clear(); |
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408 } |
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409 } |
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410 } |
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411 |
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412 int PhaseChaitin::possibly_merge_multidef(Node *n, uint k, Block *block, RegToDefUseMap& reg2defuse) { |
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413 int blk_adjust = 0; |
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414 |
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415 uint lrg = _lrg_map.live_range_id(n->in(k)); |
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416 if (lrg > 0 && lrgs(lrg).is_multidef()) { |
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417 OptoReg::Name reg = lrgs(lrg).reg(); |
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418 |
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419 Node* def = reg2defuse.at(reg).def(); |
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420 if (def != NULL && lrg == _lrg_map.live_range_id(def) && def != n->in(k)) { |
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421 // Same lrg but different node, we have to merge. |
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422 MachMergeNode* merge; |
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423 if (def->is_MachMerge()) { // is it already a merge? |
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424 merge = def->as_MachMerge(); |
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425 } else { |
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426 merge = new (C) MachMergeNode(def); |
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427 |
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428 // Insert the merge node into the block before the first use. |
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429 uint use_index = block->find_node(reg2defuse.at(reg).first_use()); |
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430 block->insert_node(merge, use_index++); |
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431 _cfg.map_node_to_block(merge, block); |
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432 |
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433 // Let the allocator know about the new node, use the same lrg |
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434 _lrg_map.extend(merge->_idx, lrg); |
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435 blk_adjust++; |
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436 |
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437 // Fixup all the uses (there is at least one) that happened between the first |
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438 // use and before the current one. |
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439 for (; use_index < block->number_of_nodes(); use_index++) { |
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440 Node* use = block->get_node(use_index); |
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441 if (use == n) { |
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442 break; |
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443 } |
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444 use->replace_edge(def, merge); |
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445 } |
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446 } |
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447 if (merge->find_edge(n->in(k)) == -1) { |
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448 merge->add_req(n->in(k)); |
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449 } |
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450 n->set_req(k, merge); |
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451 } |
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452 |
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453 // update the uses |
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454 reg2defuse.at(reg).update(n->in(k), n); |
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455 } |
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456 |
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457 return blk_adjust; |
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458 } |
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459 |
0 | 460 |
461 //------------------------------post_allocate_copy_removal--------------------- | |
462 // Post-Allocation peephole copy removal. We do this in 1 pass over the | |
463 // basic blocks. We maintain a mapping of registers to Nodes (an array of | |
464 // Nodes indexed by machine register or stack slot number). NULL means that a | |
465 // register is not mapped to any Node. We can (want to have!) have several | |
466 // registers map to the same Node. We walk forward over the instructions | |
467 // updating the mapping as we go. At merge points we force a NULL if we have | |
468 // to merge 2 different Nodes into the same register. Phi functions will give | |
469 // us a new Node if there is a proper value merging. Since the blocks are | |
470 // arranged in some RPO, we will visit all parent blocks before visiting any | |
471 // successor blocks (except at loops). | |
472 // | |
473 // If we find a Copy we look to see if the Copy's source register is a stack | |
474 // slot and that value has already been loaded into some machine register; if | |
475 // so we use machine register directly. This turns a Load into a reg-reg | |
476 // Move. We also look for reloads of identical constants. | |
477 // | |
478 // When we see a use from a reg-reg Copy, we will attempt to use the copy's | |
479 // source directly and make the copy go dead. | |
480 void PhaseChaitin::post_allocate_copy_removal() { | |
481 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); ) | |
482 ResourceMark rm; | |
483 | |
484 // Need a mapping from basic block Node_Lists. We need a Node_List to | |
485 // map from register number to value-producing Node. | |
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486 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg.number_of_blocks() + 1); |
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487 memset(blk2value, 0, sizeof(Node_List*) * (_cfg.number_of_blocks() + 1)); |
0 | 488 // Need a mapping from basic block Node_Lists. We need a Node_List to |
489 // map from register number to register-defining Node. | |
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490 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg.number_of_blocks() + 1); |
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491 memset(blk2regnd, 0, sizeof(Node_List*) * (_cfg.number_of_blocks() + 1)); |
0 | 492 |
493 // We keep unused Node_Lists on a free_list to avoid wasting | |
494 // memory. | |
495 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16); | |
496 | |
497 // For all blocks | |
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498 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
0 | 499 uint j; |
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500 Block* block = _cfg.get_block(i); |
0 | 501 |
502 // Count of Phis in block | |
503 uint phi_dex; | |
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504 for (phi_dex = 1; phi_dex < block->number_of_nodes(); phi_dex++) { |
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505 Node* phi = block->get_node(phi_dex); |
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506 if (!phi->is_Phi()) { |
0 | 507 break; |
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508 } |
0 | 509 } |
510 | |
511 // If any predecessor has not been visited, we do not know the state | |
512 // of registers at the start. Check for this, while updating copies | |
513 // along Phi input edges | |
514 bool missing_some_inputs = false; | |
515 Block *freed = NULL; | |
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516 for (j = 1; j < block->num_preds(); j++) { |
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517 Block* pb = _cfg.get_block_for_node(block->pred(j)); |
0 | 518 // Remove copies along phi edges |
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519 for (uint k = 1; k < phi_dex; k++) { |
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520 elide_copy(block->get_node(k), j, block, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false); |
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521 } |
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522 if (blk2value[pb->_pre_order]) { // Have a mapping on this edge? |
0 | 523 // See if this predecessor's mappings have been used by everybody |
524 // who wants them. If so, free 'em. | |
525 uint k; | |
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526 for (k = 0; k < pb->_num_succs; k++) { |
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527 Block* pbsucc = pb->_succs[k]; |
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528 if (!blk2value[pbsucc->_pre_order] && pbsucc != block) { |
0 | 529 break; // Found a future user |
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530 } |
0 | 531 } |
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532 if (k >= pb->_num_succs) { // No more uses, free! |
0 | 533 freed = pb; // Record last block freed |
534 free_list.push(blk2value[pb->_pre_order]); | |
535 free_list.push(blk2regnd[pb->_pre_order]); | |
536 } | |
537 } else { // This block has unvisited (loopback) inputs | |
538 missing_some_inputs = true; | |
539 } | |
540 } | |
541 | |
542 | |
543 // Extract Node_List mappings. If 'freed' is non-zero, we just popped | |
544 // 'freed's blocks off the list | |
545 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop()); | |
546 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop()); | |
547 assert( !freed || blk2value[freed->_pre_order] == &value, "" ); | |
548 value.map(_max_reg,NULL); | |
549 regnd.map(_max_reg,NULL); | |
550 // Set mappings as OUR mappings | |
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551 blk2value[block->_pre_order] = &value; |
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552 blk2regnd[block->_pre_order] = ®nd; |
0 | 553 |
554 // Initialize value & regnd for this block | |
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555 if (missing_some_inputs) { |
0 | 556 // Some predecessor has not yet been visited; zap map to empty |
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557 for (uint k = 0; k < (uint)_max_reg; k++) { |
0 | 558 value.map(k,NULL); |
559 regnd.map(k,NULL); | |
560 } | |
561 } else { | |
562 if( !freed ) { // Didn't get a freebie prior block | |
563 // Must clone some data | |
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564 freed = _cfg.get_block_for_node(block->pred(1)); |
0 | 565 Node_List &f_value = *blk2value[freed->_pre_order]; |
566 Node_List &f_regnd = *blk2regnd[freed->_pre_order]; | |
567 for( uint k = 0; k < (uint)_max_reg; k++ ) { | |
568 value.map(k,f_value[k]); | |
569 regnd.map(k,f_regnd[k]); | |
570 } | |
571 } | |
572 // Merge all inputs together, setting to NULL any conflicts. | |
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573 for (j = 1; j < block->num_preds(); j++) { |
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574 Block* pb = _cfg.get_block_for_node(block->pred(j)); |
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575 if (pb == freed) { |
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576 continue; // Did self already via freelist |
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577 } |
0 | 578 Node_List &p_regnd = *blk2regnd[pb->_pre_order]; |
579 for( uint k = 0; k < (uint)_max_reg; k++ ) { | |
580 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs? | |
581 value.map(k,NULL); // Then no value handy | |
582 regnd.map(k,NULL); | |
583 } | |
584 } | |
585 } | |
586 } | |
587 | |
588 // For all Phi's | |
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589 for (j = 1; j < phi_dex; j++) { |
0 | 590 uint k; |
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591 Node *phi = block->get_node(j); |
10111 | 592 uint pidx = _lrg_map.live_range_id(phi); |
593 OptoReg::Name preg = lrgs(_lrg_map.live_range_id(phi)).reg(); | |
0 | 594 |
595 // Remove copies remaining on edges. Check for junk phi. | |
596 Node *u = NULL; | |
10111 | 597 for (k = 1; k < phi->req(); k++) { |
0 | 598 Node *x = phi->in(k); |
599 if( phi != x && u != x ) // Found a different input | |
600 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input | |
601 } | |
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602 if (u != NodeSentinel) { // Junk Phi. Remove |
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603 phi->replace_by(u); |
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604 j -= yank_if_dead(phi, block, &value, ®nd); |
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605 phi_dex--; |
0 | 606 continue; |
607 } | |
608 // Note that if value[pidx] exists, then we merged no new values here | |
609 // and the phi is useless. This can happen even with the above phi | |
610 // removal for complex flows. I cannot keep the better known value here | |
611 // because locally the phi appears to define a new merged value. If I | |
612 // keep the better value then a copy of the phi, being unable to use the | |
613 // global flow analysis, can't "peek through" the phi to the original | |
614 // reaching value and so will act like it's defining a new value. This | |
615 // can lead to situations where some uses are from the old and some from | |
616 // the new values. Not illegal by itself but throws the over-strong | |
617 // assert in scheduling. | |
618 if( pidx ) { | |
619 value.map(preg,phi); | |
620 regnd.map(preg,phi); | |
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621 int n_regs = RegMask::num_registers(phi->ideal_reg()); |
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622 for (int l = 1; l < n_regs; l++) { |
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623 OptoReg::Name preg_lo = OptoReg::add(preg,-l); |
0 | 624 value.map(preg_lo,phi); |
625 regnd.map(preg_lo,phi); | |
626 } | |
627 } | |
628 } | |
629 | |
630 // For all remaining instructions | |
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631 for (j = phi_dex; j < block->number_of_nodes(); j++) { |
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632 Node* n = block->get_node(j); |
0 | 633 |
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634 if(n->outcnt() == 0 && // Dead? |
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635 n != C->top() && // (ignore TOP, it has no du info) |
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636 !n->is_Proj() ) { // fat-proj kills |
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637 j -= yank_if_dead(n, block, &value, ®nd); |
0 | 638 continue; |
639 } | |
640 | |
641 // Improve reaching-def info. Occasionally post-alloc's liveness gives | |
642 // up (at loop backedges, because we aren't doing a full flow pass). | |
643 // The presence of a live use essentially asserts that the use's def is | |
644 // alive and well at the use (or else the allocator fubar'd). Take | |
645 // advantage of this info to set a reaching def for the use-reg. | |
646 uint k; | |
10111 | 647 for (k = 1; k < n->req(); k++) { |
0 | 648 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE |
649 guarantee(def != NULL, "no disconnected nodes at this point"); | |
10111 | 650 uint useidx = _lrg_map.live_range_id(def); // useidx is the live range index for this USE |
0 | 651 |
652 if( useidx ) { | |
653 OptoReg::Name ureg = lrgs(useidx).reg(); | |
654 if( !value[ureg] ) { | |
655 int idx; // Skip occasional useless copy | |
656 while( (idx=def->is_Copy()) != 0 && | |
657 def->in(idx) != NULL && // NULL should not happen | |
10111 | 658 ureg == lrgs(_lrg_map.live_range_id(def->in(idx))).reg()) |
0 | 659 def = def->in(idx); |
660 Node *valdef = skip_copies(def); // tighten up val through non-useless copies | |
661 value.map(ureg,valdef); // record improved reaching-def info | |
662 regnd.map(ureg, def); | |
663 // Record other half of doubles | |
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664 uint def_ideal_reg = def->ideal_reg(); |
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665 int n_regs = RegMask::num_registers(def_ideal_reg); |
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666 for (int l = 1; l < n_regs; l++) { |
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667 OptoReg::Name ureg_lo = OptoReg::add(ureg,-l); |
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668 if (!value[ureg_lo] && |
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669 (!RegMask::can_represent(ureg_lo) || |
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670 lrgs(useidx).mask().Member(ureg_lo))) { // Nearly always adjacent |
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671 value.map(ureg_lo,valdef); // record improved reaching-def info |
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672 regnd.map(ureg_lo, def); |
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673 } |
0 | 674 } |
675 } | |
676 } | |
677 } | |
678 | |
679 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0; | |
680 | |
681 // Remove copies along input edges | |
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682 for (k = 1; k < n->req(); k++) { |
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683 j -= elide_copy(n, k, block, value, regnd, two_adr != k); |
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684 } |
0 | 685 |
686 // Unallocated Nodes define no registers | |
10111 | 687 uint lidx = _lrg_map.live_range_id(n); |
688 if (!lidx) { | |
689 continue; | |
690 } | |
0 | 691 |
692 // Update the register defined by this instruction | |
693 OptoReg::Name nreg = lrgs(lidx).reg(); | |
694 // Skip through all copies to the _value_ being defined. | |
695 // Do not change from int to pointer | |
696 Node *val = skip_copies(n); | |
697 | |
923 | 698 // Clear out a dead definition before starting so that the |
699 // elimination code doesn't have to guard against it. The | |
700 // definition could in fact be a kill projection with a count of | |
701 // 0 which is safe but since those are uninteresting for copy | |
702 // elimination just delete them as well. | |
703 if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) { | |
704 regnd.map(nreg, NULL); | |
705 value.map(nreg, NULL); | |
706 } | |
707 | |
0 | 708 uint n_ideal_reg = n->ideal_reg(); |
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709 int n_regs = RegMask::num_registers(n_ideal_reg); |
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710 if (n_regs == 1) { |
0 | 711 // If Node 'n' does not change the value mapped by the register, |
712 // then 'n' is a useless copy. Do not update the register->node | |
713 // mapping so 'n' will go dead. | |
714 if( value[nreg] != val ) { | |
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715 if (eliminate_copy_of_constant(val, n, block, value, regnd, nreg, OptoReg::Bad)) { |
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716 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
0 | 717 } else { |
718 // Update the mapping: record new Node defined by the register | |
719 regnd.map(nreg,n); | |
720 // Update mapping for defined *value*, which is the defined | |
721 // Node after skipping all copies. | |
722 value.map(nreg,val); | |
723 } | |
923 | 724 } else if( !may_be_copy_of_callee(n) ) { |
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725 assert(n->is_Copy(), ""); |
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726 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
0 | 727 } |
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728 } else if (RegMask::is_vector(n_ideal_reg)) { |
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729 // If Node 'n' does not change the value mapped by the register, |
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730 // then 'n' is a useless copy. Do not update the register->node |
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731 // mapping so 'n' will go dead. |
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732 if (!register_contains_value(val, nreg, n_regs, value)) { |
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733 // Update the mapping: record new Node defined by the register |
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734 regnd.map(nreg,n); |
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735 // Update mapping for defined *value*, which is the defined |
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736 // Node after skipping all copies. |
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737 value.map(nreg,val); |
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738 for (int l = 1; l < n_regs; l++) { |
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739 OptoReg::Name nreg_lo = OptoReg::add(nreg,-l); |
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740 regnd.map(nreg_lo, n ); |
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741 value.map(nreg_lo,val); |
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742 } |
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743 } else if (n->is_Copy()) { |
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744 // Note: vector can't be constant and can't be copy of calee. |
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745 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
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746 } |
0 | 747 } else { |
748 // If the value occupies a register pair, record same info | |
749 // in both registers. | |
750 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1); | |
751 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or | |
752 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent | |
753 // Sparc occasionally has non-adjacent pairs. | |
754 // Find the actual other value | |
755 RegMask tmp = lrgs(lidx).mask(); | |
756 tmp.Remove(nreg); | |
757 nreg_lo = tmp.find_first_elem(); | |
758 } | |
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759 if (value[nreg] != val || value[nreg_lo] != val) { |
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760 if (eliminate_copy_of_constant(val, n, block, value, regnd, nreg, nreg_lo)) { |
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761 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
0 | 762 } else { |
763 regnd.map(nreg , n ); | |
764 regnd.map(nreg_lo, n ); | |
765 value.map(nreg ,val); | |
766 value.map(nreg_lo,val); | |
767 } | |
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768 } else if (!may_be_copy_of_callee(n)) { |
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769 assert(n->is_Copy(), ""); |
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770 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
0 | 771 } |
772 } | |
773 | |
774 // Fat projections kill many registers | |
775 if( n_ideal_reg == MachProjNode::fat_proj ) { | |
776 RegMask rm = n->out_RegMask(); | |
777 // wow, what an expensive iterator... | |
778 nreg = rm.find_first_elem(); | |
779 while( OptoReg::is_valid(nreg)) { | |
780 rm.Remove(nreg); | |
781 value.map(nreg,n); | |
782 regnd.map(nreg,n); | |
783 nreg = rm.find_first_elem(); | |
784 } | |
785 } | |
786 | |
787 } // End of for all instructions in the block | |
788 | |
789 } // End for all blocks | |
790 } |