Mercurial > hg > graal-jvmci-8
annotate src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @ 344:6aae2f9d0294
Merge
| author | ysr |
|---|---|
| date | Thu, 12 Jun 2008 13:50:55 -0700 |
| parents | 37f87013dfd8 |
| children | 1ee8caae33af |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 2 * Copyright 2005-2006 Sun Microsystems, Inc. All Rights Reserved. | |
| 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
| 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 21 * have any questions. | |
| 22 * | |
| 23 */ | |
| 24 | |
| 25 # include "incls/_precompiled.incl" | |
| 26 # include "incls/_c1_LIRGenerator_x86.cpp.incl" | |
| 27 | |
| 28 #ifdef ASSERT | |
| 29 #define __ gen()->lir(__FILE__, __LINE__)-> | |
| 30 #else | |
| 31 #define __ gen()->lir()-> | |
| 32 #endif | |
| 33 | |
| 34 // Item will be loaded into a byte register; Intel only | |
| 35 void LIRItem::load_byte_item() { | |
| 36 load_item(); | |
| 37 LIR_Opr res = result(); | |
| 38 | |
| 39 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { | |
| 40 // make sure that it is a byte register | |
| 41 assert(!value()->type()->is_float() && !value()->type()->is_double(), | |
| 42 "can't load floats in byte register"); | |
| 43 LIR_Opr reg = _gen->rlock_byte(T_BYTE); | |
| 44 __ move(res, reg); | |
| 45 | |
| 46 _result = reg; | |
| 47 } | |
| 48 } | |
| 49 | |
| 50 | |
| 51 void LIRItem::load_nonconstant() { | |
| 52 LIR_Opr r = value()->operand(); | |
| 53 if (r->is_constant()) { | |
| 54 _result = r; | |
| 55 } else { | |
| 56 load_item(); | |
| 57 } | |
| 58 } | |
| 59 | |
| 60 //-------------------------------------------------------------- | |
| 61 // LIRGenerator | |
| 62 //-------------------------------------------------------------- | |
| 63 | |
| 64 | |
| 65 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } | |
| 66 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } | |
| 67 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } | |
| 68 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } | |
| 69 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } | |
| 70 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } | |
| 71 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } | |
| 72 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } | |
| 73 | |
| 74 | |
| 75 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { | |
| 76 LIR_Opr opr; | |
| 77 switch (type->tag()) { | |
| 78 case intTag: opr = FrameMap::rax_opr; break; | |
| 79 case objectTag: opr = FrameMap::rax_oop_opr; break; | |
| 80 case longTag: opr = FrameMap::rax_rdx_long_opr; break; | |
| 81 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; | |
| 82 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; | |
| 83 | |
| 84 case addressTag: | |
| 85 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; | |
| 86 } | |
| 87 | |
| 88 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); | |
| 89 return opr; | |
| 90 } | |
| 91 | |
| 92 | |
| 93 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { | |
| 94 LIR_Opr reg = new_register(T_INT); | |
| 95 set_vreg_flag(reg, LIRGenerator::byte_reg); | |
| 96 return reg; | |
| 97 } | |
| 98 | |
| 99 | |
| 100 //--------- loading items into registers -------------------------------- | |
| 101 | |
| 102 | |
| 103 // i486 instructions can inline constants | |
| 104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { | |
| 105 if (type == T_SHORT || type == T_CHAR) { | |
| 106 // there is no immediate move of word values in asembler_i486.?pp | |
| 107 return false; | |
| 108 } | |
| 109 Constant* c = v->as_Constant(); | |
| 110 if (c && c->state() == NULL) { | |
| 111 // constants of any type can be stored directly, except for | |
| 112 // unloaded object constants. | |
| 113 return true; | |
| 114 } | |
| 115 return false; | |
| 116 } | |
| 117 | |
| 118 | |
| 119 bool LIRGenerator::can_inline_as_constant(Value v) const { | |
| 120 return v->type()->tag() != objectTag || | |
| 121 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); | |
| 122 } | |
| 123 | |
| 124 | |
| 125 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { | |
| 126 return c->type() != T_OBJECT || c->as_jobject() == NULL; | |
| 127 } | |
| 128 | |
| 129 | |
| 130 LIR_Opr LIRGenerator::safepoint_poll_register() { | |
| 131 return LIR_OprFact::illegalOpr; | |
| 132 } | |
| 133 | |
| 134 | |
| 135 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, | |
| 136 int shift, int disp, BasicType type) { | |
| 137 assert(base->is_register(), "must be"); | |
| 138 if (index->is_constant()) { | |
| 139 return new LIR_Address(base, | |
| 140 (index->as_constant_ptr()->as_jint() << shift) + disp, | |
| 141 type); | |
| 142 } else { | |
| 143 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); | |
| 144 } | |
| 145 } | |
| 146 | |
| 147 | |
| 148 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, | |
| 149 BasicType type, bool needs_card_mark) { | |
| 150 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); | |
| 151 | |
| 152 LIR_Address* addr; | |
| 153 if (index_opr->is_constant()) { | |
|
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154 int elem_size = type2aelembytes(type); |
| 0 | 155 addr = new LIR_Address(array_opr, |
| 156 offset_in_bytes + index_opr->as_jint() * elem_size, type); | |
| 157 } else { | |
| 158 addr = new LIR_Address(array_opr, | |
| 159 index_opr, | |
| 160 LIR_Address::scale(type), | |
| 161 offset_in_bytes, type); | |
| 162 } | |
| 163 if (needs_card_mark) { | |
| 164 // This store will need a precise card mark, so go ahead and | |
| 165 // compute the full adddres instead of computing once for the | |
| 166 // store and again for the card mark. | |
| 167 LIR_Opr tmp = new_register(T_INT); | |
| 168 __ leal(LIR_OprFact::address(addr), tmp); | |
| 169 return new LIR_Address(tmp, 0, type); | |
| 170 } else { | |
| 171 return addr; | |
| 172 } | |
| 173 } | |
| 174 | |
| 175 | |
| 176 void LIRGenerator::increment_counter(address counter, int step) { | |
| 177 LIR_Opr temp = new_register(T_INT); | |
| 178 LIR_Opr pointer = new_register(T_INT); | |
| 179 __ move(LIR_OprFact::intConst((int)counter), pointer); | |
| 180 LIR_Address* addr = new LIR_Address(pointer, 0, T_INT); | |
| 181 increment_counter(addr, step); | |
| 182 } | |
| 183 | |
| 184 | |
| 185 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { | |
| 186 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); | |
| 187 } | |
| 188 | |
| 189 | |
| 190 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
| 191 __ cmp_mem_int(condition, base, disp, c, info); | |
| 192 } | |
| 193 | |
| 194 | |
| 195 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { | |
| 196 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
| 197 } | |
| 198 | |
| 199 | |
| 200 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { | |
| 201 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
| 202 } | |
| 203 | |
| 204 | |
| 205 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { | |
| 206 if (tmp->is_valid()) { | |
| 207 if (is_power_of_2(c + 1)) { | |
| 208 __ move(left, tmp); | |
| 209 __ shift_left(left, log2_intptr(c + 1), left); | |
| 210 __ sub(left, tmp, result); | |
| 211 return true; | |
| 212 } else if (is_power_of_2(c - 1)) { | |
| 213 __ move(left, tmp); | |
| 214 __ shift_left(left, log2_intptr(c - 1), left); | |
| 215 __ add(left, tmp, result); | |
| 216 return true; | |
| 217 } | |
| 218 } | |
| 219 return false; | |
| 220 } | |
| 221 | |
| 222 | |
| 223 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { | |
| 224 BasicType type = item->type(); | |
| 225 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); | |
| 226 } | |
| 227 | |
| 228 //---------------------------------------------------------------------- | |
| 229 // visitor functions | |
| 230 //---------------------------------------------------------------------- | |
| 231 | |
| 232 | |
| 233 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { | |
| 234 assert(x->is_root(),""); | |
| 235 bool needs_range_check = true; | |
| 236 bool use_length = x->length() != NULL; | |
| 237 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; | |
| 238 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || | |
| 239 !get_jobject_constant(x->value())->is_null_object()); | |
| 240 | |
| 241 LIRItem array(x->array(), this); | |
| 242 LIRItem index(x->index(), this); | |
| 243 LIRItem value(x->value(), this); | |
| 244 LIRItem length(this); | |
| 245 | |
| 246 array.load_item(); | |
| 247 index.load_nonconstant(); | |
| 248 | |
| 249 if (use_length) { | |
| 250 needs_range_check = x->compute_needs_range_check(); | |
| 251 if (needs_range_check) { | |
| 252 length.set_instruction(x->length()); | |
| 253 length.load_item(); | |
| 254 } | |
| 255 } | |
| 256 if (needs_store_check) { | |
| 257 value.load_item(); | |
| 258 } else { | |
| 259 value.load_for_store(x->elt_type()); | |
| 260 } | |
| 261 | |
| 262 set_no_result(x); | |
| 263 | |
| 264 // the CodeEmitInfo must be duplicated for each different | |
| 265 // LIR-instruction because spilling can occur anywhere between two | |
| 266 // instructions and so the debug information must be different | |
| 267 CodeEmitInfo* range_check_info = state_for(x); | |
| 268 CodeEmitInfo* null_check_info = NULL; | |
| 269 if (x->needs_null_check()) { | |
| 270 null_check_info = new CodeEmitInfo(range_check_info); | |
| 271 } | |
| 272 | |
| 273 // emit array address setup early so it schedules better | |
| 274 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); | |
| 275 | |
| 276 if (GenerateRangeChecks && needs_range_check) { | |
| 277 if (use_length) { | |
| 278 __ cmp(lir_cond_belowEqual, length.result(), index.result()); | |
| 279 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); | |
| 280 } else { | |
| 281 array_range_check(array.result(), index.result(), null_check_info, range_check_info); | |
| 282 // range_check also does the null check | |
| 283 null_check_info = NULL; | |
| 284 } | |
| 285 } | |
| 286 | |
| 287 if (GenerateArrayStoreCheck && needs_store_check) { | |
| 288 LIR_Opr tmp1 = new_register(objectType); | |
| 289 LIR_Opr tmp2 = new_register(objectType); | |
| 290 LIR_Opr tmp3 = new_register(objectType); | |
| 291 | |
| 292 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); | |
| 293 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info); | |
| 294 } | |
| 295 | |
| 296 if (obj_store) { | |
|
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297 // Needs GC write barriers. |
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298 pre_barrier(LIR_OprFact::address(array_addr), false, NULL); |
| 0 | 299 __ move(value.result(), array_addr, null_check_info); |
| 300 // Seems to be a precise | |
| 301 post_barrier(LIR_OprFact::address(array_addr), value.result()); | |
| 302 } else { | |
| 303 __ move(value.result(), array_addr, null_check_info); | |
| 304 } | |
| 305 } | |
| 306 | |
| 307 | |
| 308 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { | |
| 309 assert(x->is_root(),""); | |
| 310 LIRItem obj(x->obj(), this); | |
| 311 obj.load_item(); | |
| 312 | |
| 313 set_no_result(x); | |
| 314 | |
| 315 // "lock" stores the address of the monitor stack slot, so this is not an oop | |
| 316 LIR_Opr lock = new_register(T_INT); | |
| 317 // Need a scratch register for biased locking on x86 | |
| 318 LIR_Opr scratch = LIR_OprFact::illegalOpr; | |
| 319 if (UseBiasedLocking) { | |
| 320 scratch = new_register(T_INT); | |
| 321 } | |
| 322 | |
| 323 CodeEmitInfo* info_for_exception = NULL; | |
| 324 if (x->needs_null_check()) { | |
| 325 info_for_exception = state_for(x, x->lock_stack_before()); | |
| 326 } | |
| 327 // this CodeEmitInfo must not have the xhandlers because here the | |
| 328 // object is already locked (xhandlers expect object to be unlocked) | |
| 329 CodeEmitInfo* info = state_for(x, x->state(), true); | |
| 330 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, | |
| 331 x->monitor_no(), info_for_exception, info); | |
| 332 } | |
| 333 | |
| 334 | |
| 335 void LIRGenerator::do_MonitorExit(MonitorExit* x) { | |
| 336 assert(x->is_root(),""); | |
| 337 | |
| 338 LIRItem obj(x->obj(), this); | |
| 339 obj.dont_load_item(); | |
| 340 | |
| 341 LIR_Opr lock = new_register(T_INT); | |
| 342 LIR_Opr obj_temp = new_register(T_INT); | |
| 343 set_no_result(x); | |
| 344 monitor_exit(obj_temp, lock, syncTempOpr(), x->monitor_no()); | |
| 345 } | |
| 346 | |
| 347 | |
| 348 // _ineg, _lneg, _fneg, _dneg | |
| 349 void LIRGenerator::do_NegateOp(NegateOp* x) { | |
| 350 LIRItem value(x->x(), this); | |
| 351 value.set_destroys_register(); | |
| 352 value.load_item(); | |
| 353 LIR_Opr reg = rlock(x); | |
| 354 __ negate(value.result(), reg); | |
| 355 | |
| 356 set_result(x, round_item(reg)); | |
| 357 } | |
| 358 | |
| 359 | |
| 360 // for _fadd, _fmul, _fsub, _fdiv, _frem | |
| 361 // _dadd, _dmul, _dsub, _ddiv, _drem | |
| 362 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { | |
| 363 LIRItem left(x->x(), this); | |
| 364 LIRItem right(x->y(), this); | |
| 365 LIRItem* left_arg = &left; | |
| 366 LIRItem* right_arg = &right; | |
| 367 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); | |
| 368 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); | |
| 369 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { | |
| 370 left.load_item(); | |
| 371 } else { | |
| 372 left.dont_load_item(); | |
| 373 } | |
| 374 | |
| 375 // do not load right operand if it is a constant. only 0 and 1 are | |
| 376 // loaded because there are special instructions for loading them | |
| 377 // without memory access (not needed for SSE2 instructions) | |
| 378 bool must_load_right = false; | |
| 379 if (right.is_constant()) { | |
| 380 LIR_Const* c = right.result()->as_constant_ptr(); | |
| 381 assert(c != NULL, "invalid constant"); | |
| 382 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); | |
| 383 | |
| 384 if (c->type() == T_FLOAT) { | |
| 385 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); | |
| 386 } else { | |
| 387 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); | |
| 388 } | |
| 389 } | |
| 390 | |
| 391 if (must_load_both) { | |
| 392 // frem and drem destroy also right operand, so move it to a new register | |
| 393 right.set_destroys_register(); | |
| 394 right.load_item(); | |
| 395 } else if (right.is_register() || must_load_right) { | |
| 396 right.load_item(); | |
| 397 } else { | |
| 398 right.dont_load_item(); | |
| 399 } | |
| 400 LIR_Opr reg = rlock(x); | |
| 401 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
| 402 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { | |
| 403 tmp = new_register(T_DOUBLE); | |
| 404 } | |
| 405 | |
| 406 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { | |
| 407 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots | |
| 408 LIR_Opr fpu0, fpu1; | |
| 409 if (x->op() == Bytecodes::_frem) { | |
| 410 fpu0 = LIR_OprFact::single_fpu(0); | |
| 411 fpu1 = LIR_OprFact::single_fpu(1); | |
| 412 } else { | |
| 413 fpu0 = LIR_OprFact::double_fpu(0); | |
| 414 fpu1 = LIR_OprFact::double_fpu(1); | |
| 415 } | |
| 416 __ move(right.result(), fpu1); // order of left and right operand is important! | |
| 417 __ move(left.result(), fpu0); | |
| 418 __ rem (fpu0, fpu1, fpu0); | |
| 419 __ move(fpu0, reg); | |
| 420 | |
| 421 } else { | |
| 422 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); | |
| 423 } | |
| 424 | |
| 425 set_result(x, round_item(reg)); | |
| 426 } | |
| 427 | |
| 428 | |
| 429 // for _ladd, _lmul, _lsub, _ldiv, _lrem | |
| 430 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { | |
| 431 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { | |
| 432 // long division is implemented as a direct call into the runtime | |
| 433 LIRItem left(x->x(), this); | |
| 434 LIRItem right(x->y(), this); | |
| 435 | |
| 436 // the check for division by zero destroys the right operand | |
| 437 right.set_destroys_register(); | |
| 438 | |
| 439 BasicTypeList signature(2); | |
| 440 signature.append(T_LONG); | |
| 441 signature.append(T_LONG); | |
| 442 CallingConvention* cc = frame_map()->c_calling_convention(&signature); | |
| 443 | |
| 444 // check for division by zero (destroys registers of right operand!) | |
| 445 CodeEmitInfo* info = state_for(x); | |
| 446 | |
| 447 const LIR_Opr result_reg = result_register_for(x->type()); | |
| 448 left.load_item_force(cc->at(1)); | |
| 449 right.load_item(); | |
| 450 | |
| 451 __ move(right.result(), cc->at(0)); | |
| 452 | |
| 453 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); | |
| 454 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); | |
| 455 | |
| 456 address entry; | |
| 457 switch (x->op()) { | |
| 458 case Bytecodes::_lrem: | |
| 459 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); | |
| 460 break; // check if dividend is 0 is done elsewhere | |
| 461 case Bytecodes::_ldiv: | |
| 462 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); | |
| 463 break; // check if dividend is 0 is done elsewhere | |
| 464 case Bytecodes::_lmul: | |
| 465 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); | |
| 466 break; | |
| 467 default: | |
| 468 ShouldNotReachHere(); | |
| 469 } | |
| 470 | |
| 471 LIR_Opr result = rlock_result(x); | |
| 472 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); | |
| 473 __ move(result_reg, result); | |
| 474 } else if (x->op() == Bytecodes::_lmul) { | |
| 475 // missing test if instr is commutative and if we should swap | |
| 476 LIRItem left(x->x(), this); | |
| 477 LIRItem right(x->y(), this); | |
| 478 | |
| 479 // right register is destroyed by the long mul, so it must be | |
| 480 // copied to a new register. | |
| 481 right.set_destroys_register(); | |
| 482 | |
| 483 left.load_item(); | |
| 484 right.load_item(); | |
| 485 | |
| 486 LIR_Opr reg = FrameMap::rax_rdx_long_opr; | |
| 487 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); | |
| 488 LIR_Opr result = rlock_result(x); | |
| 489 __ move(reg, result); | |
| 490 } else { | |
| 491 // missing test if instr is commutative and if we should swap | |
| 492 LIRItem left(x->x(), this); | |
| 493 LIRItem right(x->y(), this); | |
| 494 | |
| 495 left.load_item(); | |
| 496 // dont load constants to save register | |
| 497 right.load_nonconstant(); | |
| 498 rlock_result(x); | |
| 499 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); | |
| 500 } | |
| 501 } | |
| 502 | |
| 503 | |
| 504 | |
| 505 // for: _iadd, _imul, _isub, _idiv, _irem | |
| 506 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { | |
| 507 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { | |
| 508 // The requirements for division and modulo | |
| 509 // input : rax,: dividend min_int | |
| 510 // reg: divisor (may not be rax,/rdx) -1 | |
| 511 // | |
| 512 // output: rax,: quotient (= rax, idiv reg) min_int | |
| 513 // rdx: remainder (= rax, irem reg) 0 | |
| 514 | |
| 515 // rax, and rdx will be destroyed | |
| 516 | |
| 517 // Note: does this invalidate the spec ??? | |
| 518 LIRItem right(x->y(), this); | |
| 519 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid | |
| 520 | |
| 521 // call state_for before load_item_force because state_for may | |
| 522 // force the evaluation of other instructions that are needed for | |
| 523 // correct debug info. Otherwise the live range of the fix | |
| 524 // register might be too long. | |
| 525 CodeEmitInfo* info = state_for(x); | |
| 526 | |
| 527 left.load_item_force(divInOpr()); | |
| 528 | |
| 529 right.load_item(); | |
| 530 | |
| 531 LIR_Opr result = rlock_result(x); | |
| 532 LIR_Opr result_reg; | |
| 533 if (x->op() == Bytecodes::_idiv) { | |
| 534 result_reg = divOutOpr(); | |
| 535 } else { | |
| 536 result_reg = remOutOpr(); | |
| 537 } | |
| 538 | |
| 539 if (!ImplicitDiv0Checks) { | |
| 540 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); | |
| 541 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); | |
| 542 } | |
| 543 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation | |
| 544 if (x->op() == Bytecodes::_irem) { | |
| 545 __ irem(left.result(), right.result(), result_reg, tmp, info); | |
| 546 } else if (x->op() == Bytecodes::_idiv) { | |
| 547 __ idiv(left.result(), right.result(), result_reg, tmp, info); | |
| 548 } else { | |
| 549 ShouldNotReachHere(); | |
| 550 } | |
| 551 | |
| 552 __ move(result_reg, result); | |
| 553 } else { | |
| 554 // missing test if instr is commutative and if we should swap | |
| 555 LIRItem left(x->x(), this); | |
| 556 LIRItem right(x->y(), this); | |
| 557 LIRItem* left_arg = &left; | |
| 558 LIRItem* right_arg = &right; | |
| 559 if (x->is_commutative() && left.is_stack() && right.is_register()) { | |
| 560 // swap them if left is real stack (or cached) and right is real register(not cached) | |
| 561 left_arg = &right; | |
| 562 right_arg = &left; | |
| 563 } | |
| 564 | |
| 565 left_arg->load_item(); | |
| 566 | |
| 567 // do not need to load right, as we can handle stack and constants | |
| 568 if (x->op() == Bytecodes::_imul ) { | |
| 569 // check if we can use shift instead | |
| 570 bool use_constant = false; | |
| 571 bool use_tmp = false; | |
| 572 if (right_arg->is_constant()) { | |
| 573 int iconst = right_arg->get_jint_constant(); | |
| 574 if (iconst > 0) { | |
| 575 if (is_power_of_2(iconst)) { | |
| 576 use_constant = true; | |
| 577 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { | |
| 578 use_constant = true; | |
| 579 use_tmp = true; | |
| 580 } | |
| 581 } | |
| 582 } | |
| 583 if (use_constant) { | |
| 584 right_arg->dont_load_item(); | |
| 585 } else { | |
| 586 right_arg->load_item(); | |
| 587 } | |
| 588 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
| 589 if (use_tmp) { | |
| 590 tmp = new_register(T_INT); | |
| 591 } | |
| 592 rlock_result(x); | |
| 593 | |
| 594 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
| 595 } else { | |
| 596 right_arg->dont_load_item(); | |
| 597 rlock_result(x); | |
| 598 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
| 599 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
| 600 } | |
| 601 } | |
| 602 } | |
| 603 | |
| 604 | |
| 605 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { | |
| 606 // when an operand with use count 1 is the left operand, then it is | |
| 607 // likely that no move for 2-operand-LIR-form is necessary | |
| 608 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
| 609 x->swap_operands(); | |
| 610 } | |
| 611 | |
| 612 ValueTag tag = x->type()->tag(); | |
| 613 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); | |
| 614 switch (tag) { | |
| 615 case floatTag: | |
| 616 case doubleTag: do_ArithmeticOp_FPU(x); return; | |
| 617 case longTag: do_ArithmeticOp_Long(x); return; | |
| 618 case intTag: do_ArithmeticOp_Int(x); return; | |
| 619 } | |
| 620 ShouldNotReachHere(); | |
| 621 } | |
| 622 | |
| 623 | |
| 624 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr | |
| 625 void LIRGenerator::do_ShiftOp(ShiftOp* x) { | |
| 626 // count must always be in rcx | |
| 627 LIRItem value(x->x(), this); | |
| 628 LIRItem count(x->y(), this); | |
| 629 | |
| 630 ValueTag elemType = x->type()->tag(); | |
| 631 bool must_load_count = !count.is_constant() || elemType == longTag; | |
| 632 if (must_load_count) { | |
| 633 // count for long must be in register | |
| 634 count.load_item_force(shiftCountOpr()); | |
| 635 } else { | |
| 636 count.dont_load_item(); | |
| 637 } | |
| 638 value.load_item(); | |
| 639 LIR_Opr reg = rlock_result(x); | |
| 640 | |
| 641 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); | |
| 642 } | |
| 643 | |
| 644 | |
| 645 // _iand, _land, _ior, _lor, _ixor, _lxor | |
| 646 void LIRGenerator::do_LogicOp(LogicOp* x) { | |
| 647 // when an operand with use count 1 is the left operand, then it is | |
| 648 // likely that no move for 2-operand-LIR-form is necessary | |
| 649 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
| 650 x->swap_operands(); | |
| 651 } | |
| 652 | |
| 653 LIRItem left(x->x(), this); | |
| 654 LIRItem right(x->y(), this); | |
| 655 | |
| 656 left.load_item(); | |
| 657 right.load_nonconstant(); | |
| 658 LIR_Opr reg = rlock_result(x); | |
| 659 | |
| 660 logic_op(x->op(), reg, left.result(), right.result()); | |
| 661 } | |
| 662 | |
| 663 | |
| 664 | |
| 665 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg | |
| 666 void LIRGenerator::do_CompareOp(CompareOp* x) { | |
| 667 LIRItem left(x->x(), this); | |
| 668 LIRItem right(x->y(), this); | |
| 669 ValueTag tag = x->x()->type()->tag(); | |
| 670 if (tag == longTag) { | |
| 671 left.set_destroys_register(); | |
| 672 } | |
| 673 left.load_item(); | |
| 674 right.load_item(); | |
| 675 LIR_Opr reg = rlock_result(x); | |
| 676 | |
| 677 if (x->x()->type()->is_float_kind()) { | |
| 678 Bytecodes::Code code = x->op(); | |
| 679 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); | |
| 680 } else if (x->x()->type()->tag() == longTag) { | |
| 681 __ lcmp2int(left.result(), right.result(), reg); | |
| 682 } else { | |
| 683 Unimplemented(); | |
| 684 } | |
| 685 } | |
| 686 | |
| 687 | |
| 688 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) { | |
| 689 assert(x->number_of_arguments() == 3, "wrong type"); | |
| 690 LIRItem obj (x->argument_at(0), this); // AtomicLong object | |
| 691 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field | |
| 692 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value | |
| 693 | |
| 694 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction | |
| 695 cmp_value.load_item_force(FrameMap::rax_rdx_long_opr); | |
| 696 | |
| 697 // new value must be in rcx,ebx (hi,lo) | |
| 698 new_value.load_item_force(FrameMap::rbx_rcx_long_opr); | |
| 699 | |
| 700 // object pointer register is overwritten with field address | |
| 701 obj.load_item(); | |
| 702 | |
| 703 // generate compare-and-swap; produces zero condition if swap occurs | |
| 704 int value_offset = sun_misc_AtomicLongCSImpl::value_offset(); | |
| 705 LIR_Opr addr = obj.result(); | |
| 706 __ add(addr, LIR_OprFact::intConst(value_offset), addr); | |
| 707 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed | |
| 708 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed | |
| 709 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2); | |
| 710 | |
| 711 // generate conditional move of boolean result | |
| 712 LIR_Opr result = rlock_result(x); | |
| 713 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); | |
| 714 } | |
| 715 | |
| 716 | |
| 717 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { | |
| 718 assert(x->number_of_arguments() == 4, "wrong type"); | |
| 719 LIRItem obj (x->argument_at(0), this); // object | |
| 720 LIRItem offset(x->argument_at(1), this); // offset of field | |
| 721 LIRItem cmp (x->argument_at(2), this); // value to compare with field | |
| 722 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp | |
| 723 | |
| 724 assert(obj.type()->tag() == objectTag, "invalid type"); | |
| 725 assert(offset.type()->tag() == intTag, "invalid type"); | |
| 726 assert(cmp.type()->tag() == type->tag(), "invalid type"); | |
| 727 assert(val.type()->tag() == type->tag(), "invalid type"); | |
| 728 | |
| 729 // get address of field | |
| 730 obj.load_item(); | |
| 731 offset.load_nonconstant(); | |
| 732 | |
| 733 if (type == objectType) { | |
| 734 cmp.load_item_force(FrameMap::rax_oop_opr); | |
| 735 val.load_item(); | |
| 736 } else if (type == intType) { | |
| 737 cmp.load_item_force(FrameMap::rax_opr); | |
| 738 val.load_item(); | |
| 739 } else if (type == longType) { | |
| 740 cmp.load_item_force(FrameMap::rax_rdx_long_opr); | |
| 741 val.load_item_force(FrameMap::rbx_rcx_long_opr); | |
| 742 } else { | |
| 743 ShouldNotReachHere(); | |
| 744 } | |
| 745 | |
| 746 LIR_Opr addr = new_pointer_register(); | |
| 747 __ move(obj.result(), addr); | |
| 748 __ add(addr, offset.result(), addr); | |
| 749 | |
|
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750 if (type == objectType) { // Write-barrier needed for Object fields. |
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751 // Do the pre-write barrier, if any. |
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752 pre_barrier(addr, false, NULL); |
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753 } |
| 0 | 754 |
| 755 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience | |
| 756 if (type == objectType) | |
| 757 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); | |
| 758 else if (type == intType) | |
| 759 __ cas_int(addr, cmp.result(), val.result(), ill, ill); | |
| 760 else if (type == longType) | |
| 761 __ cas_long(addr, cmp.result(), val.result(), ill, ill); | |
| 762 else { | |
| 763 ShouldNotReachHere(); | |
| 764 } | |
| 765 | |
| 766 // generate conditional move of boolean result | |
| 767 LIR_Opr result = rlock_result(x); | |
| 768 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); | |
| 769 if (type == objectType) { // Write-barrier needed for Object fields. | |
| 770 // Seems to be precise | |
| 771 post_barrier(addr, val.result()); | |
| 772 } | |
| 773 } | |
| 774 | |
| 775 | |
| 776 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { | |
| 777 assert(x->number_of_arguments() == 1, "wrong type"); | |
| 778 LIRItem value(x->argument_at(0), this); | |
| 779 | |
| 780 bool use_fpu = false; | |
| 781 if (UseSSE >= 2) { | |
| 782 switch(x->id()) { | |
| 783 case vmIntrinsics::_dsin: | |
| 784 case vmIntrinsics::_dcos: | |
| 785 case vmIntrinsics::_dtan: | |
| 786 case vmIntrinsics::_dlog: | |
| 787 case vmIntrinsics::_dlog10: | |
| 788 use_fpu = true; | |
| 789 } | |
| 790 } else { | |
| 791 value.set_destroys_register(); | |
| 792 } | |
| 793 | |
| 794 value.load_item(); | |
| 795 | |
| 796 LIR_Opr calc_input = value.result(); | |
| 797 LIR_Opr calc_result = rlock_result(x); | |
| 798 | |
| 799 // sin and cos need two free fpu stack slots, so register two temporary operands | |
| 800 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); | |
| 801 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); | |
| 802 | |
| 803 if (use_fpu) { | |
| 804 LIR_Opr tmp = FrameMap::fpu0_double_opr; | |
| 805 __ move(calc_input, tmp); | |
| 806 | |
| 807 calc_input = tmp; | |
| 808 calc_result = tmp; | |
| 809 tmp1 = FrameMap::caller_save_fpu_reg_at(1); | |
| 810 tmp2 = FrameMap::caller_save_fpu_reg_at(2); | |
| 811 } | |
| 812 | |
| 813 switch(x->id()) { | |
| 814 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
| 815 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
| 816 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break; | |
| 817 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break; | |
| 818 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; | |
| 819 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
| 820 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
| 821 default: ShouldNotReachHere(); | |
| 822 } | |
| 823 | |
| 824 if (use_fpu) { | |
| 825 __ move(calc_result, x->operand()); | |
| 826 } | |
| 827 } | |
| 828 | |
| 829 | |
| 830 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { | |
| 831 assert(x->number_of_arguments() == 5, "wrong type"); | |
| 832 LIRItem src(x->argument_at(0), this); | |
| 833 LIRItem src_pos(x->argument_at(1), this); | |
| 834 LIRItem dst(x->argument_at(2), this); | |
| 835 LIRItem dst_pos(x->argument_at(3), this); | |
| 836 LIRItem length(x->argument_at(4), this); | |
| 837 | |
| 838 // operands for arraycopy must use fixed registers, otherwise | |
| 839 // LinearScan will fail allocation (because arraycopy always needs a | |
| 840 // call) | |
| 841 src.load_item_force (FrameMap::rcx_oop_opr); | |
| 842 src_pos.load_item_force (FrameMap::rdx_opr); | |
| 843 dst.load_item_force (FrameMap::rax_oop_opr); | |
| 844 dst_pos.load_item_force (FrameMap::rbx_opr); | |
| 845 length.load_item_force (FrameMap::rdi_opr); | |
| 846 LIR_Opr tmp = (FrameMap::rsi_opr); | |
| 847 set_no_result(x); | |
| 848 | |
| 849 int flags; | |
| 850 ciArrayKlass* expected_type; | |
| 851 arraycopy_helper(x, &flags, &expected_type); | |
| 852 | |
| 853 CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?) | |
| 854 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint | |
| 855 } | |
| 856 | |
| 857 | |
| 858 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f | |
| 859 // _i2b, _i2c, _i2s | |
| 860 LIR_Opr fixed_register_for(BasicType type) { | |
| 861 switch (type) { | |
| 862 case T_FLOAT: return FrameMap::fpu0_float_opr; | |
| 863 case T_DOUBLE: return FrameMap::fpu0_double_opr; | |
| 864 case T_INT: return FrameMap::rax_opr; | |
| 865 case T_LONG: return FrameMap::rax_rdx_long_opr; | |
| 866 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; | |
| 867 } | |
| 868 } | |
| 869 | |
| 870 void LIRGenerator::do_Convert(Convert* x) { | |
| 871 // flags that vary for the different operations and different SSE-settings | |
| 872 bool fixed_input, fixed_result, round_result, needs_stub; | |
| 873 | |
| 874 switch (x->op()) { | |
| 875 case Bytecodes::_i2l: // fall through | |
| 876 case Bytecodes::_l2i: // fall through | |
| 877 case Bytecodes::_i2b: // fall through | |
| 878 case Bytecodes::_i2c: // fall through | |
| 879 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
| 880 | |
| 881 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; | |
| 882 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; | |
| 883 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; | |
| 884 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
| 885 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
| 886 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
| 887 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; | |
| 888 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; | |
| 889 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
| 890 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
| 891 default: ShouldNotReachHere(); | |
| 892 } | |
| 893 | |
| 894 LIRItem value(x->value(), this); | |
| 895 value.load_item(); | |
| 896 LIR_Opr input = value.result(); | |
| 897 LIR_Opr result = rlock(x); | |
| 898 | |
| 899 // arguments of lir_convert | |
| 900 LIR_Opr conv_input = input; | |
| 901 LIR_Opr conv_result = result; | |
| 902 ConversionStub* stub = NULL; | |
| 903 | |
| 904 if (fixed_input) { | |
| 905 conv_input = fixed_register_for(input->type()); | |
| 906 __ move(input, conv_input); | |
| 907 } | |
| 908 | |
| 909 assert(fixed_result == false || round_result == false, "cannot set both"); | |
| 910 if (fixed_result) { | |
| 911 conv_result = fixed_register_for(result->type()); | |
| 912 } else if (round_result) { | |
| 913 result = new_register(result->type()); | |
| 914 set_vreg_flag(result, must_start_in_memory); | |
| 915 } | |
| 916 | |
| 917 if (needs_stub) { | |
| 918 stub = new ConversionStub(x->op(), conv_input, conv_result); | |
| 919 } | |
| 920 | |
| 921 __ convert(x->op(), conv_input, conv_result, stub); | |
| 922 | |
| 923 if (result != conv_result) { | |
| 924 __ move(conv_result, result); | |
| 925 } | |
| 926 | |
| 927 assert(result->is_virtual(), "result must be virtual register"); | |
| 928 set_result(x, result); | |
| 929 } | |
| 930 | |
| 931 | |
| 932 void LIRGenerator::do_NewInstance(NewInstance* x) { | |
| 933 if (PrintNotLoaded && !x->klass()->is_loaded()) { | |
| 934 tty->print_cr(" ###class not loaded at new bci %d", x->bci()); | |
| 935 } | |
| 936 CodeEmitInfo* info = state_for(x, x->state()); | |
| 937 LIR_Opr reg = result_register_for(x->type()); | |
| 938 LIR_Opr klass_reg = new_register(objectType); | |
| 939 new_instance(reg, x->klass(), | |
| 940 FrameMap::rcx_oop_opr, | |
| 941 FrameMap::rdi_oop_opr, | |
| 942 FrameMap::rsi_oop_opr, | |
| 943 LIR_OprFact::illegalOpr, | |
| 944 FrameMap::rdx_oop_opr, info); | |
| 945 LIR_Opr result = rlock_result(x); | |
| 946 __ move(reg, result); | |
| 947 } | |
| 948 | |
| 949 | |
| 950 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { | |
| 951 CodeEmitInfo* info = state_for(x, x->state()); | |
| 952 | |
| 953 LIRItem length(x->length(), this); | |
| 954 length.load_item_force(FrameMap::rbx_opr); | |
| 955 | |
| 956 LIR_Opr reg = result_register_for(x->type()); | |
| 957 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
| 958 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
| 959 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
| 960 LIR_Opr tmp4 = reg; | |
| 961 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
| 962 LIR_Opr len = length.result(); | |
| 963 BasicType elem_type = x->elt_type(); | |
| 964 | |
| 965 __ oop2reg(ciTypeArrayKlass::make(elem_type)->encoding(), klass_reg); | |
| 966 | |
| 967 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); | |
| 968 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); | |
| 969 | |
| 970 LIR_Opr result = rlock_result(x); | |
| 971 __ move(reg, result); | |
| 972 } | |
| 973 | |
| 974 | |
| 975 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { | |
| 976 LIRItem length(x->length(), this); | |
| 977 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction | |
| 978 // and therefore provide the state before the parameters have been consumed | |
| 979 CodeEmitInfo* patching_info = NULL; | |
| 980 if (!x->klass()->is_loaded() || PatchALot) { | |
| 981 patching_info = state_for(x, x->state_before()); | |
| 982 } | |
| 983 | |
| 984 CodeEmitInfo* info = state_for(x, x->state()); | |
| 985 | |
| 986 const LIR_Opr reg = result_register_for(x->type()); | |
| 987 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
| 988 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
| 989 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
| 990 LIR_Opr tmp4 = reg; | |
| 991 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
| 992 | |
| 993 length.load_item_force(FrameMap::rbx_opr); | |
| 994 LIR_Opr len = length.result(); | |
| 995 | |
| 996 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); | |
| 997 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass()); | |
| 998 if (obj == ciEnv::unloaded_ciobjarrayklass()) { | |
| 999 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); | |
| 1000 } | |
| 1001 jobject2reg_with_patching(klass_reg, obj, patching_info); | |
| 1002 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); | |
| 1003 | |
| 1004 LIR_Opr result = rlock_result(x); | |
| 1005 __ move(reg, result); | |
| 1006 } | |
| 1007 | |
| 1008 | |
| 1009 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { | |
| 1010 Values* dims = x->dims(); | |
| 1011 int i = dims->length(); | |
| 1012 LIRItemList* items = new LIRItemList(dims->length(), NULL); | |
| 1013 while (i-- > 0) { | |
| 1014 LIRItem* size = new LIRItem(dims->at(i), this); | |
| 1015 items->at_put(i, size); | |
| 1016 } | |
| 1017 | |
| 1018 // need to get the info before, as the items may become invalid through item_free | |
| 1019 CodeEmitInfo* patching_info = NULL; | |
| 1020 if (!x->klass()->is_loaded() || PatchALot) { | |
| 1021 patching_info = state_for(x, x->state_before()); | |
| 1022 | |
| 1023 // cannot re-use same xhandlers for multiple CodeEmitInfos, so | |
| 1024 // clone all handlers. | |
| 1025 x->set_exception_handlers(new XHandlers(x->exception_handlers())); | |
| 1026 } | |
| 1027 | |
| 1028 CodeEmitInfo* info = state_for(x, x->state()); | |
| 1029 | |
| 1030 i = dims->length(); | |
| 1031 while (i-- > 0) { | |
| 1032 LIRItem* size = items->at(i); | |
| 1033 size->load_nonconstant(); | |
| 1034 | |
| 1035 store_stack_parameter(size->result(), in_ByteSize(i*4)); | |
| 1036 } | |
| 1037 | |
| 1038 LIR_Opr reg = result_register_for(x->type()); | |
| 1039 jobject2reg_with_patching(reg, x->klass(), patching_info); | |
| 1040 | |
| 1041 LIR_Opr rank = FrameMap::rbx_opr; | |
| 1042 __ move(LIR_OprFact::intConst(x->rank()), rank); | |
| 1043 LIR_Opr varargs = FrameMap::rcx_opr; | |
| 1044 __ move(FrameMap::rsp_opr, varargs); | |
| 1045 LIR_OprList* args = new LIR_OprList(3); | |
| 1046 args->append(reg); | |
| 1047 args->append(rank); | |
| 1048 args->append(varargs); | |
| 1049 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), | |
| 1050 LIR_OprFact::illegalOpr, | |
| 1051 reg, args, info); | |
| 1052 | |
| 1053 LIR_Opr result = rlock_result(x); | |
| 1054 __ move(reg, result); | |
| 1055 } | |
| 1056 | |
| 1057 | |
| 1058 void LIRGenerator::do_BlockBegin(BlockBegin* x) { | |
| 1059 // nothing to do for now | |
| 1060 } | |
| 1061 | |
| 1062 | |
| 1063 void LIRGenerator::do_CheckCast(CheckCast* x) { | |
| 1064 LIRItem obj(x->obj(), this); | |
| 1065 | |
| 1066 CodeEmitInfo* patching_info = NULL; | |
| 1067 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { | |
| 1068 // must do this before locking the destination register as an oop register, | |
| 1069 // and before the obj is loaded (the latter is for deoptimization) | |
| 1070 patching_info = state_for(x, x->state_before()); | |
| 1071 } | |
| 1072 obj.load_item(); | |
| 1073 | |
| 1074 // info for exceptions | |
| 1075 CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks()); | |
| 1076 | |
| 1077 CodeStub* stub; | |
| 1078 if (x->is_incompatible_class_change_check()) { | |
| 1079 assert(patching_info == NULL, "can't patch this"); | |
| 1080 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); | |
| 1081 } else { | |
| 1082 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); | |
| 1083 } | |
| 1084 LIR_Opr reg = rlock_result(x); | |
| 1085 __ checkcast(reg, obj.result(), x->klass(), | |
| 1086 new_register(objectType), new_register(objectType), | |
| 1087 !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr, | |
| 1088 x->direct_compare(), info_for_exception, patching_info, stub, | |
| 1089 x->profiled_method(), x->profiled_bci()); | |
| 1090 } | |
| 1091 | |
| 1092 | |
| 1093 void LIRGenerator::do_InstanceOf(InstanceOf* x) { | |
| 1094 LIRItem obj(x->obj(), this); | |
| 1095 | |
| 1096 // result and test object may not be in same register | |
| 1097 LIR_Opr reg = rlock_result(x); | |
| 1098 CodeEmitInfo* patching_info = NULL; | |
| 1099 if ((!x->klass()->is_loaded() || PatchALot)) { | |
| 1100 // must do this before locking the destination register as an oop register | |
| 1101 patching_info = state_for(x, x->state_before()); | |
| 1102 } | |
| 1103 obj.load_item(); | |
| 1104 LIR_Opr tmp = new_register(objectType); | |
| 1105 __ instanceof(reg, obj.result(), x->klass(), | |
| 1106 tmp, new_register(objectType), LIR_OprFact::illegalOpr, | |
| 1107 x->direct_compare(), patching_info); | |
| 1108 } | |
| 1109 | |
| 1110 | |
| 1111 void LIRGenerator::do_If(If* x) { | |
| 1112 assert(x->number_of_sux() == 2, "inconsistency"); | |
| 1113 ValueTag tag = x->x()->type()->tag(); | |
| 1114 bool is_safepoint = x->is_safepoint(); | |
| 1115 | |
| 1116 If::Condition cond = x->cond(); | |
| 1117 | |
| 1118 LIRItem xitem(x->x(), this); | |
| 1119 LIRItem yitem(x->y(), this); | |
| 1120 LIRItem* xin = &xitem; | |
| 1121 LIRItem* yin = &yitem; | |
| 1122 | |
| 1123 if (tag == longTag) { | |
| 1124 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; | |
| 1125 // mirror for other conditions | |
| 1126 if (cond == If::gtr || cond == If::leq) { | |
| 1127 cond = Instruction::mirror(cond); | |
| 1128 xin = &yitem; | |
| 1129 yin = &xitem; | |
| 1130 } | |
| 1131 xin->set_destroys_register(); | |
| 1132 } | |
| 1133 xin->load_item(); | |
| 1134 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { | |
| 1135 // inline long zero | |
| 1136 yin->dont_load_item(); | |
| 1137 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { | |
| 1138 // longs cannot handle constants at right side | |
| 1139 yin->load_item(); | |
| 1140 } else { | |
| 1141 yin->dont_load_item(); | |
| 1142 } | |
| 1143 | |
| 1144 // add safepoint before generating condition code so it can be recomputed | |
| 1145 if (x->is_safepoint()) { | |
| 1146 // increment backedge counter if needed | |
| 1147 increment_backedge_counter(state_for(x, x->state_before())); | |
| 1148 | |
| 1149 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); | |
| 1150 } | |
| 1151 set_no_result(x); | |
| 1152 | |
| 1153 LIR_Opr left = xin->result(); | |
| 1154 LIR_Opr right = yin->result(); | |
| 1155 __ cmp(lir_cond(cond), left, right); | |
| 1156 profile_branch(x, cond); | |
| 1157 move_to_phi(x->state()); | |
| 1158 if (x->x()->type()->is_float_kind()) { | |
| 1159 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); | |
| 1160 } else { | |
| 1161 __ branch(lir_cond(cond), right->type(), x->tsux()); | |
| 1162 } | |
| 1163 assert(x->default_sux() == x->fsux(), "wrong destination above"); | |
| 1164 __ jump(x->default_sux()); | |
| 1165 } | |
| 1166 | |
| 1167 | |
| 1168 LIR_Opr LIRGenerator::getThreadPointer() { | |
| 1169 LIR_Opr result = new_register(T_INT); | |
| 1170 __ get_thread(result); | |
| 1171 return result; | |
| 1172 } | |
| 1173 | |
| 1174 void LIRGenerator::trace_block_entry(BlockBegin* block) { | |
| 1175 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); | |
| 1176 LIR_OprList* args = new LIR_OprList(); | |
| 1177 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); | |
| 1178 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); | |
| 1179 } | |
| 1180 | |
| 1181 | |
| 1182 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, | |
| 1183 CodeEmitInfo* info) { | |
| 1184 if (address->type() == T_LONG) { | |
| 1185 address = new LIR_Address(address->base(), | |
| 1186 address->index(), address->scale(), | |
| 1187 address->disp(), T_DOUBLE); | |
| 1188 // Transfer the value atomically by using FP moves. This means | |
| 1189 // the value has to be moved between CPU and FPU registers. It | |
| 1190 // always has to be moved through spill slot since there's no | |
| 1191 // quick way to pack the value into an SSE register. | |
| 1192 LIR_Opr temp_double = new_register(T_DOUBLE); | |
| 1193 LIR_Opr spill = new_register(T_LONG); | |
| 1194 set_vreg_flag(spill, must_start_in_memory); | |
| 1195 __ move(value, spill); | |
| 1196 __ volatile_move(spill, temp_double, T_LONG); | |
| 1197 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); | |
| 1198 } else { | |
| 1199 __ store(value, address, info); | |
| 1200 } | |
| 1201 } | |
| 1202 | |
| 1203 | |
| 1204 | |
| 1205 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, | |
| 1206 CodeEmitInfo* info) { | |
| 1207 if (address->type() == T_LONG) { | |
| 1208 address = new LIR_Address(address->base(), | |
| 1209 address->index(), address->scale(), | |
| 1210 address->disp(), T_DOUBLE); | |
| 1211 // Transfer the value atomically by using FP moves. This means | |
| 1212 // the value has to be moved between CPU and FPU registers. In | |
| 1213 // SSE0 and SSE1 mode it has to be moved through spill slot but in | |
| 1214 // SSE2+ mode it can be moved directly. | |
| 1215 LIR_Opr temp_double = new_register(T_DOUBLE); | |
| 1216 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); | |
| 1217 __ volatile_move(temp_double, result, T_LONG); | |
| 1218 if (UseSSE < 2) { | |
| 1219 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible | |
| 1220 set_vreg_flag(result, must_start_in_memory); | |
| 1221 } | |
| 1222 } else { | |
| 1223 __ load(address, result, info); | |
| 1224 } | |
| 1225 } | |
| 1226 | |
| 1227 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, | |
| 1228 BasicType type, bool is_volatile) { | |
| 1229 if (is_volatile && type == T_LONG) { | |
| 1230 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
| 1231 LIR_Opr tmp = new_register(T_DOUBLE); | |
| 1232 __ load(addr, tmp); | |
| 1233 LIR_Opr spill = new_register(T_LONG); | |
| 1234 set_vreg_flag(spill, must_start_in_memory); | |
| 1235 __ move(tmp, spill); | |
| 1236 __ move(spill, dst); | |
| 1237 } else { | |
| 1238 LIR_Address* addr = new LIR_Address(src, offset, type); | |
| 1239 __ load(addr, dst); | |
| 1240 } | |
| 1241 } | |
| 1242 | |
| 1243 | |
| 1244 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, | |
| 1245 BasicType type, bool is_volatile) { | |
| 1246 if (is_volatile && type == T_LONG) { | |
| 1247 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
| 1248 LIR_Opr tmp = new_register(T_DOUBLE); | |
| 1249 LIR_Opr spill = new_register(T_DOUBLE); | |
| 1250 set_vreg_flag(spill, must_start_in_memory); | |
| 1251 __ move(data, spill); | |
| 1252 __ move(spill, tmp); | |
| 1253 __ move(tmp, addr); | |
| 1254 } else { | |
| 1255 LIR_Address* addr = new LIR_Address(src, offset, type); | |
| 1256 bool is_obj = (type == T_ARRAY || type == T_OBJECT); | |
| 1257 if (is_obj) { | |
|
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1258 // Do the pre-write barrier, if any. |
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1259 pre_barrier(LIR_OprFact::address(addr), false, NULL); |
| 0 | 1260 __ move(data, addr); |
| 1261 assert(src->is_register(), "must be register"); | |
| 1262 // Seems to be a precise address | |
| 1263 post_barrier(LIR_OprFact::address(addr), data); | |
| 1264 } else { | |
| 1265 __ move(data, addr); | |
| 1266 } | |
| 1267 } | |
| 1268 } |