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annotate src/cpu/x86/vm/x86.ad @ 24094:9b69cec6d01b

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Merge with jdk8u121-b13
author Gilles Duboscq <gilles.m.duboscq@oracle.com>
date Mon, 06 Feb 2017 17:18:57 +0100
parents dd9cc155639c c3d0bd36ab28
children
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1 //
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2 // Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
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3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 //
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5 // This code is free software; you can redistribute it and/or modify it
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6 // under the terms of the GNU General Public License version 2 only, as
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7 // published by the Free Software Foundation.
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8 //
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9 // This code is distributed in the hope that it will be useful, but WITHOUT
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10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 // version 2 for more details (a copy is included in the LICENSE file that
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13 // accompanied this code).
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14 //
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15 // You should have received a copy of the GNU General Public License version
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16 // 2 along with this work; if not, write to the Free Software Foundation,
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17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 //
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19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 // or visit www.oracle.com if you need additional information or have any
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21 // questions.
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22 //
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23 //
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24
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25 // X86 Common Architecture Description File
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26
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27 //----------REGISTER DEFINITION BLOCK------------------------------------------
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28 // This information is used by the matcher and the register allocator to
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29 // describe individual registers and classes of registers within the target
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30 // archtecture.
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31
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32 register %{
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33 //----------Architecture Description Register Definitions----------------------
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34 // General Registers
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35 // "reg_def" name ( register save type, C convention save type,
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36 // ideal register type, encoding );
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37 // Register Save Types:
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38 //
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39 // NS = No-Save: The register allocator assumes that these registers
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40 // can be used without saving upon entry to the method, &
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41 // that they do not need to be saved at call sites.
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42 //
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43 // SOC = Save-On-Call: The register allocator assumes that these registers
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44 // can be used without saving upon entry to the method,
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45 // but that they must be saved at call sites.
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46 //
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47 // SOE = Save-On-Entry: The register allocator assumes that these registers
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48 // must be saved before using them upon entry to the
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49 // method, but they do not need to be saved at call
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50 // sites.
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51 //
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52 // AS = Always-Save: The register allocator assumes that these registers
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53 // must be saved before using them upon entry to the
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54 // method, & that they must be saved at call sites.
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55 //
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56 // Ideal Register Type is used to determine how to save & restore a
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57 // register. Op_RegI will get spilled with LoadI/StoreI, Op_RegP will get
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58 // spilled with LoadP/StoreP. If the register supports both, use Op_RegI.
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59 //
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60 // The encoding number is the actual bit-pattern placed into the opcodes.
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61
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62 // XMM registers. 256-bit registers or 8 words each, labeled (a)-h.
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63 // Word a in each register holds a Float, words ab hold a Double.
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64 // The whole registers are used in SSE4.2 version intrinsics,
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65 // array copy stubs and superword operations (see UseSSE42Intrinsics,
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66 // UseXMMForArrayCopy and UseSuperword flags).
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67 // XMM8-XMM15 must be encoded with REX (VEX for UseAVX).
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68 // Linux ABI: No register preserved across function calls
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69 // XMM0-XMM7 might hold parameters
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70 // Windows ABI: XMM6-XMM15 preserved across function calls
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71 // XMM0-XMM3 might hold parameters
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72
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73 reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg());
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74 reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(1));
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75 reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(2));
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76 reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(3));
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77 reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(4));
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78 reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(5));
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79 reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(6));
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80 reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(7));
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81
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82 reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg());
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83 reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(1));
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84 reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(2));
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85 reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(3));
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86 reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(4));
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87 reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(5));
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88 reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(6));
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89 reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(7));
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90
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91 reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg());
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92 reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(1));
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93 reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(2));
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94 reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(3));
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95 reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(4));
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96 reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(5));
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97 reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(6));
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98 reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(7));
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99
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100 reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg());
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101 reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(1));
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102 reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(2));
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103 reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(3));
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104 reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(4));
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105 reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(5));
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106 reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(6));
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107 reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(7));
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108
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109 reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg());
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110 reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(1));
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111 reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(2));
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112 reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(3));
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113 reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(4));
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114 reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(5));
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115 reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(6));
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116 reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(7));
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117
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118 reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg());
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119 reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(1));
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120 reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(2));
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121 reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(3));
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122 reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(4));
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123 reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(5));
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124 reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(6));
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125 reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(7));
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126
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127 #ifdef _WIN64
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128
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129 reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg());
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130 reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1));
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131 reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2));
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132 reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3));
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133 reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4));
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diff changeset
134 reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5));
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135 reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6));
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136 reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7));
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137
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138 reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg());
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139 reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(1));
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140 reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(2));
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141 reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(3));
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142 reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(4));
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143 reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(5));
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144 reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(6));
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145 reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(7));
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146
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147 reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg());
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148 reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(1));
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149 reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(2));
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150 reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(3));
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151 reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(4));
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152 reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(5));
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153 reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(6));
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154 reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(7));
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155
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156 reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg());
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157 reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(1));
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158 reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(2));
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159 reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(3));
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160 reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(4));
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161 reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(5));
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162 reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(6));
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163 reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(7));
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164
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165 reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg());
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166 reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(1));
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167 reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(2));
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168 reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(3));
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169 reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(4));
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170 reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(5));
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171 reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(6));
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172 reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(7));
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173
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174 reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg());
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175 reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(1));
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176 reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(2));
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177 reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(3));
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178 reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(4));
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179 reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(5));
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180 reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(6));
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181 reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(7));
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182
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183 reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg());
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184 reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(1));
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185 reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(2));
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186 reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(3));
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187 reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(4));
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188 reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(5));
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diff changeset
189 reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(6));
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diff changeset
190 reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(7));
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191
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192 reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg());
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193 reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(1));
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diff changeset
194 reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(2));
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diff changeset
195 reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(3));
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196 reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(4));
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diff changeset
197 reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(5));
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diff changeset
198 reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(6));
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diff changeset
199 reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(7));
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200
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201 reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg());
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202 reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(1));
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diff changeset
203 reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(2));
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diff changeset
204 reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(3));
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diff changeset
205 reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(4));
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diff changeset
206 reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(5));
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diff changeset
207 reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(6));
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diff changeset
208 reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(7));
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209
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diff changeset
210 reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg());
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diff changeset
211 reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(1));
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diff changeset
212 reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(2));
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diff changeset
213 reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(3));
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diff changeset
214 reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(4));
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diff changeset
215 reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(5));
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diff changeset
216 reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(6));
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diff changeset
217 reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(7));
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218
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diff changeset
219 #else // _WIN64
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220
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diff changeset
221 reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg());
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diff changeset
222 reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(1));
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diff changeset
223 reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(2));
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diff changeset
224 reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(3));
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diff changeset
225 reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(4));
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diff changeset
226 reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(5));
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diff changeset
227 reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(6));
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diff changeset
228 reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(7));
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229
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diff changeset
230 reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg());
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diff changeset
231 reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(1));
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diff changeset
232 reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(2));
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diff changeset
233 reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(3));
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diff changeset
234 reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(4));
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diff changeset
235 reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(5));
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diff changeset
236 reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(6));
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diff changeset
237 reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(7));
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238
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diff changeset
239 #ifdef _LP64
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240
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diff changeset
241 reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg());
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diff changeset
242 reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(1));
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diff changeset
243 reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(2));
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diff changeset
244 reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(3));
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diff changeset
245 reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(4));
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diff changeset
246 reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(5));
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diff changeset
247 reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(6));
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diff changeset
248 reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(7));
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249
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diff changeset
250 reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg());
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diff changeset
251 reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(1));
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diff changeset
252 reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(2));
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diff changeset
253 reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(3));
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254 reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(4));
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255 reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(5));
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256 reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(6));
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257 reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(7));
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258
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259 reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg());
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260 reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(1));
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261 reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(2));
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262 reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(3));
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diff changeset
263 reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(4));
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diff changeset
264 reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(5));
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diff changeset
265 reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(6));
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diff changeset
266 reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(7));
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267
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268 reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg());
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269 reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(1));
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270 reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(2));
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271 reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(3));
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272 reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(4));
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273 reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(5));
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274 reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(6));
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275 reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(7));
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276
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277 reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg());
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278 reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(1));
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279 reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(2));
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280 reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(3));
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281 reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(4));
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282 reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(5));
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diff changeset
283 reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(6));
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diff changeset
284 reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(7));
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285
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286 reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg());
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287 reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(1));
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diff changeset
288 reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(2));
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diff changeset
289 reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(3));
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diff changeset
290 reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(4));
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diff changeset
291 reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(5));
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diff changeset
292 reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(6));
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diff changeset
293 reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(7));
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294
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295 reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg());
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296 reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(1));
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297 reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(2));
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298 reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(3));
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diff changeset
299 reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(4));
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diff changeset
300 reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(5));
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diff changeset
301 reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(6));
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diff changeset
302 reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(7));
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303
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diff changeset
304 reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg());
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305 reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(1));
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diff changeset
306 reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code
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diff changeset
307 reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(3));
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diff changeset
308 reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(4));
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diff changeset
309 reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(5));
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diff changeset
310 reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(6));
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diff changeset
311 reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(7));
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312
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diff changeset
313 #endif // _LP64
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314
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315 #endif // _WIN64
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316
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317 #ifdef _LP64
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318 reg_def RFLAGS(SOC, SOC, 0, 16, VMRegImpl::Bad());
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diff changeset
319 #else
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320 reg_def RFLAGS(SOC, SOC, 0, 8, VMRegImpl::Bad());
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diff changeset
321 #endif // _LP64
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322
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323 alloc_class chunk1(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
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diff changeset
324 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
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diff changeset
325 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
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diff changeset
326 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
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diff changeset
327 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
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diff changeset
328 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
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diff changeset
329 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
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diff changeset
330 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
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diff changeset
331 #ifdef _LP64
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diff changeset
332 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
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diff changeset
333 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
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diff changeset
334 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
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335 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
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diff changeset
336 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
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diff changeset
337 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
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diff changeset
338 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
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339 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
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diff changeset
340 #endif
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341 );
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342
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343 // flags allocation class should be last.
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344 alloc_class chunk2(RFLAGS);
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345
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346 // Singleton class for condition codes
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347 reg_class int_flags(RFLAGS);
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348
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349 // Class for all float registers
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diff changeset
350 reg_class float_reg(XMM0,
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diff changeset
351 XMM1,
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diff changeset
352 XMM2,
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diff changeset
353 XMM3,
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diff changeset
354 XMM4,
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diff changeset
355 XMM5,
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diff changeset
356 XMM6,
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357 XMM7
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358 #ifdef _LP64
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359 ,XMM8,
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diff changeset
360 XMM9,
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diff changeset
361 XMM10,
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diff changeset
362 XMM11,
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diff changeset
363 XMM12,
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diff changeset
364 XMM13,
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diff changeset
365 XMM14,
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366 XMM15
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367 #endif
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368 );
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369
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370 // Class for all double registers
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diff changeset
371 reg_class double_reg(XMM0, XMM0b,
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diff changeset
372 XMM1, XMM1b,
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diff changeset
373 XMM2, XMM2b,
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diff changeset
374 XMM3, XMM3b,
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diff changeset
375 XMM4, XMM4b,
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diff changeset
376 XMM5, XMM5b,
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diff changeset
377 XMM6, XMM6b,
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378 XMM7, XMM7b
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379 #ifdef _LP64
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380 ,XMM8, XMM8b,
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diff changeset
381 XMM9, XMM9b,
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diff changeset
382 XMM10, XMM10b,
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diff changeset
383 XMM11, XMM11b,
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diff changeset
384 XMM12, XMM12b,
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diff changeset
385 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
386 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
387 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
388 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
389 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
390
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
391 // Class for all 32bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
392 reg_class vectors_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
393 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
394 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
395 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
396 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
397 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
398 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
399 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
400 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
401 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
402 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
403 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
404 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
405 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
406 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
407 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
408 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
409 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
410 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
411
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
412 // Class for all 64bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
413 reg_class vectord_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
414 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
415 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
416 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
417 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
418 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
419 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
420 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
421 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
422 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
423 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
424 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
425 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
426 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
427 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
428 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
429 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
430 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
431 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
432
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
433 // Class for all 128bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
434 reg_class vectorx_reg(XMM0, XMM0b, XMM0c, XMM0d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
435 XMM1, XMM1b, XMM1c, XMM1d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
436 XMM2, XMM2b, XMM2c, XMM2d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
437 XMM3, XMM3b, XMM3c, XMM3d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
438 XMM4, XMM4b, XMM4c, XMM4d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
439 XMM5, XMM5b, XMM5c, XMM5d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
440 XMM6, XMM6b, XMM6c, XMM6d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
441 XMM7, XMM7b, XMM7c, XMM7d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
442 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
443 ,XMM8, XMM8b, XMM8c, XMM8d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
444 XMM9, XMM9b, XMM9c, XMM9d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
445 XMM10, XMM10b, XMM10c, XMM10d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
446 XMM11, XMM11b, XMM11c, XMM11d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
447 XMM12, XMM12b, XMM12c, XMM12d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
448 XMM13, XMM13b, XMM13c, XMM13d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
449 XMM14, XMM14b, XMM14c, XMM14d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
450 XMM15, XMM15b, XMM15c, XMM15d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
451 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
452 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
453
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
454 // Class for all 256bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
455 reg_class vectory_reg(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
456 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
457 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
458 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
459 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
460 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
461 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
462 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
463 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
464 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
465 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
466 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
467 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
468 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
469 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
470 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
471 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
472 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
473 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
474
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
475 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
476
17809
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
477
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
478 //----------SOURCE BLOCK-------------------------------------------------------
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
479 // This is a block of C++ code which provides values, functions, and
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
480 // definitions necessary in the rest of the architecture description
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
481
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
482 source_hpp %{
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
483 // Header information of the source block.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
484 // Method declarations/definitions which are used outside
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
485 // the ad-scope can conveniently be defined here.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
486 //
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
487 // To keep related declarations/definitions/uses close together,
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
488 // we switch between source %{ }% and source_hpp %{ }% freely as needed.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
489
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
490 class CallStubImpl {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
491
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
492 //--------------------------------------------------------------
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
493 //---< Used for optimization in Compile::shorten_branches >---
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
494 //--------------------------------------------------------------
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
495
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
496 public:
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
497 // Size of call trampoline stub.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
498 static uint size_call_trampoline() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
499 return 0; // no call trampolines on this platform
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
500 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
501
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
502 // number of relocations needed by a call trampoline stub
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
503 static uint reloc_call_trampoline() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
504 return 0; // no call trampolines on this platform
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
505 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
506 };
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
507
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
508 class HandlerImpl {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
509
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
510 public:
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
511
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
512 static int emit_exception_handler(CodeBuffer &cbuf);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
513 static int emit_deopt_handler(CodeBuffer& cbuf);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
514
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
515 static uint size_exception_handler() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
516 // NativeCall instruction size is the same as NativeJump.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
517 // exception handler starts out as jump and can be patched to
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
518 // a call be deoptimization. (4932387)
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
519 // Note that this value is also credited (in output.cpp) to
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
520 // the size of the code section.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
521 return NativeJump::instruction_size;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
522 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
523
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
524 #ifdef _LP64
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
525 static uint size_deopt_handler() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
526 // three 5 byte instructions
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
527 return 15;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
528 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
529 #else
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
530 static uint size_deopt_handler() {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
531 // NativeCall instruction size is the same as NativeJump.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
532 // exception handler starts out as jump and can be patched to
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
533 // a call be deoptimization. (4932387)
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
534 // Note that this value is also credited (in output.cpp) to
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
535 // the size of the code section.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
536 return 5 + NativeJump::instruction_size; // pushl(); jmp;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
537 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
538 #endif
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
539 };
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
540
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
541 %} // end source_hpp
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
542
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
543 source %{
17809
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
544
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
545 // Emit exception handler code.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
546 // Stuff framesize into a register and call a VM stub routine.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
547 int HandlerImpl::emit_exception_handler(CodeBuffer& cbuf) {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
548
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
549 // Note that the code buffer's insts_mark is always relative to insts.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
550 // That's why we must use the macroassembler to generate a handler.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
551 MacroAssembler _masm(&cbuf);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
552 address base = __ start_a_stub(size_exception_handler());
24000
c3d0bd36ab28 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
vkempik
parents: 23050
diff changeset
553 if (base == NULL) {
c3d0bd36ab28 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
vkempik
parents: 23050
diff changeset
554 ciEnv::current()->record_failure("CodeCache is full");
c3d0bd36ab28 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
vkempik
parents: 23050
diff changeset
555 return 0; // CodeBuffer::expand failed
c3d0bd36ab28 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
vkempik
parents: 23050
diff changeset
556 }
17809
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
557 int offset = __ offset();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
558 __ jump(RuntimeAddress(OptoRuntime::exception_blob()->entry_point()));
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
559 assert(__ offset() - offset <= (int) size_exception_handler(), "overflow");
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
560 __ end_a_stub();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
561 return offset;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
562 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
563
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
564 // Emit deopt handler code.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
565 int HandlerImpl::emit_deopt_handler(CodeBuffer& cbuf) {
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
566
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
567 // Note that the code buffer's insts_mark is always relative to insts.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
568 // That's why we must use the macroassembler to generate a handler.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
569 MacroAssembler _masm(&cbuf);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
570 address base = __ start_a_stub(size_deopt_handler());
24000
c3d0bd36ab28 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
vkempik
parents: 23050
diff changeset
571 if (base == NULL) {
c3d0bd36ab28 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
vkempik
parents: 23050
diff changeset
572 ciEnv::current()->record_failure("CodeCache is full");
c3d0bd36ab28 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
vkempik
parents: 23050
diff changeset
573 return 0; // CodeBuffer::expand failed
c3d0bd36ab28 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
vkempik
parents: 23050
diff changeset
574 }
17809
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
575 int offset = __ offset();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
576
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
577 #ifdef _LP64
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
578 address the_pc = (address) __ pc();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
579 Label next;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
580 // push a "the_pc" on the stack without destroying any registers
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
581 // as they all may be live.
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
582
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
583 // push address of "next"
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
584 __ call(next, relocInfo::none); // reloc none is fine since it is a disp32
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
585 __ bind(next);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
586 // adjust it so it matches "the_pc"
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
587 __ subptr(Address(rsp, 0), __ offset() - offset);
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
588 #else
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
589 InternalAddress here(__ pc());
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
590 __ pushptr(here.addr());
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
591 #endif
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
592
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
593 __ jump(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
594 assert(__ offset() - offset <= (int) size_deopt_handler(), "overflow");
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
595 __ end_a_stub();
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
596 return offset;
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
597 }
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
598
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
599
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
600 //=============================================================================
a433eb716ce1 8037821: Account for trampoline stubs when estimating code buffer sizes
goetz
parents: 14261
diff changeset
601
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
602 // Float masks come from different places depending on platform.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
603 #ifdef _LP64
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
604 static address float_signmask() { return StubRoutines::x86::float_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
605 static address float_signflip() { return StubRoutines::x86::float_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
606 static address double_signmask() { return StubRoutines::x86::double_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
607 static address double_signflip() { return StubRoutines::x86::double_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
608 #else
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
609 static address float_signmask() { return (address)float_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
610 static address float_signflip() { return (address)float_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
611 static address double_signmask() { return (address)double_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
612 static address double_signflip() { return (address)double_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
613 #endif
4950
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
614
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
615
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
616 const bool Matcher::match_rule_supported(int opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
617 if (!has_match_rule(opcode))
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
618 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
619
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
620 switch (opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
621 case Op_PopCountI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
622 case Op_PopCountL:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
623 if (!UsePopCountInstruction)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
624 return false;
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6725
diff changeset
625 break;
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
626 case Op_MulVI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
627 if ((UseSSE < 4) && (UseAVX < 1)) // only with SSE4_1 or AVX
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
628 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
629 break;
6795
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
630 case Op_CompareAndSwapL:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
631 #ifdef _LP64
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
632 case Op_CompareAndSwapP:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
633 #endif
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
634 if (!VM_Version::supports_cx8())
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
635 return false;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 6792
diff changeset
636 break;
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
637 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
638
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
639 return true; // Per default match rules are supported.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
640 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
641
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
642 // Max vector size in bytes. 0 if not supported.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
643 const int Matcher::vector_width_in_bytes(BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
644 assert(is_java_primitive(bt), "only primitive type vectors");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
645 if (UseSSE < 2) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
646 // SSE2 supports 128bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
647 // AVX2 supports 256bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
648 int size = (UseAVX > 1) ? 32 : 16;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
649 // AVX1 supports 256bit vectors only for FLOAT and DOUBLE.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
650 if (UseAVX > 0 && (bt == T_FLOAT || bt == T_DOUBLE))
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
651 size = 32;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
652 // Use flag to limit vector size.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
653 size = MIN2(size,(int)MaxVectorSize);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
654 // Minimum 2 values in vector (or 4 for bytes).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
655 switch (bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
656 case T_DOUBLE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
657 case T_LONG:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
658 if (size < 16) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
659 case T_FLOAT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
660 case T_INT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
661 if (size < 8) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
662 case T_BOOLEAN:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
663 case T_BYTE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
664 case T_CHAR:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
665 case T_SHORT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
666 if (size < 4) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
667 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
668 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
669 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
670 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
671 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
672 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
673
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
674 // Limits on vector size (number of elements) loaded into vector.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
675 const int Matcher::max_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
676 return vector_width_in_bytes(bt)/type2aelembytes(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
677 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
678 const int Matcher::min_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
679 int max_size = max_vector_size(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
680 // Min size which can be loaded into vector is 4 bytes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
681 int size = (type2aelembytes(bt) == 1) ? 4 : 2;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
682 return MIN2(size,max_size);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
683 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
684
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
685 // Vector ideal reg corresponding to specidied size in bytes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
686 const int Matcher::vector_ideal_reg(int size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
687 assert(MaxVectorSize >= size, "");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
688 switch(size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
689 case 4: return Op_VecS;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
690 case 8: return Op_VecD;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
691 case 16: return Op_VecX;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
692 case 32: return Op_VecY;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
693 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
694 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
695 return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
696 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
697
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
698 // Only lowest bits of xmm reg are used for vector shift count.
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
699 const int Matcher::vector_shift_count_ideal_reg(int size) {
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
700 return Op_VecS;
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
701 }
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
702
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
703 // x86 supports misaligned vectors store/load.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
704 const bool Matcher::misaligned_vectors_ok() {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
705 return !AlignVector; // can be changed by flag
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
706 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
707
14261
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
708 // x86 AES instructions are compatible with SunJCE expanded
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
709 // keys, hence we do not need to pass the original key to stubs
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
710 const bool Matcher::pass_original_key_for_aes() {
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
711 return false;
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
712 }
00f5eff62d18 8002074: Support for AES on SPARC
kvn
parents: 6893
diff changeset
713
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
714 // Helper methods for MachSpillCopyNode::implementation().
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
715 static int vec_mov_helper(CodeBuffer *cbuf, bool do_size, int src_lo, int dst_lo,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
716 int src_hi, int dst_hi, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
717 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
718 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
719 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
720 assert(ireg == Op_VecS || // 32bit vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
721 (src_lo & 1) == 0 && (src_lo + 1) == src_hi &&
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
722 (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
723 "no non-adjacent vector moves" );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
724 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
725 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
726 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
727 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
728 case Op_VecS: // copy whole register
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
729 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
730 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
731 __ movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
732 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
733 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
734 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
735 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
736 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
737 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
738 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
739 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
740 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
741 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
742 assert(!do_size || size == 4, "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
743 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
744 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
745 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
746 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
747 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
748 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
749 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
750 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
751 st->print("movdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
752 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
753 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
754 st->print("vmovdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
755 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
756 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
757 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
758 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
759 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
760 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
761 // VEX_2bytes prefix is used if UseAVX > 0, and it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
762 return 4;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
763 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
764
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
765 static int vec_spill_helper(CodeBuffer *cbuf, bool do_size, bool is_load,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
766 int stack_offset, int reg, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
767 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
768 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
769 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
770 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
771 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
772 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
773 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
774 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
775 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
776 __ movdl(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
777 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
778 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
779 __ movq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
780 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
781 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
782 __ movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
783 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
784 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
785 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
786 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
787 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
788 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
789 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
790 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
791 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
792 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
793 __ movdl(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
794 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
795 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
796 __ movq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
797 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
798 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
799 __ movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
800 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
801 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
802 __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
803 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
804 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
805 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
806 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
807 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
808 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
809 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
810 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
811 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
812 assert(!do_size || size == (5+offset_size), "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
813 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
814 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
815 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
816 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
817 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
818 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
819 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
820 st->print("movd %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
821 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
822 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
823 st->print("movq %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
824 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
825 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
826 st->print("movdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
827 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
828 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
829 st->print("vmovdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
830 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
831 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
832 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
833 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
834 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
835 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
836 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
837 st->print("movd [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
838 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
839 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
840 st->print("movq [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
841 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
842 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
843 st->print("movdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
844 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
845 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
846 st->print("vmovdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
847 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
848 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
849 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
850 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
851 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
852 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
853 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
854 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
855 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
856 return 5+offset_size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
857 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
858
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
859 static inline jfloat replicate4_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
860 // Load a constant of "width" (in bytes) and replicate it to fill 32bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
861 assert(width == 1 || width == 2, "only byte or short types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
862 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
863 jint val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
864 val &= (1 << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
865 while(bit_width < 32) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
866 val |= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
867 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
868 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
869 jfloat fval = *((jfloat*) &val); // coerce to float type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
870 return fval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
871 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
872
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
873 static inline jdouble replicate8_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
874 // Load a constant of "width" (in bytes) and replicate it to fill 64bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
875 assert(width == 1 || width == 2 || width == 4, "only byte, short or int types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
876 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
877 jlong val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
878 val &= (((jlong) 1) << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
879 while(bit_width < 64) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
880 val |= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
881 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
882 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
883 jdouble dval = *((jdouble*) &val); // coerce to double type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
884 return dval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
885 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
886
4950
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
887 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
888 void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
889 st->print("nop \t# %d bytes pad for loops and calls", _count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
890 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
891 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
892
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
893 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
894 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
895 __ nop(_count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
896 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
897
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
898 uint MachNopNode::size(PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
899 return _count;
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
900 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
901
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
902 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
903 void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
904 st->print("# breakpoint");
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
905 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
906 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
907
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
908 void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
909 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
910 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
911 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
912
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
913 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
914 return MachNode::size(ra_);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
915 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
916
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
917 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
918
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
919 encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
920
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
921 enc_class call_epilog %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
922 if (VerifyStackAtCalls) {
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
923 // Check that stack depth is unchanged: find majik cookie on stack
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
924 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
925 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
926 Label L;
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
927 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
928 __ jccb(Assembler::equal, L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
929 // Die if stack mismatch
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
930 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
931 __ bind(L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
932 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
933 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
934
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
935 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
936
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
937
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
938 //----------OPERANDS-----------------------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
939 // Operand definitions must precede instruction definitions for correct parsing
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
940 // in the ADLC because operands constitute user defined types which are used in
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
941 // instruction definitions.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
942
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
943 // Vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
944 operand vecS() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
945 constraint(ALLOC_IN_RC(vectors_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
946 match(VecS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
947
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
948 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
949 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
950 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
951
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
952 operand vecD() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
953 constraint(ALLOC_IN_RC(vectord_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
954 match(VecD);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
955
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
956 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
957 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
958 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
959
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
960 operand vecX() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
961 constraint(ALLOC_IN_RC(vectorx_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
962 match(VecX);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
963
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
964 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
965 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
966 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
967
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
968 operand vecY() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
969 constraint(ALLOC_IN_RC(vectory_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
970 match(VecY);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
971
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
972 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
973 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
974 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
975
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
976
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
977 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit)
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
978
4950
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
979 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
980
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
981 instruct ShouldNotReachHere() %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
982 match(Halt);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
983 format %{ "int3\t# ShouldNotReachHere" %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
984 ins_encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
985 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
986 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
987 ins_pipe(pipe_slow);
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
988 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
989
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
990 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken
kvn
parents: 4761
diff changeset
991
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
992 instruct addF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
993 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
994 match(Set dst (AddF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
995
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
996 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
997 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
998 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
999 __ addss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1000 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1001 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1002 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1003
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1004 instruct addF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1005 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1006 match(Set dst (AddF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1007
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1008 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1009 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1010 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1011 __ addss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1012 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1013 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1014 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1015
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1016 instruct addF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1017 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1018 match(Set dst (AddF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1019 format %{ "addss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1020 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1021 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1022 __ addss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1023 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1024 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1025 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1026
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1027 instruct addF_reg_reg(regF dst, regF src1, regF src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1028 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1029 match(Set dst (AddF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1030
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1031 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1032 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1033 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1034 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1035 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1036 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1037 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1038
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1039 instruct addF_reg_mem(regF dst, regF src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1040 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1041 match(Set dst (AddF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1042
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1043 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1044 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1045 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1046 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1047 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1048 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1049 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1050
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1051 instruct addF_reg_imm(regF dst, regF src, immF con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1052 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1053 match(Set dst (AddF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1054
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1055 format %{ "vaddss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1056 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1057 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1058 __ vaddss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1059 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1060 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1061 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1062
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1063 instruct addD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1064 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1065 match(Set dst (AddD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1066
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1067 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1068 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1069 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1070 __ addsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1071 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1072 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1073 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1074
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1075 instruct addD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1076 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1077 match(Set dst (AddD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1078
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1079 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1080 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1081 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1082 __ addsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1083 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1084 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1085 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1086
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1087 instruct addD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1088 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1089 match(Set dst (AddD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1090 format %{ "addsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1091 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1092 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1093 __ addsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1094 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1095 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1096 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1097
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1098 instruct addD_reg_reg(regD dst, regD src1, regD src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1099 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1100 match(Set dst (AddD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1101
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1102 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1103 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1104 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1105 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1106 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1107 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1108 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1109
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1110 instruct addD_reg_mem(regD dst, regD src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1111 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1112 match(Set dst (AddD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1113
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1114 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1115 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1116 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1117 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1118 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1119 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1120 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1121
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1122 instruct addD_reg_imm(regD dst, regD src, immD con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1123 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1124 match(Set dst (AddD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1125
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1126 format %{ "vaddsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1127 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1128 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1129 __ vaddsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1130 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1131 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1132 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1133
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1134 instruct subF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1135 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1136 match(Set dst (SubF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1137
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1138 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1139 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1140 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1141 __ subss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1142 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1143 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1144 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1145
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1146 instruct subF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1147 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1148 match(Set dst (SubF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1149
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1150 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1151 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1152 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1153 __ subss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1154 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1155 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1156 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1157
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1158 instruct subF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1159 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1160 match(Set dst (SubF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1161 format %{ "subss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1162 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1163 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1164 __ subss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1165 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1166 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1167 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1168
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1169 instruct subF_reg_reg(regF dst, regF src1, regF src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1170 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1171 match(Set dst (SubF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1172
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1173 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1174 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1175 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1176 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1177 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1178 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1179 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1180
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1181 instruct subF_reg_mem(regF dst, regF src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1182 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1183 match(Set dst (SubF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1184
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1185 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1186 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1187 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1188 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1189 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1190 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1191 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1192
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1193 instruct subF_reg_imm(regF dst, regF src, immF con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1194 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1195 match(Set dst (SubF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1196
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1197 format %{ "vsubss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1198 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1199 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1200 __ vsubss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1201 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1202 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1203 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1204
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1205 instruct subD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1206 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1207 match(Set dst (SubD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1208
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1209 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1210 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1211 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1212 __ subsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1213 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1214 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1215 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1216
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1217 instruct subD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1218 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1219 match(Set dst (SubD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1220
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1221 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1222 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1223 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1224 __ subsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1225 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1226 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1227 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1228
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1229 instruct subD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1230 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1231 match(Set dst (SubD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1232 format %{ "subsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1233 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1234 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1235 __ subsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1236 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1237 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1238 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1239
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1240 instruct subD_reg_reg(regD dst, regD src1, regD src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1241 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1242 match(Set dst (SubD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1243
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1244 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1245 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1246 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1247 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1248 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1249 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1250 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1251
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1252 instruct subD_reg_mem(regD dst, regD src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1253 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1254 match(Set dst (SubD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1255
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1256 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1257 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1258 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1259 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1260 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1261 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1262 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1263
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1264 instruct subD_reg_imm(regD dst, regD src, immD con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1265 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1266 match(Set dst (SubD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1267
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1268 format %{ "vsubsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1269 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1270 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1271 __ vsubsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1272 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1273 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1274 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1275
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1276 instruct mulF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1277 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1278 match(Set dst (MulF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1279
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1280 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1281 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1282 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1283 __ mulss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1284 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1285 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1286 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1287
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1288 instruct mulF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1289 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1290 match(Set dst (MulF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1291
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1292 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1293 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1294 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1295 __ mulss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1296 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1297 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1298 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1299
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1300 instruct mulF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1301 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1302 match(Set dst (MulF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1303 format %{ "mulss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1304 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1305 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1306 __ mulss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1307 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1308 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1309 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1310
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1311 instruct mulF_reg_reg(regF dst, regF src1, regF src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1312 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1313 match(Set dst (MulF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1314
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1315 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1316 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1317 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1318 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1319 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1320 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1321 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1322
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1323 instruct mulF_reg_mem(regF dst, regF src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1324 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1325 match(Set dst (MulF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1326
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1327 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1328 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1329 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1330 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1331 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1332 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1333 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1334
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1335 instruct mulF_reg_imm(regF dst, regF src, immF con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1336 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1337 match(Set dst (MulF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1338
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1339 format %{ "vmulss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1340 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1341 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1342 __ vmulss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1343 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1344 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1345 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1346
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1347 instruct mulD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1348 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1349 match(Set dst (MulD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1350
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1351 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1352 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1353 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1354 __ mulsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1355 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1356 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1357 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1358
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1359 instruct mulD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1360 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1361 match(Set dst (MulD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1362
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1363 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1364 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1365 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1366 __ mulsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1367 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1368 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1369 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1370
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1371 instruct mulD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1372 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1373 match(Set dst (MulD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1374 format %{ "mulsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1375 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1376 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1377 __ mulsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1378 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1379 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1380 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1381
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1382 instruct mulD_reg_reg(regD dst, regD src1, regD src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1383 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1384 match(Set dst (MulD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1385
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1386 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1387 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1388 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1389 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1390 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1391 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1392 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1393
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1394 instruct mulD_reg_mem(regD dst, regD src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1395 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1396 match(Set dst (MulD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1397
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1398 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1399 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1400 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1401 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1402 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1403 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1404 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1405
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1406 instruct mulD_reg_imm(regD dst, regD src, immD con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1407 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1408 match(Set dst (MulD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1409
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1410 format %{ "vmulsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1411 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1412 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1413 __ vmulsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1414 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1415 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1416 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1417
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1418 instruct divF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1419 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1420 match(Set dst (DivF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1421
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1422 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1423 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1424 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1425 __ divss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1426 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1427 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1428 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1429
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1430 instruct divF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1431 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1432 match(Set dst (DivF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1433
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1434 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1435 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1436 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1437 __ divss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1438 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1439 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1440 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1441
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1442 instruct divF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1443 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1444 match(Set dst (DivF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1445 format %{ "divss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1446 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1447 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1448 __ divss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1449 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1450 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1451 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1452
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1453 instruct divF_reg_reg(regF dst, regF src1, regF src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1454 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1455 match(Set dst (DivF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1456
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1457 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1458 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1459 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1460 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1461 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1462 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1463 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1464
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1465 instruct divF_reg_mem(regF dst, regF src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1466 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1467 match(Set dst (DivF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1468
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1469 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1470 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1471 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1472 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1473 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1474 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1475 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1476
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1477 instruct divF_reg_imm(regF dst, regF src, immF con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1478 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1479 match(Set dst (DivF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1480
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1481 format %{ "vdivss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1482 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1483 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1484 __ vdivss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1485 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1486 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1487 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1488
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1489 instruct divD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1490 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1491 match(Set dst (DivD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1492
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1493 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1494 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1495 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1496 __ divsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1497 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1498 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1499 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1500
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1501 instruct divD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1502 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1503 match(Set dst (DivD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1504
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1505 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1506 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1507 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1508 __ divsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1509 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1510 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1511 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1512
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1513 instruct divD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1514 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1515 match(Set dst (DivD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1516 format %{ "divsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1517 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1518 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1519 __ divsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1520 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1521 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1522 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1523
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1524 instruct divD_reg_reg(regD dst, regD src1, regD src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1525 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1526 match(Set dst (DivD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1527
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1528 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1529 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1530 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1531 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1532 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1533 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1534 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1535
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1536 instruct divD_reg_mem(regD dst, regD src1, memory src2) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1537 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1538 match(Set dst (DivD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1539
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1540 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1541 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1542 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1543 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1544 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1545 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1546 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1547
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1548 instruct divD_reg_imm(regD dst, regD src, immD con) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1549 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1550 match(Set dst (DivD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1551
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1552 format %{ "vdivsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1553 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1554 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1555 __ vdivsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1556 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1557 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1558 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1559
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1560 instruct absF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1561 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1562 match(Set dst (AbsF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1563 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1564 format %{ "andps $dst, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1565 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1566 __ andps($dst$$XMMRegister, ExternalAddress(float_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1567 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1568 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1569 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1570
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1571 instruct absF_reg_reg(regF dst, regF src) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1572 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1573 match(Set dst (AbsF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1574 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1575 format %{ "vandps $dst, $src, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1576 ins_encode %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1577 bool vector256 = false;
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1578 __ vandps($dst$$XMMRegister, $src$$XMMRegister,
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1579 ExternalAddress(float_signmask()), vector256);
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1580 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1581 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1582 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1583
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1584 instruct absD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1585 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1586 match(Set dst (AbsD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1587 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1588 format %{ "andpd $dst, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1589 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1590 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1591 __ andpd($dst$$XMMRegister, ExternalAddress(double_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1592 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1593 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1594 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1595
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1596 instruct absD_reg_reg(regD dst, regD src) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1597 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1598 match(Set dst (AbsD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1599 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1600 format %{ "vandpd $dst, $src, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1601 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1602 ins_encode %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1603 bool vector256 = false;
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1604 __ vandpd($dst$$XMMRegister, $src$$XMMRegister,
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1605 ExternalAddress(double_signmask()), vector256);
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1606 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1607 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1608 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1609
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1610 instruct negF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1611 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1612 match(Set dst (NegF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1613 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1614 format %{ "xorps $dst, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1615 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1616 __ xorps($dst$$XMMRegister, ExternalAddress(float_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1617 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1618 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1619 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1620
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1621 instruct negF_reg_reg(regF dst, regF src) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1622 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1623 match(Set dst (NegF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1624 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1625 format %{ "vxorps $dst, $src, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1626 ins_encode %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1627 bool vector256 = false;
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1628 __ vxorps($dst$$XMMRegister, $src$$XMMRegister,
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1629 ExternalAddress(float_signflip()), vector256);
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1630 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1631 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1632 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1633
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1634 instruct negD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1635 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1636 match(Set dst (NegD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1637 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1638 format %{ "xorpd $dst, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1639 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1640 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1641 __ xorpd($dst$$XMMRegister, ExternalAddress(double_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1642 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1643 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1644 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1645
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1646 instruct negD_reg_reg(regD dst, regD src) %{
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1647 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1648 match(Set dst (NegD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1649 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1650 format %{ "vxorpd $dst, $src, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1651 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1652 ins_encode %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1653 bool vector256 = false;
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1654 __ vxorpd($dst$$XMMRegister, $src$$XMMRegister,
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
1655 ExternalAddress(double_signflip()), vector256);
4761
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1656 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1657 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1658 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1659
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1660 instruct sqrtF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1661 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1662 match(Set dst (ConvD2F (SqrtD (ConvF2D src))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1663
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1664 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1665 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1666 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1667 __ sqrtss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1668 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1669 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1670 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1671
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1672 instruct sqrtF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1673 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1674 match(Set dst (ConvD2F (SqrtD (ConvF2D (LoadF src)))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1675
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1676 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1677 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1678 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1679 __ sqrtss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1680 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1681 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1682 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1683
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1684 instruct sqrtF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1685 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1686 match(Set dst (ConvD2F (SqrtD (ConvF2D con))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1687 format %{ "sqrtss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1688 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1689 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1690 __ sqrtss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1691 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1692 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1693 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1694
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1695 instruct sqrtD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1696 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1697 match(Set dst (SqrtD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1698
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1699 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1700 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1701 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1702 __ sqrtsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1703 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1704 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1705 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1706
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1707 instruct sqrtD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1708 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1709 match(Set dst (SqrtD (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1710
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1711 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1712 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1713 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1714 __ sqrtsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1715 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1716 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1717 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1718
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1719 instruct sqrtD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1720 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1721 match(Set dst (SqrtD con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1722 format %{ "sqrtsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1723 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1724 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1725 __ sqrtsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1726 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1727 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1728 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
diff changeset
1729
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1730
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1731 // ====================VECTOR INSTRUCTIONS=====================================
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1732
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1733 // Load vectors (4 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1734 instruct loadV4(vecS dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1735 predicate(n->as_LoadVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1736 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1737 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1738 format %{ "movd $dst,$mem\t! load vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1739 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1740 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1741 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1742 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1743 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1744
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1745 // Load vectors (8 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1746 instruct loadV8(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1747 predicate(n->as_LoadVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1748 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1749 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1750 format %{ "movq $dst,$mem\t! load vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1751 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1752 __ movq($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1753 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1754 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1755 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1756
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1757 // Load vectors (16 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1758 instruct loadV16(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1759 predicate(n->as_LoadVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1760 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1761 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1762 format %{ "movdqu $dst,$mem\t! load vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1763 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1764 __ movdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1765 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1766 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1767 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1768
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1769 // Load vectors (32 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1770 instruct loadV32(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1771 predicate(n->as_LoadVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1772 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1773 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1774 format %{ "vmovdqu $dst,$mem\t! load vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1775 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1776 __ vmovdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1777 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1778 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1779 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1780
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1781 // Store vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1782 instruct storeV4(memory mem, vecS src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1783 predicate(n->as_StoreVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1784 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1785 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1786 format %{ "movd $mem,$src\t! store vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1787 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1788 __ movdl($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1789 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1790 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1791 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1792
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1793 instruct storeV8(memory mem, vecD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1794 predicate(n->as_StoreVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1795 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1796 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1797 format %{ "movq $mem,$src\t! store vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1798 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1799 __ movq($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1800 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1801 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1802 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1803
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1804 instruct storeV16(memory mem, vecX src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1805 predicate(n->as_StoreVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1806 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1807 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1808 format %{ "movdqu $mem,$src\t! store vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1809 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1810 __ movdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1811 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1812 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1813 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1814
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1815 instruct storeV32(memory mem, vecY src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1816 predicate(n->as_StoreVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1817 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1818 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1819 format %{ "vmovdqu $mem,$src\t! store vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1820 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1821 __ vmovdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1822 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1823 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1824 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1825
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1826 // Replicate byte scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1827 instruct Repl4B(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1828 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1829 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1830 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1831 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1832 "pshuflw $dst,$dst,0x00\t! replicate4B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1833 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1834 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1835 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1836 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1837 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1838 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1839 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1840
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1841 instruct Repl8B(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1842 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1843 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1844 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1845 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1846 "pshuflw $dst,$dst,0x00\t! replicate8B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1847 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1848 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1849 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1850 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1851 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1852 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1853 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1854
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1855 instruct Repl16B(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1856 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1857 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1858 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1859 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1860 "pshuflw $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1861 "punpcklqdq $dst,$dst\t! replicate16B" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1862 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1863 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1864 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1865 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1866 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1867 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1868 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1869 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1870
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1871 instruct Repl32B(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1872 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1873 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1874 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1875 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1876 "pshuflw $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1877 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1878 "vinserti128h $dst,$dst,$dst\t! replicate32B" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1879 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1880 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1881 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1882 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1883 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1884 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1885 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1886 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1887 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1888
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1889 // Replicate byte scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1890 instruct Repl4B_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1891 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1892 match(Set dst (ReplicateB con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1893 format %{ "movdl $dst,[$constantaddress]\t! replicate4B($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1894 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1895 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 1)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1896 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1897 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1898 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1899
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1900 instruct Repl8B_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1901 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1902 match(Set dst (ReplicateB con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1903 format %{ "movq $dst,[$constantaddress]\t! replicate8B($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1904 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1905 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1906 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1907 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1908 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1909
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1910 instruct Repl16B_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1911 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1912 match(Set dst (ReplicateB con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1913 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1914 "punpcklqdq $dst,$dst\t! replicate16B($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1915 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1916 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1917 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1918 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1919 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1920 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1921
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1922 instruct Repl32B_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1923 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1924 match(Set dst (ReplicateB con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1925 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1926 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1927 "vinserti128h $dst,$dst,$dst\t! lreplicate32B($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1928 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1929 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1930 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1931 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1932 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1933 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1934 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1935
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1936 // Replicate byte scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1937 instruct Repl4B_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1938 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1939 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1940 format %{ "pxor $dst,$dst\t! replicate4B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1941 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1942 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1943 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1944 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1945 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1946
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1947 instruct Repl8B_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1948 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1949 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1950 format %{ "pxor $dst,$dst\t! replicate8B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1951 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1952 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1953 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1954 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1955 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1956
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1957 instruct Repl16B_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1958 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1959 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1960 format %{ "pxor $dst,$dst\t! replicate16B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1961 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1962 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1963 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1964 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1965 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1966
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1967 instruct Repl32B_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1968 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1969 match(Set dst (ReplicateB zero));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1970 format %{ "vpxor $dst,$dst,$dst\t! replicate32B zero" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1971 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1972 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1973 bool vector256 = true;
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
1974 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1975 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1976 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1977 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1978
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1979 // Replicate char/short (2 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1980 instruct Repl2S(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1981 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1982 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1983 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1984 "pshuflw $dst,$dst,0x00\t! replicate2S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1985 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1986 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1987 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1988 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1989 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1990 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1991
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1992 instruct Repl4S(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1993 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1994 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1995 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1996 "pshuflw $dst,$dst,0x00\t! replicate4S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1997 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1998 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
1999 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2000 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2001 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2002 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2003
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2004 instruct Repl8S(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2005 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2006 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2007 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2008 "pshuflw $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2009 "punpcklqdq $dst,$dst\t! replicate8S" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2010 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2011 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2012 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2013 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2014 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2015 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2016 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2017
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2018 instruct Repl16S(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2019 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2020 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2021 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2022 "pshuflw $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2023 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2024 "vinserti128h $dst,$dst,$dst\t! replicate16S" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2025 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2026 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2027 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2028 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2029 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2030 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2031 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2032 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2033
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2034 // Replicate char/short (2 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2035 instruct Repl2S_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2036 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2037 match(Set dst (ReplicateS con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2038 format %{ "movdl $dst,[$constantaddress]\t! replicate2S($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2039 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2040 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 2)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2041 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2042 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2043 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2044
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2045 instruct Repl4S_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2046 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2047 match(Set dst (ReplicateS con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2048 format %{ "movq $dst,[$constantaddress]\t! replicate4S($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2049 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2050 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2051 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2052 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2053 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2054
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2055 instruct Repl8S_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2056 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2057 match(Set dst (ReplicateS con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2058 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2059 "punpcklqdq $dst,$dst\t! replicate8S($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2060 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2061 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2062 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2063 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2064 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2065 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2066
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2067 instruct Repl16S_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2068 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2069 match(Set dst (ReplicateS con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2070 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2071 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2072 "vinserti128h $dst,$dst,$dst\t! replicate16S($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2073 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2074 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2075 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2076 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2077 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2078 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2079 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2080
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2081 // Replicate char/short (2 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2082 instruct Repl2S_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2083 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2084 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2085 format %{ "pxor $dst,$dst\t! replicate2S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2086 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2087 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2088 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2089 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2090 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2091
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2092 instruct Repl4S_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2093 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2094 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2095 format %{ "pxor $dst,$dst\t! replicate4S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2096 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2097 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2098 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2099 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2100 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2101
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2102 instruct Repl8S_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2103 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2104 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2105 format %{ "pxor $dst,$dst\t! replicate8S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2106 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2107 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2108 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2109 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2110 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2111
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2112 instruct Repl16S_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2113 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2114 match(Set dst (ReplicateS zero));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2115 format %{ "vpxor $dst,$dst,$dst\t! replicate16S zero" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2116 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2117 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2118 bool vector256 = true;
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2119 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2120 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2121 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2122 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2123
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2124 // Replicate integer (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2125 instruct Repl2I(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2126 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2127 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2128 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2129 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2130 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2131 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2132 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2133 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2134 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2135 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2136
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2137 instruct Repl4I(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2138 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2139 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2140 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2141 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2142 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2143 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2144 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2145 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2146 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2147 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2148
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2149 instruct Repl8I(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2150 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2151 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2152 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2153 "pshufd $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2154 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2155 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2156 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2157 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2158 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2159 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2160 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2161 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2162
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2163 // Replicate integer (4 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2164 instruct Repl2I_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2165 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2166 match(Set dst (ReplicateI con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2167 format %{ "movq $dst,[$constantaddress]\t! replicate2I($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2168 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2169 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2170 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2171 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2172 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2173
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2174 instruct Repl4I_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2175 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2176 match(Set dst (ReplicateI con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2177 format %{ "movq $dst,[$constantaddress]\t! replicate4I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2178 "punpcklqdq $dst,$dst" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2179 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2180 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2181 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2182 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2183 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2184 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2185
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2186 instruct Repl8I_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2187 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2188 match(Set dst (ReplicateI con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2189 format %{ "movq $dst,[$constantaddress]\t! replicate8I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2190 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2191 "vinserti128h $dst,$dst,$dst" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2192 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2193 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2194 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2195 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2196 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2197 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2198 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2199
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2200 // Integer could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2201 instruct Repl2I_mem(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2202 predicate(n->as_Vector()->length() == 2);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2203 match(Set dst (ReplicateI (LoadI mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2204 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2205 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2206 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2207 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2208 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2209 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2210 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2211 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2212
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2213 instruct Repl4I_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2214 predicate(n->as_Vector()->length() == 4);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2215 match(Set dst (ReplicateI (LoadI mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2216 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2217 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2218 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2219 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2220 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2221 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2222 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2223 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2224
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2225 instruct Repl8I_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2226 predicate(n->as_Vector()->length() == 8);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2227 match(Set dst (ReplicateI (LoadI mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2228 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2229 "pshufd $dst,$dst,0x00\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2230 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2231 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2232 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2233 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2234 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2235 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2236 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2237 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2238
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2239 // Replicate integer (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2240 instruct Repl2I_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2241 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2242 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2243 format %{ "pxor $dst,$dst\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2244 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2245 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2246 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2247 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2248 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2249
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2250 instruct Repl4I_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2251 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2252 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2253 format %{ "pxor $dst,$dst\t! replicate4I zero)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2254 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2255 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2256 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2257 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2258 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2259
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2260 instruct Repl8I_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2261 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2262 match(Set dst (ReplicateI zero));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2263 format %{ "vpxor $dst,$dst,$dst\t! replicate8I zero" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2264 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2265 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2266 bool vector256 = true;
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2267 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2268 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2269 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2270 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2271
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2272 // Replicate long (8 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2273 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2274 instruct Repl2L(vecX dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2275 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2276 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2277 format %{ "movdq $dst,$src\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2278 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2279 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2280 __ movdq($dst$$XMMRegister, $src$$Register);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2281 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2282 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2283 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2284 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2285
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2286 instruct Repl4L(vecY dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2287 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2288 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2289 format %{ "movdq $dst,$src\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2290 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2291 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2292 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2293 __ movdq($dst$$XMMRegister, $src$$Register);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2294 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2295 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2296 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2297 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2298 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2299 #else // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2300 instruct Repl2L(vecX dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2301 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2302 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2303 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2304 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2305 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2306 "punpckldq $dst,$tmp\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2307 "punpcklqdq $dst,$dst\t! replicate2L"%}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2308 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2309 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2310 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2311 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2312 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2313 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2314 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2315 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2316
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2317 instruct Repl4L(vecY dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2318 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2319 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2320 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2321 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2322 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2323 "punpckldq $dst,$tmp\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2324 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2325 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2326 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2327 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2328 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2329 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2330 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2331 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2332 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2333 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2334 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2335 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2336
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2337 // Replicate long (8 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2338 instruct Repl2L_imm(vecX dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2339 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2340 match(Set dst (ReplicateL con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2341 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2342 "punpcklqdq $dst,$dst\t! replicate2L($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2343 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2344 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2345 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2346 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2347 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2348 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2349
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2350 instruct Repl4L_imm(vecY dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2351 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2352 match(Set dst (ReplicateL con));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2353 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2354 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2355 "vinserti128h $dst,$dst,$dst\t! replicate4L($con)" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2356 ins_encode %{
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2357 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2358 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2359 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2360 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2361 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2362 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2363
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2364 // Long could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2365 instruct Repl2L_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2366 predicate(n->as_Vector()->length() == 2);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2367 match(Set dst (ReplicateL (LoadL mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2368 format %{ "movq $dst,$mem\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2369 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2370 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2371 __ movq($dst$$XMMRegister, $mem$$Address);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2372 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2373 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2374 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2375 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2376
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2377 instruct Repl4L_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2378 predicate(n->as_Vector()->length() == 4);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2379 match(Set dst (ReplicateL (LoadL mem)));
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2380 format %{ "movq $dst,$mem\n\t"
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2381 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2382 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2383 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2384 __ movq($dst$$XMMRegister, $mem$$Address);
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2385 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2386 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2387 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2388 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2389 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2390
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2391 // Replicate long (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2392 instruct Repl2L_zero(vecX dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2393 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2394 match(Set dst (ReplicateL zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2395 format %{ "pxor $dst,$dst\t! replicate2L zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2396 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2397 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2398 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2399 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2400 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2401
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2402 instruct Repl4L_zero(vecY dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2403 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2404 match(Set dst (ReplicateL zero));
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2405 format %{ "vpxor $dst,$dst,$dst\t! replicate4L zero" %}
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2406 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2407 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2408 bool vector256 = true;
6225
2c368ea3e844 7181494: cleanup avx and vectors code
kvn
parents: 6183
diff changeset
2409 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2410 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2411 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2412 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2413
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2414 // Replicate float (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2415 instruct Repl2F(vecD dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2416 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2417 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2418 format %{ "pshufd $dst,$dst,0x00\t! replicate2F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2419 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2420 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2421 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2422 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2423 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2424
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2425 instruct Repl4F(vecX dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2426 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2427 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2428 format %{ "pshufd $dst,$dst,0x00\t! replicate4F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2429 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2430 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2431 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2432 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2433 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2434
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2435 instruct Repl8F(vecY dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2436 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2437 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2438 format %{ "pshufd $dst,$src,0x00\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2439 "vinsertf128h $dst,$dst,$dst\t! replicate8F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2440 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2441 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2442 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2443 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2444 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2445 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2446
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2447 // Replicate float (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2448 instruct Repl2F_zero(vecD dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2449 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2450 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2451 format %{ "xorps $dst,$dst\t! replicate2F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2452 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2453 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2454 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2455 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2456 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2457
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2458 instruct Repl4F_zero(vecX dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2459 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2460 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2461 format %{ "xorps $dst,$dst\t! replicate4F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2462 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2463 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2464 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2465 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2466 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2467
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2468 instruct Repl8F_zero(vecY dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2469 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2470 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2471 format %{ "vxorps $dst,$dst,$dst\t! replicate8F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2472 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2473 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2474 __ vxorps($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2475 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2476 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2477 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2478
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2479 // Replicate double (8 bytes) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2480 instruct Repl2D(vecX dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2481 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2482 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2483 format %{ "pshufd $dst,$src,0x44\t! replicate2D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2484 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2485 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2486 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2487 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2488 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2489
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2490 instruct Repl4D(vecY dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2491 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2492 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2493 format %{ "pshufd $dst,$src,0x44\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2494 "vinsertf128h $dst,$dst,$dst\t! replicate4D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2495 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2496 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2497 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2498 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2499 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2500 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2501
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2502 // Replicate double (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2503 instruct Repl2D_zero(vecX dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2504 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2505 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2506 format %{ "xorpd $dst,$dst\t! replicate2D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2507 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2508 __ xorpd($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2509 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2510 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2511 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2512
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2513 instruct Repl4D_zero(vecY dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2514 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2515 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2516 format %{ "vxorpd $dst,$dst,$dst,vect256\t! replicate4D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2517 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2518 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2519 __ vxorpd($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2520 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2521 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2522 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4950
diff changeset
2523
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2524 // ====================VECTOR ARITHMETIC=======================================
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2525
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2526 // --------------------------------- ADD --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2527
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2528 // Bytes vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2529 instruct vadd4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2530 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2531 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2532 format %{ "paddb $dst,$src\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2533 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2534 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2535 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2536 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2537 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2538
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2539 instruct vadd4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2540 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2541 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2542 format %{ "vpaddb $dst,$src1,$src2\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2543 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2544 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2545 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2546 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2547 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2548 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2549
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2550 instruct vadd8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2551 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2552 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2553 format %{ "paddb $dst,$src\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2554 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2555 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2556 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2557 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2558 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2559
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2560 instruct vadd8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2561 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2562 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2563 format %{ "vpaddb $dst,$src1,$src2\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2564 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2565 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2566 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2567 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2568 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2569 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2570
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2571 instruct vadd16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2572 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2573 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2574 format %{ "paddb $dst,$src\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2575 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2576 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2577 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2578 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2579 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2580
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2581 instruct vadd16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2582 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2583 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2584 format %{ "vpaddb $dst,$src1,$src2\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2585 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2586 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2587 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2588 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2589 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2590 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2591
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2592 instruct vadd16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2593 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2594 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2595 format %{ "vpaddb $dst,$src,$mem\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2596 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2597 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2598 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2599 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2600 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2601 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2602
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2603 instruct vadd32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2604 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2605 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2606 format %{ "vpaddb $dst,$src1,$src2\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2607 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2608 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2609 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2610 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2611 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2612 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2613
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2614 instruct vadd32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2615 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2616 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2617 format %{ "vpaddb $dst,$src,$mem\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2618 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2619 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2620 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2621 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2622 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2623 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2624
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2625 // Shorts/Chars vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2626 instruct vadd2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2627 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2628 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2629 format %{ "paddw $dst,$src\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2630 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2631 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2632 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2633 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2634 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2635
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2636 instruct vadd2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2637 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2638 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2639 format %{ "vpaddw $dst,$src1,$src2\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2640 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2641 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2642 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2643 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2644 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2645 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2646
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2647 instruct vadd4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2648 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2649 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2650 format %{ "paddw $dst,$src\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2651 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2652 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2653 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2654 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2655 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2656
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2657 instruct vadd4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2658 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2659 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2660 format %{ "vpaddw $dst,$src1,$src2\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2661 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2662 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2663 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2664 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2665 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2666 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2667
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2668 instruct vadd8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2669 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2670 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2671 format %{ "paddw $dst,$src\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2672 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2673 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2674 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2675 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2676 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2677
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2678 instruct vadd8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2679 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2680 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2681 format %{ "vpaddw $dst,$src1,$src2\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2682 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2683 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2684 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2685 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2686 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2687 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2688
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2689 instruct vadd8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2690 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2691 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2692 format %{ "vpaddw $dst,$src,$mem\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2693 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2694 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2695 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2696 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2697 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2698 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2699
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2700 instruct vadd16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2701 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2702 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2703 format %{ "vpaddw $dst,$src1,$src2\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2704 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2705 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2706 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2707 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2708 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2709 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2710
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2711 instruct vadd16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2712 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2713 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2714 format %{ "vpaddw $dst,$src,$mem\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2715 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2716 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2717 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2718 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2719 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2720 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2721
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2722 // Integers vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2723 instruct vadd2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2724 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2725 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2726 format %{ "paddd $dst,$src\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2727 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2728 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2729 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2730 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2731 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2732
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2733 instruct vadd2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2734 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2735 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2736 format %{ "vpaddd $dst,$src1,$src2\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2737 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2738 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2739 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2740 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2741 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2742 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2743
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2744 instruct vadd4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2745 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2746 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2747 format %{ "paddd $dst,$src\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2748 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2749 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2750 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2751 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2752 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2753
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2754 instruct vadd4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2755 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2756 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2757 format %{ "vpaddd $dst,$src1,$src2\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2758 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2759 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2760 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2761 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2762 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2763 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2764
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2765 instruct vadd4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2766 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2767 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2768 format %{ "vpaddd $dst,$src,$mem\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2769 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2770 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2771 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2772 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2773 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2774 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2775
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2776 instruct vadd8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2777 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2778 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2779 format %{ "vpaddd $dst,$src1,$src2\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2780 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2781 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2782 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2783 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2784 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2785 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2786
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2787 instruct vadd8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2788 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2789 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2790 format %{ "vpaddd $dst,$src,$mem\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2791 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2792 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2793 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2794 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2795 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2796 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2797
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2798 // Longs vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2799 instruct vadd2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2800 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2801 match(Set dst (AddVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2802 format %{ "paddq $dst,$src\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2803 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2804 __ paddq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2805 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2806 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2807 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2808
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2809 instruct vadd2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2810 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2811 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2812 format %{ "vpaddq $dst,$src1,$src2\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2813 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2814 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2815 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2816 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2817 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2818 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2819
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2820 instruct vadd2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2821 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2822 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2823 format %{ "vpaddq $dst,$src,$mem\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2824 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2825 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2826 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2827 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2828 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2829 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2830
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2831 instruct vadd4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2832 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2833 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2834 format %{ "vpaddq $dst,$src1,$src2\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2835 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2836 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2837 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2838 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2839 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2840 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2841
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2842 instruct vadd4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2843 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2844 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2845 format %{ "vpaddq $dst,$src,$mem\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2846 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2847 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2848 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2849 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2850 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2851 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2852
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2853 // Floats vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2854 instruct vadd2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2855 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2856 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2857 format %{ "addps $dst,$src\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2858 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2859 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2860 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2861 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2862 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2863
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2864 instruct vadd2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2865 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2866 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2867 format %{ "vaddps $dst,$src1,$src2\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2868 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2869 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2870 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2871 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2872 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2873 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2874
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2875 instruct vadd4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2876 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2877 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2878 format %{ "addps $dst,$src\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2879 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2880 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2881 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2882 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2883 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2884
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2885 instruct vadd4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2886 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2887 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2888 format %{ "vaddps $dst,$src1,$src2\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2889 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2890 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2891 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2892 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2893 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2894 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2895
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2896 instruct vadd4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2897 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2898 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2899 format %{ "vaddps $dst,$src,$mem\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2900 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2901 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2902 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2903 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2904 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2905 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2906
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2907 instruct vadd8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2908 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2909 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2910 format %{ "vaddps $dst,$src1,$src2\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2911 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2912 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2913 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2914 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2915 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2916 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2917
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2918 instruct vadd8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2919 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2920 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2921 format %{ "vaddps $dst,$src,$mem\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2922 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2923 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2924 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2925 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2926 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2927 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2928
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2929 // Doubles vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2930 instruct vadd2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2931 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2932 match(Set dst (AddVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2933 format %{ "addpd $dst,$src\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2934 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2935 __ addpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2936 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2937 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2938 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2939
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2940 instruct vadd2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2941 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2942 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2943 format %{ "vaddpd $dst,$src1,$src2\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2944 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2945 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2946 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2947 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2948 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2949 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2950
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2951 instruct vadd2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2952 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2953 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2954 format %{ "vaddpd $dst,$src,$mem\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2955 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2956 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2957 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2958 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2959 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2960 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2961
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2962 instruct vadd4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2963 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2964 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2965 format %{ "vaddpd $dst,$src1,$src2\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2966 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2967 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2968 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2969 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2970 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2971 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2972
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2973 instruct vadd4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2974 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2975 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2976 format %{ "vaddpd $dst,$src,$mem\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2977 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2978 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2979 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2980 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2981 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2982 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2983
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2984 // --------------------------------- SUB --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2985
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2986 // Bytes vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2987 instruct vsub4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2988 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2989 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2990 format %{ "psubb $dst,$src\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2991 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2992 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2993 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2994 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2995 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2996
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2997 instruct vsub4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2998 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
2999 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3000 format %{ "vpsubb $dst,$src1,$src2\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3001 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3002 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3003 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3004 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3005 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3006 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3007
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3008 instruct vsub8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3009 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3010 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3011 format %{ "psubb $dst,$src\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3012 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3013 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3014 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3015 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3016 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3017
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3018 instruct vsub8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3019 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3020 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3021 format %{ "vpsubb $dst,$src1,$src2\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3022 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3023 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3024 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3025 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3026 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3027 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3028
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3029 instruct vsub16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3030 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3031 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3032 format %{ "psubb $dst,$src\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3033 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3034 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3035 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3036 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3037 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3038
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3039 instruct vsub16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3040 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3041 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3042 format %{ "vpsubb $dst,$src1,$src2\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3043 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3044 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3045 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3046 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3047 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3048 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3049
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3050 instruct vsub16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3051 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3052 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3053 format %{ "vpsubb $dst,$src,$mem\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3054 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3055 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3056 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3057 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3058 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3059 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3060
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3061 instruct vsub32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3062 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3063 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3064 format %{ "vpsubb $dst,$src1,$src2\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3065 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3066 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3067 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3068 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3069 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3070 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3071
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3072 instruct vsub32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3073 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3074 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3075 format %{ "vpsubb $dst,$src,$mem\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3076 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3077 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3078 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3079 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3080 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3081 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3082
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3083 // Shorts/Chars vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3084 instruct vsub2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3085 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3086 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3087 format %{ "psubw $dst,$src\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3088 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3089 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3090 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3091 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3092 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3093
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3094 instruct vsub2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3095 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3096 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3097 format %{ "vpsubw $dst,$src1,$src2\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3098 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3099 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3100 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3101 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3102 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3103 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3104
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3105 instruct vsub4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3106 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3107 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3108 format %{ "psubw $dst,$src\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3109 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3110 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3111 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3112 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3113 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3114
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3115 instruct vsub4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3116 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3117 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3118 format %{ "vpsubw $dst,$src1,$src2\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3119 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3120 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3121 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3122 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3123 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3124 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3125
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3126 instruct vsub8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3127 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3128 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3129 format %{ "psubw $dst,$src\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3130 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3131 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3132 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3133 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3134 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3135
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3136 instruct vsub8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3137 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3138 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3139 format %{ "vpsubw $dst,$src1,$src2\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3140 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3141 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3142 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3143 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3144 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3145 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3146
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3147 instruct vsub8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3148 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3149 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3150 format %{ "vpsubw $dst,$src,$mem\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3151 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3152 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3153 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3154 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3155 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3156 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3157
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3158 instruct vsub16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3159 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3160 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3161 format %{ "vpsubw $dst,$src1,$src2\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3162 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3163 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3164 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3165 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3166 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3167 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3168
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3169 instruct vsub16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3170 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3171 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3172 format %{ "vpsubw $dst,$src,$mem\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3173 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3174 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3175 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3176 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3177 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3178 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3179
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3180 // Integers vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3181 instruct vsub2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3182 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3183 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3184 format %{ "psubd $dst,$src\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3185 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3186 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3187 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3188 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3189 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3190
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3191 instruct vsub2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3192 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3193 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3194 format %{ "vpsubd $dst,$src1,$src2\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3195 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3196 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3197 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3198 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3199 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3200 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3201
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3202 instruct vsub4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3203 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3204 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3205 format %{ "psubd $dst,$src\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3206 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3207 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3208 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3209 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3210 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3211
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3212 instruct vsub4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3213 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3214 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3215 format %{ "vpsubd $dst,$src1,$src2\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3216 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3217 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3218 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3219 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3220 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3221 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3222
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3223 instruct vsub4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3224 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3225 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3226 format %{ "vpsubd $dst,$src,$mem\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3227 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3228 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3229 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3230 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3231 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3232 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3233
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3234 instruct vsub8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3235 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3236 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3237 format %{ "vpsubd $dst,$src1,$src2\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3238 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3239 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3240 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3241 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3242 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3243 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3244
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3245 instruct vsub8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3246 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3247 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3248 format %{ "vpsubd $dst,$src,$mem\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3249 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3250 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3251 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3252 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3253 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3254 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3255
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3256 // Longs vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3257 instruct vsub2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3258 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3259 match(Set dst (SubVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3260 format %{ "psubq $dst,$src\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3261 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3262 __ psubq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3263 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3264 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3265 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3266
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3267 instruct vsub2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3268 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3269 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3270 format %{ "vpsubq $dst,$src1,$src2\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3271 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3272 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3273 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3274 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3275 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3276 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3277
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3278 instruct vsub2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3279 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3280 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3281 format %{ "vpsubq $dst,$src,$mem\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3282 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3283 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3284 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3285 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3286 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3287 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3288
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3289 instruct vsub4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3290 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3291 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3292 format %{ "vpsubq $dst,$src1,$src2\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3293 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3294 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3295 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3296 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3297 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3298 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3299
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3300 instruct vsub4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3301 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3302 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3303 format %{ "vpsubq $dst,$src,$mem\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3304 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3305 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3306 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3307 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3308 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3309 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3310
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3311 // Floats vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3312 instruct vsub2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3313 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3314 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3315 format %{ "subps $dst,$src\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3316 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3317 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3318 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3319 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3320 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3321
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3322 instruct vsub2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3323 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3324 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3325 format %{ "vsubps $dst,$src1,$src2\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3326 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3327 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3328 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3329 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3330 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3331 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3332
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3333 instruct vsub4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3334 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3335 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3336 format %{ "subps $dst,$src\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3337 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3338 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3339 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3340 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3341 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3342
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3343 instruct vsub4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3344 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3345 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3346 format %{ "vsubps $dst,$src1,$src2\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3347 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3348 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3349 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3350 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3351 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3352 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3353
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3354 instruct vsub4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3355 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3356 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3357 format %{ "vsubps $dst,$src,$mem\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3358 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3359 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3360 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3361 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3362 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3363 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3364
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3365 instruct vsub8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3366 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3367 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3368 format %{ "vsubps $dst,$src1,$src2\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3369 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3370 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3371 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3372 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3373 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3374 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3375
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3376 instruct vsub8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3377 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3378 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3379 format %{ "vsubps $dst,$src,$mem\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3380 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3381 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3382 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3383 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3384 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3385 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3386
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3387 // Doubles vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3388 instruct vsub2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3389 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3390 match(Set dst (SubVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3391 format %{ "subpd $dst,$src\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3392 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3393 __ subpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3394 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3395 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3396 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3397
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3398 instruct vsub2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3399 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3400 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3401 format %{ "vsubpd $dst,$src1,$src2\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3402 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3403 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3404 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3405 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3406 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3407 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3408
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3409 instruct vsub2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3410 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3411 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3412 format %{ "vsubpd $dst,$src,$mem\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3413 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3414 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3415 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3416 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3417 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3418 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3419
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3420 instruct vsub4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3421 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3422 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3423 format %{ "vsubpd $dst,$src1,$src2\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3424 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3425 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3426 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3427 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3428 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3429 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3430
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3431 instruct vsub4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3432 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3433 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3434 format %{ "vsubpd $dst,$src,$mem\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3435 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3436 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3437 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3438 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3439 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3440 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3441
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3442 // --------------------------------- MUL --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3443
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3444 // Shorts/Chars vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3445 instruct vmul2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3446 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3447 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3448 format %{ "pmullw $dst,$src\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3449 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3450 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3451 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3452 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3453 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3454
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3455 instruct vmul2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3456 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3457 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3458 format %{ "vpmullw $dst,$src1,$src2\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3459 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3460 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3461 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3462 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3463 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3464 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3465
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3466 instruct vmul4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3467 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3468 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3469 format %{ "pmullw $dst,$src\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3470 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3471 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3472 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3473 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3474 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3475
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3476 instruct vmul4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3477 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3478 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3479 format %{ "vpmullw $dst,$src1,$src2\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3480 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3481 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3482 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3483 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3484 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3485 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3486
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3487 instruct vmul8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3488 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3489 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3490 format %{ "pmullw $dst,$src\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3491 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3492 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3493 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3494 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3495 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3496
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3497 instruct vmul8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3498 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3499 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3500 format %{ "vpmullw $dst,$src1,$src2\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3501 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3502 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3503 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3504 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3505 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3506 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3507
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3508 instruct vmul8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3509 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3510 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3511 format %{ "vpmullw $dst,$src,$mem\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3512 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3513 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3514 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3515 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3516 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3517 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3518
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3519 instruct vmul16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3520 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3521 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3522 format %{ "vpmullw $dst,$src1,$src2\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3523 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3524 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3525 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3526 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3527 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3528 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3529
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3530 instruct vmul16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3531 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3532 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3533 format %{ "vpmullw $dst,$src,$mem\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3534 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3535 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3536 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3537 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3538 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3539 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3540
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3541 // Integers vector mul (sse4_1)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3542 instruct vmul2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3543 predicate(UseSSE > 3 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3544 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3545 format %{ "pmulld $dst,$src\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3546 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3547 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3548 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3549 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3550 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3551
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3552 instruct vmul2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3553 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3554 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3555 format %{ "vpmulld $dst,$src1,$src2\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3556 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3557 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3558 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3559 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3560 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3561 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3562
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3563 instruct vmul4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3564 predicate(UseSSE > 3 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3565 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3566 format %{ "pmulld $dst,$src\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3567 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3568 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3569 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3570 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3571 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3572
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3573 instruct vmul4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3574 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3575 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3576 format %{ "vpmulld $dst,$src1,$src2\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3577 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3578 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3579 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3580 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3581 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3582 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3583
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3584 instruct vmul4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3585 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3586 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3587 format %{ "vpmulld $dst,$src,$mem\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3588 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3589 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3590 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3591 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3592 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3593 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3594
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3595 instruct vmul8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3596 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3597 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3598 format %{ "vpmulld $dst,$src1,$src2\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3599 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3600 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3601 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3602 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3603 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3604 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3605
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3606 instruct vmul8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3607 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3608 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3609 format %{ "vpmulld $dst,$src,$mem\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3610 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3611 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3612 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3613 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3614 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3615 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3616
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3617 // Floats vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3618 instruct vmul2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3619 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3620 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3621 format %{ "mulps $dst,$src\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3622 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3623 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3624 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3625 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3626 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3627
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3628 instruct vmul2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3629 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3630 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3631 format %{ "vmulps $dst,$src1,$src2\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3632 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3633 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3634 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3635 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3636 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3637 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3638
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3639 instruct vmul4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3640 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3641 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3642 format %{ "mulps $dst,$src\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3643 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3644 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3645 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3646 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3647 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3648
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3649 instruct vmul4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3650 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3651 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3652 format %{ "vmulps $dst,$src1,$src2\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3653 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3654 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3655 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3656 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3657 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3658 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3659
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3660 instruct vmul4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3661 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3662 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3663 format %{ "vmulps $dst,$src,$mem\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3664 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3665 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3666 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3667 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3668 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3669 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3670
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3671 instruct vmul8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3672 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3673 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3674 format %{ "vmulps $dst,$src1,$src2\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3675 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3676 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3677 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3678 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3679 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3680 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3681
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3682 instruct vmul8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3683 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3684 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3685 format %{ "vmulps $dst,$src,$mem\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3686 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3687 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3688 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3689 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3690 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3691 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3692
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3693 // Doubles vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3694 instruct vmul2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3695 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3696 match(Set dst (MulVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3697 format %{ "mulpd $dst,$src\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3698 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3699 __ mulpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3700 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3701 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3702 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3703
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3704 instruct vmul2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3705 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3706 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3707 format %{ "vmulpd $dst,$src1,$src2\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3708 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3709 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3710 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3711 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3712 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3713 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3714
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3715 instruct vmul2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3716 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3717 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3718 format %{ "vmulpd $dst,$src,$mem\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3719 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3720 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3721 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3722 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3723 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3724 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3725
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3726 instruct vmul4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3727 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3728 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3729 format %{ "vmulpd $dst,$src1,$src2\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3730 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3731 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3732 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3733 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3734 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3735 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3736
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3737 instruct vmul4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3738 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3739 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3740 format %{ "vmulpd $dst,$src,$mem\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3741 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3742 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3743 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3744 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3745 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3746 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3747
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3748 // --------------------------------- DIV --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3749
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3750 // Floats vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3751 instruct vdiv2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3752 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3753 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3754 format %{ "divps $dst,$src\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3755 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3756 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3757 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3758 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3759 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3760
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3761 instruct vdiv2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3762 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3763 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3764 format %{ "vdivps $dst,$src1,$src2\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3765 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3766 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3767 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3768 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3769 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3770 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3771
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3772 instruct vdiv4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3773 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3774 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3775 format %{ "divps $dst,$src\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3776 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3777 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3778 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3779 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3780 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3781
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3782 instruct vdiv4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3783 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3784 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3785 format %{ "vdivps $dst,$src1,$src2\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3786 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3787 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3788 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3789 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3790 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3791 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3792
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3793 instruct vdiv4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3794 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3795 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3796 format %{ "vdivps $dst,$src,$mem\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3797 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3798 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3799 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3800 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3801 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3802 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3803
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3804 instruct vdiv8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3805 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3806 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3807 format %{ "vdivps $dst,$src1,$src2\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3808 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3809 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3810 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3811 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3812 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3813 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3814
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3815 instruct vdiv8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3816 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3817 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3818 format %{ "vdivps $dst,$src,$mem\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3819 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3820 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3821 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3822 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3823 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3824 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3825
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3826 // Doubles vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3827 instruct vdiv2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3828 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3829 match(Set dst (DivVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3830 format %{ "divpd $dst,$src\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3831 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3832 __ divpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3833 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3834 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3835 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3836
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3837 instruct vdiv2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3838 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3839 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3840 format %{ "vdivpd $dst,$src1,$src2\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3841 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3842 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3843 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3844 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3845 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3846 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3847
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3848 instruct vdiv2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3849 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3850 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3851 format %{ "vdivpd $dst,$src,$mem\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3852 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3853 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3854 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3855 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3856 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3857 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3858
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3859 instruct vdiv4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3860 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3861 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3862 format %{ "vdivpd $dst,$src1,$src2\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3863 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3864 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3865 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3866 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3867 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3868 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3869
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3870 instruct vdiv4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3871 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3872 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3873 format %{ "vdivpd $dst,$src,$mem\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3874 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3875 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3876 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3877 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3878 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3879 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3880
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3881 // ------------------------------ Shift ---------------------------------------
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3882
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3883 // Left and right shift count vectors are the same on x86
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3884 // (only lowest bits of xmm reg are used for count).
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3885 instruct vshiftcnt(vecS dst, rRegI cnt) %{
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3886 match(Set dst (LShiftCntV cnt));
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3887 match(Set dst (RShiftCntV cnt));
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3888 format %{ "movd $dst,$cnt\t! load shift count" %}
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3889 ins_encode %{
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3890 __ movdl($dst$$XMMRegister, $cnt$$Register);
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3891 %}
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3892 ins_pipe( pipe_slow );
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3893 %}
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3894
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3895 // ------------------------------ LeftShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3896
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3897 // Shorts/Chars vector left shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3898 instruct vsll2S(vecS dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3899 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3900 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3901 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3902 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3903 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3904 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3905 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3906 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3907
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3908 instruct vsll2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3909 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3910 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3911 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3912 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3913 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3914 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3915 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3916 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3917
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3918 instruct vsll2S_reg(vecS dst, vecS src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3919 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3920 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3921 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3922 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3923 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3924 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3925 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3926 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3927 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3928
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3929 instruct vsll2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3930 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3931 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3932 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3933 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3934 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3935 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3936 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3937 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3938 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3939
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3940 instruct vsll4S(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3941 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3942 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3943 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3944 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3945 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3946 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3947 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3948 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3949
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3950 instruct vsll4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3951 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3952 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3953 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3954 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3955 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3956 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3957 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3958 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3959
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3960 instruct vsll4S_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3961 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3962 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3963 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3964 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3965 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3966 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3967 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3968 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3969 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3970
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3971 instruct vsll4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3972 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3973 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3974 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3975 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3976 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3977 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3978 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3979 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3980 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3981
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
3982 instruct vsll8S(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3983 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3984 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3985 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3986 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3987 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3988 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3989 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3990 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3991
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3992 instruct vsll8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3993 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3994 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3995 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3996 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3997 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3998 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
3999 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4000 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4001
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4002 instruct vsll8S_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4003 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4004 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4005 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4006 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4007 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4008 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4009 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4010 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4011 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4012
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4013 instruct vsll8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4014 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4015 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4016 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4017 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4018 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4019 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4020 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4021 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4022 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4023
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4024 instruct vsll16S_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4025 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4026 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4027 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4028 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4029 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4030 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4031 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4032 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4033 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4034
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4035 instruct vsll16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4036 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4037 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4038 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4039 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4040 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4041 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4042 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4043 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4044 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4045
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4046 // Integers vector left shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4047 instruct vsll2I(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4048 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4049 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4050 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4051 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4052 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4053 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4054 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4055 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4056
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4057 instruct vsll2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4058 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4059 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4060 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4061 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4062 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4063 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4064 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4065 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4066
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4067 instruct vsll2I_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4068 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4069 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4070 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4071 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4072 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4073 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4074 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4075 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4076 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4077
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4078 instruct vsll2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4079 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4080 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4081 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4082 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4083 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4084 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4085 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4086 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4087 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4088
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4089 instruct vsll4I(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4090 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4091 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4092 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4093 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4094 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4095 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4096 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4097 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4098
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4099 instruct vsll4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4100 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4101 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4102 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4103 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4104 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4105 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4106 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4107 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4108
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4109 instruct vsll4I_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4110 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4111 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4112 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4113 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4114 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4115 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4116 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4117 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4118 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4119
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4120 instruct vsll4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4121 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4122 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4123 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4124 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4125 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4126 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4127 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4128 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4129 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4130
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4131 instruct vsll8I_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4132 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4133 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4134 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4135 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4136 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4137 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4138 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4139 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4140 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4141
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4142 instruct vsll8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4143 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4144 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4145 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4146 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4147 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4148 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4149 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4150 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4151 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4152
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4153 // Longs vector left shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4154 instruct vsll2L(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4155 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4156 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4157 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4158 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4159 __ psllq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4160 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4161 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4162 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4163
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4164 instruct vsll2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4165 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4166 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4167 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4168 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4169 __ psllq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4170 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4171 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4172 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4173
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4174 instruct vsll2L_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4175 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4176 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4177 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4178 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4179 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4180 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4181 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4182 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4183 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4184
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4185 instruct vsll2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4186 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4187 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4188 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4189 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4190 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4191 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4192 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4193 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4194 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4195
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4196 instruct vsll4L_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4197 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4198 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4199 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4200 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4201 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4202 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4203 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4204 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4205 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4206
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4207 instruct vsll4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4208 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4209 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4210 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4211 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4212 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4213 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4214 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4215 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4216 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4217
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4218 // ----------------------- LogicalRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4219
6893
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4220 // Shorts vector logical right shift produces incorrect Java result
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4221 // for negative data because java code convert short value into int with
6893
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4222 // sign extension before a shift. But char vectors are fine since chars are
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4223 // unsigned values.
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4224
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4225 instruct vsrl2S(vecS dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4226 predicate(n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4227 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4228 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4229 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4230 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4231 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4232 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4233 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4234
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4235 instruct vsrl2S_imm(vecS dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4236 predicate(n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4237 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4238 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4239 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4240 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4241 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4242 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4243 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4244
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4245 instruct vsrl2S_reg(vecS dst, vecS src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4246 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4247 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4248 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4249 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4250 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4251 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4252 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4253 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4254 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4255
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4256 instruct vsrl2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4257 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4258 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4259 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4260 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4261 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4262 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4263 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4264 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4265 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4266
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4267 instruct vsrl4S(vecD dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4268 predicate(n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4269 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4270 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4271 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4272 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4273 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4274 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4275 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4276
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4277 instruct vsrl4S_imm(vecD dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4278 predicate(n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4279 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4280 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4281 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4282 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4283 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4284 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4285 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4286
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4287 instruct vsrl4S_reg(vecD dst, vecD src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4288 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4289 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4290 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4291 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4292 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4293 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4294 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4295 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4296 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4297
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4298 instruct vsrl4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4299 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4300 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4301 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4302 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4303 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4304 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4305 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4306 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4307 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4308
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4309 instruct vsrl8S(vecX dst, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4310 predicate(n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4311 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4312 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4313 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4314 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4315 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4316 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4317 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4318
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4319 instruct vsrl8S_imm(vecX dst, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4320 predicate(n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4321 match(Set dst (URShiftVS dst shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4322 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4323 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4324 __ psrlw($dst$$XMMRegister, (int)$shift$$constant);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4325 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4326 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4327 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4328
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4329 instruct vsrl8S_reg(vecX dst, vecX src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4330 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4331 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4332 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4333 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4334 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4335 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4336 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4337 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4338 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4339
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4340 instruct vsrl8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4341 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4342 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4343 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4344 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4345 bool vector256 = false;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4346 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4347 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4348 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4349 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4350
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4351 instruct vsrl16S_reg(vecY dst, vecY src, vecS shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4352 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4353 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4354 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4355 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4356 bool vector256 = true;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4357 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4358 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4359 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4360 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4361
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4362 instruct vsrl16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4363 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4364 match(Set dst (URShiftVS src shift));
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4365 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4366 ins_encode %{
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4367 bool vector256 = true;
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4368 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4369 %}
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4370 ins_pipe( pipe_slow );
b2c669fd8114 8001183: incorrect results of char vectors right shift operaiton
kvn
parents: 6823
diff changeset
4371 %}
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4372
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4373 // Integers vector logical right shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4374 instruct vsrl2I(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4375 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4376 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4377 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4378 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4379 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4380 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4381 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4382 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4383
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4384 instruct vsrl2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4385 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4386 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4387 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4388 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4389 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4390 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4391 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4392 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4393
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4394 instruct vsrl2I_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4395 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4396 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4397 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4398 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4399 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4400 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4401 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4402 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4403 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4404
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4405 instruct vsrl2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4406 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4407 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4408 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4409 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4410 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4411 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4412 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4413 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4414 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4415
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4416 instruct vsrl4I(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4417 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4418 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4419 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4420 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4421 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4422 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4423 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4424 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4425
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4426 instruct vsrl4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4427 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4428 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4429 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4430 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4431 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4432 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4433 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4434 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4435
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4436 instruct vsrl4I_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4437 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4438 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4439 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4440 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4441 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4442 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4443 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4444 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4445 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4446
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4447 instruct vsrl4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4448 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4449 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4450 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4451 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4452 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4453 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4454 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4455 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4456 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4457
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4458 instruct vsrl8I_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4459 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4460 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4461 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4462 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4463 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4464 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4465 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4466 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4467 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4468
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4469 instruct vsrl8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4470 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4471 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4472 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4473 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4474 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4475 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4476 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4477 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4478 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4479
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4480 // Longs vector logical right shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4481 instruct vsrl2L(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4482 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4483 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4484 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4485 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4486 __ psrlq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4487 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4488 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4489 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4490
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4491 instruct vsrl2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4492 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4493 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4494 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4495 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4496 __ psrlq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4497 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4498 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4499 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4500
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4501 instruct vsrl2L_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4502 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4503 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4504 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4505 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4506 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4507 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4508 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4509 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4510 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4511
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4512 instruct vsrl2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4513 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4514 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4515 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4516 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4517 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4518 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4519 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4520 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4521 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4522
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4523 instruct vsrl4L_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4524 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4525 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4526 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4527 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4528 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4529 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4530 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4531 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4532 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4533
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4534 instruct vsrl4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4535 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4536 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4537 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4538 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4539 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4540 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4541 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4542 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4543 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4544
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4545 // ------------------- ArithmeticRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4546
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4547 // Shorts/Chars vector arithmetic right shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4548 instruct vsra2S(vecS dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4549 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4550 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4551 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4552 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4553 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4554 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4555 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4556 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4557
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4558 instruct vsra2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4559 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4560 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4561 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4562 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4563 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4564 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4565 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4566 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4567
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4568 instruct vsra2S_reg(vecS dst, vecS src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4569 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4570 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4571 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4572 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4573 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4574 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4575 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4576 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4577 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4578
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4579 instruct vsra2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4580 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4581 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4582 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4583 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4584 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4585 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4586 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4587 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4588 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4589
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4590 instruct vsra4S(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4591 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4592 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4593 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4594 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4595 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4596 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4597 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4598 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4599
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4600 instruct vsra4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4601 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4602 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4603 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4604 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4605 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4606 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4607 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4608 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4609
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4610 instruct vsra4S_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4611 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4612 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4613 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4614 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4615 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4616 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4617 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4618 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4619 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4620
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4621 instruct vsra4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4622 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4623 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4624 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4625 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4626 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4627 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4628 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4629 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4630 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4631
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4632 instruct vsra8S(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4633 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4634 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4635 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4636 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4637 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4638 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4639 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4640 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4641
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4642 instruct vsra8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4643 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4644 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4645 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4646 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4647 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4648 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4649 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4650 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4651
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4652 instruct vsra8S_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4653 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4654 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4655 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4656 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4657 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4658 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4659 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4660 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4661 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4662
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4663 instruct vsra8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4664 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4665 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4666 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4667 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4668 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4669 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4670 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4671 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4672 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4673
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4674 instruct vsra16S_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4675 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4676 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4677 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4678 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4679 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4680 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4681 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4682 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4683 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4684
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4685 instruct vsra16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4686 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4687 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4688 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4689 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4690 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4691 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4692 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4693 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4694 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4695
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4696 // Integers vector arithmetic right shift
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4697 instruct vsra2I(vecD dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4698 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4699 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4700 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4701 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4702 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4703 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4704 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4705 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4706
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4707 instruct vsra2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4708 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4709 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4710 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4711 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4712 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4713 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4714 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4715 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4716
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4717 instruct vsra2I_reg(vecD dst, vecD src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4718 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4719 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4720 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4721 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4722 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4723 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4724 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4725 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4726 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4727
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4728 instruct vsra2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4729 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4730 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4731 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4732 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4733 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4734 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4735 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4736 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4737 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4738
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4739 instruct vsra4I(vecX dst, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4740 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4741 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4742 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4743 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4744 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4745 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4746 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4747 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4748
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4749 instruct vsra4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4750 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4751 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4752 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4753 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4754 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4755 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4756 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4757 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4758
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4759 instruct vsra4I_reg(vecX dst, vecX src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4760 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4761 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4762 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4763 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4764 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4765 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4766 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4767 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4768 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4769
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4770 instruct vsra4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4771 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4772 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4773 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4774 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4775 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4776 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4777 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4778 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4779 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4780
6823
859c45fb8cea 7201026: add vector for shift count
kvn
parents: 6795
diff changeset
4781 instruct vsra8I_reg(vecY dst, vecY src, vecS shift) %{
6614
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4782 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4783 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4784 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4785 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4786 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4787 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4788 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4789 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4790 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4791
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4792 instruct vsra8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4793 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4794 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4795 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4796 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4797 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4798 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4799 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4800 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4801 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4802
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4803 // There are no longs vector arithmetic right shift instructions.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4804
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4805
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4806 // --------------------------------- AND --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4807
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4808 instruct vand4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4809 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4810 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4811 format %{ "pand $dst,$src\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4812 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4813 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4814 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4815 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4816 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4817
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4818 instruct vand4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4819 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4820 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4821 format %{ "vpand $dst,$src1,$src2\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4822 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4823 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4824 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4825 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4826 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4827 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4828
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4829 instruct vand8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4830 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4831 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4832 format %{ "pand $dst,$src\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4833 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4834 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4835 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4836 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4837 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4838
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4839 instruct vand8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4840 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4841 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4842 format %{ "vpand $dst,$src1,$src2\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4843 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4844 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4845 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4846 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4847 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4848 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4849
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4850 instruct vand16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4851 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4852 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4853 format %{ "pand $dst,$src\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4854 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4855 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4856 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4857 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4858 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4859
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4860 instruct vand16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4861 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4862 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4863 format %{ "vpand $dst,$src1,$src2\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4864 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4865 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4866 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4867 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4868 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4869 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4870
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4871 instruct vand16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4872 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4873 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4874 format %{ "vpand $dst,$src,$mem\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4875 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4876 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4877 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4878 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4879 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4880 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4881
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4882 instruct vand32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4883 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4884 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4885 format %{ "vpand $dst,$src1,$src2\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4886 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4887 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4888 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4889 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4890 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4891 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4892
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4893 instruct vand32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4894 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4895 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4896 format %{ "vpand $dst,$src,$mem\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4897 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4898 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4899 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4900 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4901 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4902 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4903
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4904 // --------------------------------- OR ---------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4905
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4906 instruct vor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4907 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4908 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4909 format %{ "por $dst,$src\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4910 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4911 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4912 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4913 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4914 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4915
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4916 instruct vor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4917 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4918 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4919 format %{ "vpor $dst,$src1,$src2\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4920 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4921 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4922 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4923 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4924 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4925 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4926
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4927 instruct vor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4928 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4929 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4930 format %{ "por $dst,$src\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4931 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4932 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4933 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4934 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4935 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4936
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4937 instruct vor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4938 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4939 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4940 format %{ "vpor $dst,$src1,$src2\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4941 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4942 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4943 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4944 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4945 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4946 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4947
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4948 instruct vor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4949 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4950 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4951 format %{ "por $dst,$src\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4952 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4953 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4954 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4955 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4956 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4957
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4958 instruct vor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4959 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4960 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4961 format %{ "vpor $dst,$src1,$src2\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4962 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4963 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4964 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4965 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4966 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4967 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4968
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4969 instruct vor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4970 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4971 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4972 format %{ "vpor $dst,$src,$mem\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4973 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4974 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4975 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4976 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4977 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4978 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4979
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4980 instruct vor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4981 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4982 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4983 format %{ "vpor $dst,$src1,$src2\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4984 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4985 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4986 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4987 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4988 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4989 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4990
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4991 instruct vor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4992 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4993 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4994 format %{ "vpor $dst,$src,$mem\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4995 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4996 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4997 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4998 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
4999 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5000 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5001
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5002 // --------------------------------- XOR --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5003
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5004 instruct vxor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5005 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5006 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5007 format %{ "pxor $dst,$src\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5008 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5009 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5010 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5011 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5012 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5013
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5014 instruct vxor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5015 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5016 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5017 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5018 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5019 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5020 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5021 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5022 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5023 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5024
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5025 instruct vxor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5026 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5027 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5028 format %{ "pxor $dst,$src\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5029 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5030 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5031 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5032 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5033 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5034
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5035 instruct vxor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5036 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5037 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5038 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5039 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5040 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5041 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5042 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5043 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5044 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5045
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5046 instruct vxor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5047 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5048 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5049 format %{ "pxor $dst,$src\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5050 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5051 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5052 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5053 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5054 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5055
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5056 instruct vxor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5057 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5058 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5059 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5060 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5061 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5062 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5063 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5064 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5065 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5066
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5067 instruct vxor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5068 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5069 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5070 format %{ "vpxor $dst,$src,$mem\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5071 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5072 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5073 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5074 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5075 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5076 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5077
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5078 instruct vxor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5079 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5080 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5081 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5082 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5083 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5084 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5085 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5086 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5087 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5088
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5089 instruct vxor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5090 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5091 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5092 format %{ "vpxor $dst,$src,$mem\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5093 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5094 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5095 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5096 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5097 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5098 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server
kvn
parents: 6225
diff changeset
5099