Mercurial > hg > graal-jvmci-8
annotate src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp @ 113:ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
Summary: Compressed oops in instances, arrays, and headers. Code contributors are coleenp, phh, never, swamyv
Reviewed-by: jmasa, kamg, acorn, tbell, kvn, rasbold
author | coleenp |
---|---|
date | Sun, 13 Apr 2008 17:43:42 -0400 |
parents | d5fc211aea19 |
children | d1605aabd0a1 37f87013dfd8 |
rev | line source |
---|---|
0 | 1 /* |
2 * Copyright 2005-2006 Sun Microsystems, Inc. All Rights Reserved. | |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
21 * have any questions. | |
22 * | |
23 */ | |
24 | |
25 # include "incls/_precompiled.incl" | |
26 # include "incls/_c1_LIRGenerator_sparc.cpp.incl" | |
27 | |
28 #ifdef ASSERT | |
29 #define __ gen()->lir(__FILE__, __LINE__)-> | |
30 #else | |
31 #define __ gen()->lir()-> | |
32 #endif | |
33 | |
34 void LIRItem::load_byte_item() { | |
35 // byte loads use same registers as other loads | |
36 load_item(); | |
37 } | |
38 | |
39 | |
40 void LIRItem::load_nonconstant() { | |
41 LIR_Opr r = value()->operand(); | |
42 if (_gen->can_inline_as_constant(value())) { | |
43 if (!r->is_constant()) { | |
44 r = LIR_OprFact::value_type(value()->type()); | |
45 } | |
46 _result = r; | |
47 } else { | |
48 load_item(); | |
49 } | |
50 } | |
51 | |
52 | |
53 //-------------------------------------------------------------- | |
54 // LIRGenerator | |
55 //-------------------------------------------------------------- | |
56 | |
57 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; } | |
58 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; } | |
59 LIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); } | |
60 LIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(T_INT); } | |
61 | |
62 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { | |
63 LIR_Opr opr; | |
64 switch (type->tag()) { | |
65 case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break; | |
66 case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break; | |
67 case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break; | |
68 case floatTag: opr = FrameMap::F0_opr; break; | |
69 case doubleTag: opr = FrameMap::F0_double_opr; break; | |
70 | |
71 case addressTag: | |
72 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; | |
73 } | |
74 | |
75 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); | |
76 return opr; | |
77 } | |
78 | |
79 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) { | |
80 LIR_Opr reg = new_register(type); | |
81 set_vreg_flag(reg, callee_saved); | |
82 return reg; | |
83 } | |
84 | |
85 | |
86 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { | |
87 return new_register(T_INT); | |
88 } | |
89 | |
90 | |
91 | |
92 | |
93 | |
94 //--------- loading items into registers -------------------------------- | |
95 | |
96 // SPARC cannot inline all constants | |
97 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { | |
98 if (v->type()->as_IntConstant() != NULL) { | |
99 return v->type()->as_IntConstant()->value() == 0; | |
100 } else if (v->type()->as_LongConstant() != NULL) { | |
101 return v->type()->as_LongConstant()->value() == 0L; | |
102 } else if (v->type()->as_ObjectConstant() != NULL) { | |
103 return v->type()->as_ObjectConstant()->value()->is_null_object(); | |
104 } else { | |
105 return false; | |
106 } | |
107 } | |
108 | |
109 | |
110 // only simm13 constants can be inlined | |
111 bool LIRGenerator:: can_inline_as_constant(Value i) const { | |
112 if (i->type()->as_IntConstant() != NULL) { | |
113 return Assembler::is_simm13(i->type()->as_IntConstant()->value()); | |
114 } else { | |
115 return can_store_as_constant(i, as_BasicType(i->type())); | |
116 } | |
117 } | |
118 | |
119 | |
120 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const { | |
121 if (c->type() == T_INT) { | |
122 return Assembler::is_simm13(c->as_jint()); | |
123 } | |
124 return false; | |
125 } | |
126 | |
127 | |
128 LIR_Opr LIRGenerator::safepoint_poll_register() { | |
129 return new_register(T_INT); | |
130 } | |
131 | |
132 | |
133 | |
134 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, | |
135 int shift, int disp, BasicType type) { | |
136 assert(base->is_register(), "must be"); | |
137 | |
138 // accumulate fixed displacements | |
139 if (index->is_constant()) { | |
140 disp += index->as_constant_ptr()->as_jint() << shift; | |
141 index = LIR_OprFact::illegalOpr; | |
142 } | |
143 | |
144 if (index->is_register()) { | |
145 // apply the shift and accumulate the displacement | |
146 if (shift > 0) { | |
147 LIR_Opr tmp = new_register(T_INT); | |
148 __ shift_left(index, shift, tmp); | |
149 index = tmp; | |
150 } | |
151 if (disp != 0) { | |
152 LIR_Opr tmp = new_register(T_INT); | |
153 if (Assembler::is_simm13(disp)) { | |
154 __ add(tmp, LIR_OprFact::intConst(disp), tmp); | |
155 index = tmp; | |
156 } else { | |
157 __ move(LIR_OprFact::intConst(disp), tmp); | |
158 __ add(tmp, index, tmp); | |
159 index = tmp; | |
160 } | |
161 disp = 0; | |
162 } | |
163 } else if (disp != 0 && !Assembler::is_simm13(disp)) { | |
164 // index is illegal so replace it with the displacement loaded into a register | |
165 index = new_register(T_INT); | |
166 __ move(LIR_OprFact::intConst(disp), index); | |
167 disp = 0; | |
168 } | |
169 | |
170 // at this point we either have base + index or base + displacement | |
171 if (disp == 0) { | |
172 return new LIR_Address(base, index, type); | |
173 } else { | |
174 assert(Assembler::is_simm13(disp), "must be"); | |
175 return new LIR_Address(base, disp, type); | |
176 } | |
177 } | |
178 | |
179 | |
180 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, | |
181 BasicType type, bool needs_card_mark) { | |
29
d5fc211aea19
6633953: type2aelembytes{T_ADDRESS} should be 8 bytes in 64 bit VM
kvn
parents:
0
diff
changeset
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182 int elem_size = type2aelembytes(type); |
0 | 183 int shift = exact_log2(elem_size); |
184 | |
185 LIR_Opr base_opr; | |
186 int offset = arrayOopDesc::base_offset_in_bytes(type); | |
187 | |
188 if (index_opr->is_constant()) { | |
189 int i = index_opr->as_constant_ptr()->as_jint(); | |
190 int array_offset = i * elem_size; | |
191 if (Assembler::is_simm13(array_offset + offset)) { | |
192 base_opr = array_opr; | |
193 offset = array_offset + offset; | |
194 } else { | |
195 base_opr = new_pointer_register(); | |
196 if (Assembler::is_simm13(array_offset)) { | |
197 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr); | |
198 } else { | |
199 __ move(LIR_OprFact::intptrConst(array_offset), base_opr); | |
200 __ add(base_opr, array_opr, base_opr); | |
201 } | |
202 } | |
203 } else { | |
204 #ifdef _LP64 | |
205 if (index_opr->type() == T_INT) { | |
206 LIR_Opr tmp = new_register(T_LONG); | |
207 __ convert(Bytecodes::_i2l, index_opr, tmp); | |
208 index_opr = tmp; | |
209 } | |
210 #endif | |
211 | |
212 base_opr = new_pointer_register(); | |
213 assert (index_opr->is_register(), "Must be register"); | |
214 if (shift > 0) { | |
215 __ shift_left(index_opr, shift, base_opr); | |
216 __ add(base_opr, array_opr, base_opr); | |
217 } else { | |
218 __ add(index_opr, array_opr, base_opr); | |
219 } | |
220 } | |
221 if (needs_card_mark) { | |
222 LIR_Opr ptr = new_pointer_register(); | |
223 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr); | |
224 return new LIR_Address(ptr, 0, type); | |
225 } else { | |
226 return new LIR_Address(base_opr, offset, type); | |
227 } | |
228 } | |
229 | |
230 | |
231 void LIRGenerator::increment_counter(address counter, int step) { | |
232 LIR_Opr pointer = new_pointer_register(); | |
233 __ move(LIR_OprFact::intptrConst(counter), pointer); | |
234 LIR_Address* addr = new LIR_Address(pointer, 0, T_INT); | |
235 increment_counter(addr, step); | |
236 } | |
237 | |
238 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { | |
239 LIR_Opr temp = new_register(T_INT); | |
240 __ move(addr, temp); | |
241 LIR_Opr c = LIR_OprFact::intConst(step); | |
242 if (Assembler::is_simm13(step)) { | |
243 __ add(temp, c, temp); | |
244 } else { | |
245 LIR_Opr temp2 = new_register(T_INT); | |
246 __ move(c, temp2); | |
247 __ add(temp, temp2, temp); | |
248 } | |
249 __ move(temp, addr); | |
250 } | |
251 | |
252 | |
253 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
254 LIR_Opr o7opr = FrameMap::O7_opr; | |
255 __ load(new LIR_Address(base, disp, T_INT), o7opr, info); | |
256 __ cmp(condition, o7opr, c); | |
257 } | |
258 | |
259 | |
260 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { | |
261 LIR_Opr o7opr = FrameMap::O7_opr; | |
262 __ load(new LIR_Address(base, disp, type), o7opr, info); | |
263 __ cmp(condition, reg, o7opr); | |
264 } | |
265 | |
266 | |
267 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { | |
268 LIR_Opr o7opr = FrameMap::O7_opr; | |
269 __ load(new LIR_Address(base, disp, type), o7opr, info); | |
270 __ cmp(condition, reg, o7opr); | |
271 } | |
272 | |
273 | |
274 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { | |
275 assert(left != result, "should be different registers"); | |
276 if (is_power_of_2(c + 1)) { | |
277 __ shift_left(left, log2_intptr(c + 1), result); | |
278 __ sub(result, left, result); | |
279 return true; | |
280 } else if (is_power_of_2(c - 1)) { | |
281 __ shift_left(left, log2_intptr(c - 1), result); | |
282 __ add(result, left, result); | |
283 return true; | |
284 } | |
285 return false; | |
286 } | |
287 | |
288 | |
289 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { | |
290 BasicType t = item->type(); | |
291 LIR_Opr sp_opr = FrameMap::SP_opr; | |
292 if ((t == T_LONG || t == T_DOUBLE) && | |
293 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) { | |
294 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t)); | |
295 } else { | |
296 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t)); | |
297 } | |
298 } | |
299 | |
300 //---------------------------------------------------------------------- | |
301 // visitor functions | |
302 //---------------------------------------------------------------------- | |
303 | |
304 | |
305 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { | |
306 assert(x->is_root(),""); | |
307 bool needs_range_check = true; | |
308 bool use_length = x->length() != NULL; | |
309 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; | |
310 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || | |
311 !get_jobject_constant(x->value())->is_null_object()); | |
312 | |
313 LIRItem array(x->array(), this); | |
314 LIRItem index(x->index(), this); | |
315 LIRItem value(x->value(), this); | |
316 LIRItem length(this); | |
317 | |
318 array.load_item(); | |
319 index.load_nonconstant(); | |
320 | |
321 if (use_length) { | |
322 needs_range_check = x->compute_needs_range_check(); | |
323 if (needs_range_check) { | |
324 length.set_instruction(x->length()); | |
325 length.load_item(); | |
326 } | |
327 } | |
328 if (needs_store_check) { | |
329 value.load_item(); | |
330 } else { | |
331 value.load_for_store(x->elt_type()); | |
332 } | |
333 | |
334 set_no_result(x); | |
335 | |
336 // the CodeEmitInfo must be duplicated for each different | |
337 // LIR-instruction because spilling can occur anywhere between two | |
338 // instructions and so the debug information must be different | |
339 CodeEmitInfo* range_check_info = state_for(x); | |
340 CodeEmitInfo* null_check_info = NULL; | |
341 if (x->needs_null_check()) { | |
342 null_check_info = new CodeEmitInfo(range_check_info); | |
343 } | |
344 | |
345 // emit array address setup early so it schedules better | |
346 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); | |
347 | |
348 if (GenerateRangeChecks && needs_range_check) { | |
349 if (use_length) { | |
350 __ cmp(lir_cond_belowEqual, length.result(), index.result()); | |
351 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); | |
352 } else { | |
353 array_range_check(array.result(), index.result(), null_check_info, range_check_info); | |
354 // range_check also does the null check | |
355 null_check_info = NULL; | |
356 } | |
357 } | |
358 | |
359 if (GenerateArrayStoreCheck && needs_store_check) { | |
360 LIR_Opr tmp1 = FrameMap::G1_opr; | |
361 LIR_Opr tmp2 = FrameMap::G3_opr; | |
362 LIR_Opr tmp3 = FrameMap::G5_opr; | |
363 | |
364 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); | |
365 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info); | |
366 } | |
367 | |
368 __ move(value.result(), array_addr, null_check_info); | |
369 if (obj_store) { | |
370 // Is this precise? | |
371 post_barrier(LIR_OprFact::address(array_addr), value.result()); | |
372 } | |
373 } | |
374 | |
375 | |
376 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { | |
377 assert(x->is_root(),""); | |
378 LIRItem obj(x->obj(), this); | |
379 obj.load_item(); | |
380 | |
381 set_no_result(x); | |
382 | |
383 LIR_Opr lock = FrameMap::G1_opr; | |
384 LIR_Opr scratch = FrameMap::G3_opr; | |
385 LIR_Opr hdr = FrameMap::G4_opr; | |
386 | |
387 CodeEmitInfo* info_for_exception = NULL; | |
388 if (x->needs_null_check()) { | |
389 info_for_exception = state_for(x, x->lock_stack_before()); | |
390 } | |
391 | |
392 // this CodeEmitInfo must not have the xhandlers because here the | |
393 // object is already locked (xhandlers expects object to be unlocked) | |
394 CodeEmitInfo* info = state_for(x, x->state(), true); | |
395 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info); | |
396 } | |
397 | |
398 | |
399 void LIRGenerator::do_MonitorExit(MonitorExit* x) { | |
400 assert(x->is_root(),""); | |
401 LIRItem obj(x->obj(), this); | |
402 obj.dont_load_item(); | |
403 | |
404 set_no_result(x); | |
405 LIR_Opr lock = FrameMap::G1_opr; | |
406 LIR_Opr hdr = FrameMap::G3_opr; | |
407 LIR_Opr obj_temp = FrameMap::G4_opr; | |
408 monitor_exit(obj_temp, lock, hdr, x->monitor_no()); | |
409 } | |
410 | |
411 | |
412 // _ineg, _lneg, _fneg, _dneg | |
413 void LIRGenerator::do_NegateOp(NegateOp* x) { | |
414 LIRItem value(x->x(), this); | |
415 value.load_item(); | |
416 LIR_Opr reg = rlock_result(x); | |
417 __ negate(value.result(), reg); | |
418 } | |
419 | |
420 | |
421 | |
422 // for _fadd, _fmul, _fsub, _fdiv, _frem | |
423 // _dadd, _dmul, _dsub, _ddiv, _drem | |
424 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { | |
425 switch (x->op()) { | |
426 case Bytecodes::_fadd: | |
427 case Bytecodes::_fmul: | |
428 case Bytecodes::_fsub: | |
429 case Bytecodes::_fdiv: | |
430 case Bytecodes::_dadd: | |
431 case Bytecodes::_dmul: | |
432 case Bytecodes::_dsub: | |
433 case Bytecodes::_ddiv: { | |
434 LIRItem left(x->x(), this); | |
435 LIRItem right(x->y(), this); | |
436 left.load_item(); | |
437 right.load_item(); | |
438 rlock_result(x); | |
439 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp()); | |
440 } | |
441 break; | |
442 | |
443 case Bytecodes::_frem: | |
444 case Bytecodes::_drem: { | |
445 address entry; | |
446 switch (x->op()) { | |
447 case Bytecodes::_frem: | |
448 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem); | |
449 break; | |
450 case Bytecodes::_drem: | |
451 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem); | |
452 break; | |
453 default: | |
454 ShouldNotReachHere(); | |
455 } | |
456 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL); | |
457 set_result(x, result); | |
458 } | |
459 break; | |
460 | |
461 default: ShouldNotReachHere(); | |
462 } | |
463 } | |
464 | |
465 | |
466 // for _ladd, _lmul, _lsub, _ldiv, _lrem | |
467 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { | |
468 switch (x->op()) { | |
469 case Bytecodes::_lrem: | |
470 case Bytecodes::_lmul: | |
471 case Bytecodes::_ldiv: { | |
472 | |
473 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) { | |
474 LIRItem right(x->y(), this); | |
475 right.load_item(); | |
476 | |
477 CodeEmitInfo* info = state_for(x); | |
478 LIR_Opr item = right.result(); | |
479 assert(item->is_register(), "must be"); | |
480 __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0)); | |
481 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); | |
482 } | |
483 | |
484 address entry; | |
485 switch (x->op()) { | |
486 case Bytecodes::_lrem: | |
487 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); | |
488 break; // check if dividend is 0 is done elsewhere | |
489 case Bytecodes::_ldiv: | |
490 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); | |
491 break; // check if dividend is 0 is done elsewhere | |
492 case Bytecodes::_lmul: | |
493 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); | |
494 break; | |
495 default: | |
496 ShouldNotReachHere(); | |
497 } | |
498 | |
499 // order of arguments to runtime call is reversed. | |
500 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL); | |
501 set_result(x, result); | |
502 break; | |
503 } | |
504 case Bytecodes::_ladd: | |
505 case Bytecodes::_lsub: { | |
506 LIRItem left(x->x(), this); | |
507 LIRItem right(x->y(), this); | |
508 left.load_item(); | |
509 right.load_item(); | |
510 rlock_result(x); | |
511 | |
512 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); | |
513 break; | |
514 } | |
515 default: ShouldNotReachHere(); | |
516 } | |
517 } | |
518 | |
519 | |
520 // Returns if item is an int constant that can be represented by a simm13 | |
521 static bool is_simm13(LIR_Opr item) { | |
522 if (item->is_constant() && item->type() == T_INT) { | |
523 return Assembler::is_simm13(item->as_constant_ptr()->as_jint()); | |
524 } else { | |
525 return false; | |
526 } | |
527 } | |
528 | |
529 | |
530 // for: _iadd, _imul, _isub, _idiv, _irem | |
531 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { | |
532 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem; | |
533 LIRItem left(x->x(), this); | |
534 LIRItem right(x->y(), this); | |
535 // missing test if instr is commutative and if we should swap | |
536 right.load_nonconstant(); | |
537 assert(right.is_constant() || right.is_register(), "wrong state of right"); | |
538 left.load_item(); | |
539 rlock_result(x); | |
540 if (is_div_rem) { | |
541 CodeEmitInfo* info = state_for(x); | |
542 LIR_Opr tmp = FrameMap::G1_opr; | |
543 if (x->op() == Bytecodes::_irem) { | |
544 __ irem(left.result(), right.result(), x->operand(), tmp, info); | |
545 } else if (x->op() == Bytecodes::_idiv) { | |
546 __ idiv(left.result(), right.result(), x->operand(), tmp, info); | |
547 } | |
548 } else { | |
549 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr); | |
550 } | |
551 } | |
552 | |
553 | |
554 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { | |
555 ValueTag tag = x->type()->tag(); | |
556 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); | |
557 switch (tag) { | |
558 case floatTag: | |
559 case doubleTag: do_ArithmeticOp_FPU(x); return; | |
560 case longTag: do_ArithmeticOp_Long(x); return; | |
561 case intTag: do_ArithmeticOp_Int(x); return; | |
562 } | |
563 ShouldNotReachHere(); | |
564 } | |
565 | |
566 | |
567 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr | |
568 void LIRGenerator::do_ShiftOp(ShiftOp* x) { | |
569 LIRItem value(x->x(), this); | |
570 LIRItem count(x->y(), this); | |
571 // Long shift destroys count register | |
572 if (value.type()->is_long()) { | |
573 count.set_destroys_register(); | |
574 } | |
575 value.load_item(); | |
576 // the old backend doesn't support this | |
577 if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) { | |
578 jint c = count.get_jint_constant() & 0x1f; | |
579 assert(c >= 0 && c < 32, "should be small"); | |
580 count.dont_load_item(); | |
581 } else { | |
582 count.load_item(); | |
583 } | |
584 LIR_Opr reg = rlock_result(x); | |
585 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); | |
586 } | |
587 | |
588 | |
589 // _iand, _land, _ior, _lor, _ixor, _lxor | |
590 void LIRGenerator::do_LogicOp(LogicOp* x) { | |
591 LIRItem left(x->x(), this); | |
592 LIRItem right(x->y(), this); | |
593 | |
594 left.load_item(); | |
595 right.load_nonconstant(); | |
596 LIR_Opr reg = rlock_result(x); | |
597 | |
598 logic_op(x->op(), reg, left.result(), right.result()); | |
599 } | |
600 | |
601 | |
602 | |
603 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg | |
604 void LIRGenerator::do_CompareOp(CompareOp* x) { | |
605 LIRItem left(x->x(), this); | |
606 LIRItem right(x->y(), this); | |
607 left.load_item(); | |
608 right.load_item(); | |
609 LIR_Opr reg = rlock_result(x); | |
610 | |
611 if (x->x()->type()->is_float_kind()) { | |
612 Bytecodes::Code code = x->op(); | |
613 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); | |
614 } else if (x->x()->type()->tag() == longTag) { | |
615 __ lcmp2int(left.result(), right.result(), reg); | |
616 } else { | |
617 Unimplemented(); | |
618 } | |
619 } | |
620 | |
621 | |
622 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) { | |
623 assert(x->number_of_arguments() == 3, "wrong type"); | |
624 LIRItem obj (x->argument_at(0), this); // AtomicLong object | |
625 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field | |
626 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value | |
627 | |
628 obj.load_item(); | |
629 cmp_value.load_item(); | |
630 new_value.load_item(); | |
631 | |
632 // generate compare-and-swap and produce zero condition if swap occurs | |
633 int value_offset = sun_misc_AtomicLongCSImpl::value_offset(); | |
634 LIR_Opr addr = FrameMap::O7_opr; | |
635 __ add(obj.result(), LIR_OprFact::intConst(value_offset), addr); | |
636 LIR_Opr t1 = FrameMap::G1_opr; // temp for 64-bit value | |
637 LIR_Opr t2 = FrameMap::G3_opr; // temp for 64-bit value | |
638 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2); | |
639 | |
640 // generate conditional move of boolean result | |
641 LIR_Opr result = rlock_result(x); | |
642 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); | |
643 } | |
644 | |
645 | |
646 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { | |
647 assert(x->number_of_arguments() == 4, "wrong type"); | |
648 LIRItem obj (x->argument_at(0), this); // object | |
649 LIRItem offset(x->argument_at(1), this); // offset of field | |
650 LIRItem cmp (x->argument_at(2), this); // value to compare with field | |
651 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp | |
652 | |
653 // Use temps to avoid kills | |
654 LIR_Opr t1 = FrameMap::G1_opr; | |
655 LIR_Opr t2 = FrameMap::G3_opr; | |
656 LIR_Opr addr = new_pointer_register(); | |
657 | |
658 // get address of field | |
659 obj.load_item(); | |
660 offset.load_item(); | |
661 cmp.load_item(); | |
662 val.load_item(); | |
663 | |
664 __ add(obj.result(), offset.result(), addr); | |
665 | |
666 if (type == objectType) | |
667 __ cas_obj(addr, cmp.result(), val.result(), t1, t2); | |
668 else if (type == intType) | |
669 __ cas_int(addr, cmp.result(), val.result(), t1, t2); | |
670 else if (type == longType) | |
671 __ cas_long(addr, cmp.result(), val.result(), t1, t2); | |
672 else { | |
673 ShouldNotReachHere(); | |
674 } | |
675 | |
676 // generate conditional move of boolean result | |
677 LIR_Opr result = rlock_result(x); | |
678 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); | |
679 if (type == objectType) { // Write-barrier needed for Object fields. | |
680 post_barrier(obj.result(), val.result()); | |
681 } | |
682 } | |
683 | |
684 | |
685 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { | |
686 switch (x->id()) { | |
687 case vmIntrinsics::_dabs: | |
688 case vmIntrinsics::_dsqrt: { | |
689 assert(x->number_of_arguments() == 1, "wrong type"); | |
690 LIRItem value(x->argument_at(0), this); | |
691 value.load_item(); | |
692 LIR_Opr dst = rlock_result(x); | |
693 | |
694 switch (x->id()) { | |
695 case vmIntrinsics::_dsqrt: { | |
696 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr); | |
697 break; | |
698 } | |
699 case vmIntrinsics::_dabs: { | |
700 __ abs(value.result(), dst, LIR_OprFact::illegalOpr); | |
701 break; | |
702 } | |
703 } | |
704 break; | |
705 } | |
706 case vmIntrinsics::_dlog10: // fall through | |
707 case vmIntrinsics::_dlog: // fall through | |
708 case vmIntrinsics::_dsin: // fall through | |
709 case vmIntrinsics::_dtan: // fall through | |
710 case vmIntrinsics::_dcos: { | |
711 assert(x->number_of_arguments() == 1, "wrong type"); | |
712 | |
713 address runtime_entry = NULL; | |
714 switch (x->id()) { | |
715 case vmIntrinsics::_dsin: | |
716 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin); | |
717 break; | |
718 case vmIntrinsics::_dcos: | |
719 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos); | |
720 break; | |
721 case vmIntrinsics::_dtan: | |
722 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan); | |
723 break; | |
724 case vmIntrinsics::_dlog: | |
725 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog); | |
726 break; | |
727 case vmIntrinsics::_dlog10: | |
728 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10); | |
729 break; | |
730 default: | |
731 ShouldNotReachHere(); | |
732 } | |
733 | |
734 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL); | |
735 set_result(x, result); | |
736 } | |
737 } | |
738 } | |
739 | |
740 | |
741 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { | |
742 assert(x->number_of_arguments() == 5, "wrong type"); | |
743 // Note: spill caller save before setting the item | |
744 LIRItem src (x->argument_at(0), this); | |
745 LIRItem src_pos (x->argument_at(1), this); | |
746 LIRItem dst (x->argument_at(2), this); | |
747 LIRItem dst_pos (x->argument_at(3), this); | |
748 LIRItem length (x->argument_at(4), this); | |
749 // load all values in callee_save_registers, as this makes the | |
750 // parameter passing to the fast case simpler | |
751 src.load_item_force (rlock_callee_saved(T_OBJECT)); | |
752 src_pos.load_item_force (rlock_callee_saved(T_INT)); | |
753 dst.load_item_force (rlock_callee_saved(T_OBJECT)); | |
754 dst_pos.load_item_force (rlock_callee_saved(T_INT)); | |
755 length.load_item_force (rlock_callee_saved(T_INT)); | |
756 | |
757 int flags; | |
758 ciArrayKlass* expected_type; | |
759 arraycopy_helper(x, &flags, &expected_type); | |
760 | |
761 CodeEmitInfo* info = state_for(x, x->state()); | |
762 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), | |
763 length.result(), rlock_callee_saved(T_INT), | |
764 expected_type, flags, info); | |
765 set_no_result(x); | |
766 } | |
767 | |
768 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f | |
769 // _i2b, _i2c, _i2s | |
770 void LIRGenerator::do_Convert(Convert* x) { | |
771 | |
772 switch (x->op()) { | |
773 case Bytecodes::_f2l: | |
774 case Bytecodes::_d2l: | |
775 case Bytecodes::_d2i: | |
776 case Bytecodes::_l2f: | |
777 case Bytecodes::_l2d: { | |
778 | |
779 address entry; | |
780 switch (x->op()) { | |
781 case Bytecodes::_l2f: | |
782 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f); | |
783 break; | |
784 case Bytecodes::_l2d: | |
785 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d); | |
786 break; | |
787 case Bytecodes::_f2l: | |
788 entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l); | |
789 break; | |
790 case Bytecodes::_d2l: | |
791 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l); | |
792 break; | |
793 case Bytecodes::_d2i: | |
794 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i); | |
795 break; | |
796 default: | |
797 ShouldNotReachHere(); | |
798 } | |
799 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL); | |
800 set_result(x, result); | |
801 break; | |
802 } | |
803 | |
804 case Bytecodes::_i2f: | |
805 case Bytecodes::_i2d: { | |
806 LIRItem value(x->value(), this); | |
807 | |
808 LIR_Opr reg = rlock_result(x); | |
809 // To convert an int to double, we need to load the 32-bit int | |
810 // from memory into a single precision floating point register | |
811 // (even numbered). Then the sparc fitod instruction takes care | |
812 // of the conversion. This is a bit ugly, but is the best way to | |
813 // get the int value in a single precision floating point register | |
814 value.load_item(); | |
815 LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT); | |
816 __ convert(x->op(), tmp, reg); | |
817 break; | |
818 } | |
819 break; | |
820 | |
821 case Bytecodes::_i2l: | |
822 case Bytecodes::_i2b: | |
823 case Bytecodes::_i2c: | |
824 case Bytecodes::_i2s: | |
825 case Bytecodes::_l2i: | |
826 case Bytecodes::_f2d: | |
827 case Bytecodes::_d2f: { // inline code | |
828 LIRItem value(x->value(), this); | |
829 | |
830 value.load_item(); | |
831 LIR_Opr reg = rlock_result(x); | |
832 __ convert(x->op(), value.result(), reg, false); | |
833 } | |
834 break; | |
835 | |
836 case Bytecodes::_f2i: { | |
837 LIRItem value (x->value(), this); | |
838 value.set_destroys_register(); | |
839 value.load_item(); | |
840 LIR_Opr reg = rlock_result(x); | |
841 set_vreg_flag(reg, must_start_in_memory); | |
842 __ convert(x->op(), value.result(), reg, false); | |
843 } | |
844 break; | |
845 | |
846 default: ShouldNotReachHere(); | |
847 } | |
848 } | |
849 | |
850 | |
851 void LIRGenerator::do_NewInstance(NewInstance* x) { | |
852 // This instruction can be deoptimized in the slow path : use | |
853 // O0 as result register. | |
854 const LIR_Opr reg = result_register_for(x->type()); | |
855 | |
856 if (PrintNotLoaded && !x->klass()->is_loaded()) { | |
857 tty->print_cr(" ###class not loaded at new bci %d", x->bci()); | |
858 } | |
859 CodeEmitInfo* info = state_for(x, x->state()); | |
860 LIR_Opr tmp1 = FrameMap::G1_oop_opr; | |
861 LIR_Opr tmp2 = FrameMap::G3_oop_opr; | |
862 LIR_Opr tmp3 = FrameMap::G4_oop_opr; | |
863 LIR_Opr tmp4 = FrameMap::O1_oop_opr; | |
864 LIR_Opr klass_reg = FrameMap::G5_oop_opr; | |
865 new_instance(reg, x->klass(), tmp1, tmp2, tmp3, tmp4, klass_reg, info); | |
866 LIR_Opr result = rlock_result(x); | |
867 __ move(reg, result); | |
868 } | |
869 | |
870 | |
871 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { | |
872 LIRItem length(x->length(), this); | |
873 length.load_item(); | |
874 | |
875 LIR_Opr reg = result_register_for(x->type()); | |
876 LIR_Opr tmp1 = FrameMap::G1_oop_opr; | |
877 LIR_Opr tmp2 = FrameMap::G3_oop_opr; | |
878 LIR_Opr tmp3 = FrameMap::G4_oop_opr; | |
879 LIR_Opr tmp4 = FrameMap::O1_oop_opr; | |
880 LIR_Opr klass_reg = FrameMap::G5_oop_opr; | |
881 LIR_Opr len = length.result(); | |
882 BasicType elem_type = x->elt_type(); | |
883 | |
884 __ oop2reg(ciTypeArrayKlass::make(elem_type)->encoding(), klass_reg); | |
885 | |
886 CodeEmitInfo* info = state_for(x, x->state()); | |
887 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); | |
888 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); | |
889 | |
890 LIR_Opr result = rlock_result(x); | |
891 __ move(reg, result); | |
892 } | |
893 | |
894 | |
895 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { | |
896 LIRItem length(x->length(), this); | |
897 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction | |
898 // and therefore provide the state before the parameters have been consumed | |
899 CodeEmitInfo* patching_info = NULL; | |
900 if (!x->klass()->is_loaded() || PatchALot) { | |
901 patching_info = state_for(x, x->state_before()); | |
902 } | |
903 | |
904 length.load_item(); | |
905 | |
906 const LIR_Opr reg = result_register_for(x->type()); | |
907 LIR_Opr tmp1 = FrameMap::G1_oop_opr; | |
908 LIR_Opr tmp2 = FrameMap::G3_oop_opr; | |
909 LIR_Opr tmp3 = FrameMap::G4_oop_opr; | |
910 LIR_Opr tmp4 = FrameMap::O1_oop_opr; | |
911 LIR_Opr klass_reg = FrameMap::G5_oop_opr; | |
912 LIR_Opr len = length.result(); | |
913 CodeEmitInfo* info = state_for(x, x->state()); | |
914 | |
915 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); | |
916 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass()); | |
917 if (obj == ciEnv::unloaded_ciobjarrayklass()) { | |
918 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); | |
919 } | |
920 jobject2reg_with_patching(klass_reg, obj, patching_info); | |
921 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); | |
922 | |
923 LIR_Opr result = rlock_result(x); | |
924 __ move(reg, result); | |
925 } | |
926 | |
927 | |
928 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { | |
929 Values* dims = x->dims(); | |
930 int i = dims->length(); | |
931 LIRItemList* items = new LIRItemList(dims->length(), NULL); | |
932 while (i-- > 0) { | |
933 LIRItem* size = new LIRItem(dims->at(i), this); | |
934 items->at_put(i, size); | |
935 } | |
936 | |
937 // need to get the info before, as the items may become invalid through item_free | |
938 CodeEmitInfo* patching_info = NULL; | |
939 if (!x->klass()->is_loaded() || PatchALot) { | |
940 patching_info = state_for(x, x->state_before()); | |
941 | |
942 // cannot re-use same xhandlers for multiple CodeEmitInfos, so | |
943 // clone all handlers | |
944 x->set_exception_handlers(new XHandlers(x->exception_handlers())); | |
945 } | |
946 | |
947 i = dims->length(); | |
948 while (i-- > 0) { | |
949 LIRItem* size = items->at(i); | |
950 // if a patching_info was generated above then debug information for the state before | |
951 // the call is going to be emitted. The LIRGenerator calls above may have left some values | |
952 // in registers and that's been recorded in the CodeEmitInfo. In that case the items | |
953 // for those values can't simply be freed if they are registers because the values | |
954 // might be destroyed by store_stack_parameter. So in the case of patching, delay the | |
955 // freeing of the items that already were in registers | |
956 size->load_item(); | |
957 store_stack_parameter (size->result(), | |
958 in_ByteSize(STACK_BIAS + | |
959 (i + frame::memory_parameter_word_sp_offset) * wordSize)); | |
960 } | |
961 | |
962 // This instruction can be deoptimized in the slow path : use | |
963 // O0 as result register. | |
964 const LIR_Opr reg = result_register_for(x->type()); | |
965 CodeEmitInfo* info = state_for(x, x->state()); | |
966 | |
967 jobject2reg_with_patching(reg, x->klass(), patching_info); | |
968 LIR_Opr rank = FrameMap::O1_opr; | |
969 __ move(LIR_OprFact::intConst(x->rank()), rank); | |
970 LIR_Opr varargs = FrameMap::as_pointer_opr(O2); | |
971 int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS; | |
972 __ add(FrameMap::SP_opr, | |
973 LIR_OprFact::intptrConst(offset_from_sp), | |
974 varargs); | |
975 LIR_OprList* args = new LIR_OprList(3); | |
976 args->append(reg); | |
977 args->append(rank); | |
978 args->append(varargs); | |
979 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), | |
980 LIR_OprFact::illegalOpr, | |
981 reg, args, info); | |
982 | |
983 LIR_Opr result = rlock_result(x); | |
984 __ move(reg, result); | |
985 } | |
986 | |
987 | |
988 void LIRGenerator::do_BlockBegin(BlockBegin* x) { | |
989 } | |
990 | |
991 | |
992 void LIRGenerator::do_CheckCast(CheckCast* x) { | |
993 LIRItem obj(x->obj(), this); | |
994 CodeEmitInfo* patching_info = NULL; | |
995 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { | |
996 // must do this before locking the destination register as an oop register, | |
997 // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location) | |
998 patching_info = state_for(x, x->state_before()); | |
999 } | |
1000 obj.load_item(); | |
1001 LIR_Opr out_reg = rlock_result(x); | |
1002 CodeStub* stub; | |
1003 CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks()); | |
1004 | |
1005 if (x->is_incompatible_class_change_check()) { | |
1006 assert(patching_info == NULL, "can't patch this"); | |
1007 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); | |
1008 } else { | |
1009 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); | |
1010 } | |
1011 LIR_Opr tmp1 = FrameMap::G1_oop_opr; | |
1012 LIR_Opr tmp2 = FrameMap::G3_oop_opr; | |
1013 LIR_Opr tmp3 = FrameMap::G4_oop_opr; | |
1014 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, | |
1015 x->direct_compare(), info_for_exception, patching_info, stub, | |
1016 x->profiled_method(), x->profiled_bci()); | |
1017 } | |
1018 | |
1019 | |
1020 void LIRGenerator::do_InstanceOf(InstanceOf* x) { | |
1021 LIRItem obj(x->obj(), this); | |
1022 CodeEmitInfo* patching_info = NULL; | |
1023 if (!x->klass()->is_loaded() || PatchALot) { | |
1024 patching_info = state_for(x, x->state_before()); | |
1025 } | |
1026 // ensure the result register is not the input register because the result is initialized before the patching safepoint | |
1027 obj.load_item(); | |
1028 LIR_Opr out_reg = rlock_result(x); | |
1029 LIR_Opr tmp1 = FrameMap::G1_oop_opr; | |
1030 LIR_Opr tmp2 = FrameMap::G3_oop_opr; | |
1031 LIR_Opr tmp3 = FrameMap::G4_oop_opr; | |
1032 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, x->direct_compare(), patching_info); | |
1033 } | |
1034 | |
1035 | |
1036 void LIRGenerator::do_If(If* x) { | |
1037 assert(x->number_of_sux() == 2, "inconsistency"); | |
1038 ValueTag tag = x->x()->type()->tag(); | |
1039 LIRItem xitem(x->x(), this); | |
1040 LIRItem yitem(x->y(), this); | |
1041 LIRItem* xin = &xitem; | |
1042 LIRItem* yin = &yitem; | |
1043 If::Condition cond = x->cond(); | |
1044 | |
1045 if (tag == longTag) { | |
1046 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; | |
1047 // mirror for other conditions | |
1048 if (cond == If::gtr || cond == If::leq) { | |
1049 // swap inputs | |
1050 cond = Instruction::mirror(cond); | |
1051 xin = &yitem; | |
1052 yin = &xitem; | |
1053 } | |
1054 xin->set_destroys_register(); | |
1055 } | |
1056 | |
1057 LIR_Opr left = LIR_OprFact::illegalOpr; | |
1058 LIR_Opr right = LIR_OprFact::illegalOpr; | |
1059 | |
1060 xin->load_item(); | |
1061 left = xin->result(); | |
1062 | |
1063 if (is_simm13(yin->result())) { | |
1064 // inline int constants which are small enough to be immediate operands | |
1065 right = LIR_OprFact::value_type(yin->value()->type()); | |
1066 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && | |
1067 (cond == If::eql || cond == If::neq)) { | |
1068 // inline long zero | |
1069 right = LIR_OprFact::value_type(yin->value()->type()); | |
1070 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) { | |
1071 right = LIR_OprFact::value_type(yin->value()->type()); | |
1072 } else { | |
1073 yin->load_item(); | |
1074 right = yin->result(); | |
1075 } | |
1076 set_no_result(x); | |
1077 | |
1078 // add safepoint before generating condition code so it can be recomputed | |
1079 if (x->is_safepoint()) { | |
1080 // increment backedge counter if needed | |
1081 increment_backedge_counter(state_for(x, x->state_before())); | |
1082 | |
1083 __ safepoint(new_register(T_INT), state_for(x, x->state_before())); | |
1084 } | |
1085 | |
1086 __ cmp(lir_cond(cond), left, right); | |
1087 profile_branch(x, cond); | |
1088 move_to_phi(x->state()); | |
1089 if (x->x()->type()->is_float_kind()) { | |
1090 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); | |
1091 } else { | |
1092 __ branch(lir_cond(cond), right->type(), x->tsux()); | |
1093 } | |
1094 assert(x->default_sux() == x->fsux(), "wrong destination above"); | |
1095 __ jump(x->default_sux()); | |
1096 } | |
1097 | |
1098 | |
1099 LIR_Opr LIRGenerator::getThreadPointer() { | |
1100 return FrameMap::as_pointer_opr(G2); | |
1101 } | |
1102 | |
1103 | |
1104 void LIRGenerator::trace_block_entry(BlockBegin* block) { | |
1105 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr); | |
1106 LIR_OprList* args = new LIR_OprList(1); | |
1107 args->append(FrameMap::O0_opr); | |
1108 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); | |
1109 __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args); | |
1110 } | |
1111 | |
1112 | |
1113 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, | |
1114 CodeEmitInfo* info) { | |
1115 #ifdef _LP64 | |
1116 __ store(value, address, info); | |
1117 #else | |
1118 __ volatile_store_mem_reg(value, address, info); | |
1119 #endif | |
1120 } | |
1121 | |
1122 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, | |
1123 CodeEmitInfo* info) { | |
1124 #ifdef _LP64 | |
1125 __ load(address, result, info); | |
1126 #else | |
1127 __ volatile_load_mem_reg(address, result, info); | |
1128 #endif | |
1129 } | |
1130 | |
1131 | |
1132 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, | |
1133 BasicType type, bool is_volatile) { | |
1134 LIR_Opr base_op = src; | |
1135 LIR_Opr index_op = offset; | |
1136 | |
1137 bool is_obj = (type == T_ARRAY || type == T_OBJECT); | |
1138 #ifndef _LP64 | |
1139 if (is_volatile && type == T_LONG) { | |
1140 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none); | |
1141 } else | |
1142 #endif | |
1143 { | |
1144 if (type == T_BOOLEAN) { | |
1145 type = T_BYTE; | |
1146 } | |
1147 LIR_Address* addr; | |
1148 if (type == T_ARRAY || type == T_OBJECT) { | |
1149 LIR_Opr tmp = new_pointer_register(); | |
1150 __ add(base_op, index_op, tmp); | |
1151 addr = new LIR_Address(tmp, 0, type); | |
1152 } else { | |
1153 addr = new LIR_Address(base_op, index_op, type); | |
1154 } | |
1155 | |
1156 __ move(data, addr); | |
1157 if (is_obj) { | |
1158 // This address is precise | |
1159 post_barrier(LIR_OprFact::address(addr), data); | |
1160 } | |
1161 } | |
1162 } | |
1163 | |
1164 | |
1165 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, | |
1166 BasicType type, bool is_volatile) { | |
1167 #ifndef _LP64 | |
1168 if (is_volatile && type == T_LONG) { | |
1169 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none); | |
1170 } else | |
1171 #endif | |
1172 { | |
1173 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1174 __ load(addr, dst); | |
1175 } | |
1176 } |