Mercurial > hg > graal-jvmci-8
annotate src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @ 1848:c393f046f4c5
6991512: G1 barriers fail with 64bit C1
Summary: Fix compare-and-swap intrinsic problem with G1 post-barriers and issue with branch ranges in G1 stubs on sparc
Reviewed-by: never, kvn
author | iveresov |
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date | Tue, 12 Oct 2010 23:51:20 -0700 |
parents | f02a8bbe6ed4 |
children | 07a218de38cb |
rev | line source |
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0 | 1 /* |
1783 | 2 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 # include "incls/_precompiled.incl" | |
26 # include "incls/_c1_LIRGenerator_x86.cpp.incl" | |
27 | |
28 #ifdef ASSERT | |
29 #define __ gen()->lir(__FILE__, __LINE__)-> | |
30 #else | |
31 #define __ gen()->lir()-> | |
32 #endif | |
33 | |
34 // Item will be loaded into a byte register; Intel only | |
35 void LIRItem::load_byte_item() { | |
36 load_item(); | |
37 LIR_Opr res = result(); | |
38 | |
39 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { | |
40 // make sure that it is a byte register | |
41 assert(!value()->type()->is_float() && !value()->type()->is_double(), | |
42 "can't load floats in byte register"); | |
43 LIR_Opr reg = _gen->rlock_byte(T_BYTE); | |
44 __ move(res, reg); | |
45 | |
46 _result = reg; | |
47 } | |
48 } | |
49 | |
50 | |
51 void LIRItem::load_nonconstant() { | |
52 LIR_Opr r = value()->operand(); | |
53 if (r->is_constant()) { | |
54 _result = r; | |
55 } else { | |
56 load_item(); | |
57 } | |
58 } | |
59 | |
60 //-------------------------------------------------------------- | |
61 // LIRGenerator | |
62 //-------------------------------------------------------------- | |
63 | |
64 | |
65 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } | |
66 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } | |
67 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } | |
68 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } | |
69 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } | |
70 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } | |
71 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } | |
72 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } | |
73 | |
74 | |
75 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { | |
76 LIR_Opr opr; | |
77 switch (type->tag()) { | |
78 case intTag: opr = FrameMap::rax_opr; break; | |
79 case objectTag: opr = FrameMap::rax_oop_opr; break; | |
304 | 80 case longTag: opr = FrameMap::long0_opr; break; |
0 | 81 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; |
82 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; | |
83 | |
84 case addressTag: | |
85 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; | |
86 } | |
87 | |
88 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); | |
89 return opr; | |
90 } | |
91 | |
92 | |
93 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { | |
94 LIR_Opr reg = new_register(T_INT); | |
95 set_vreg_flag(reg, LIRGenerator::byte_reg); | |
96 return reg; | |
97 } | |
98 | |
99 | |
100 //--------- loading items into registers -------------------------------- | |
101 | |
102 | |
103 // i486 instructions can inline constants | |
104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { | |
105 if (type == T_SHORT || type == T_CHAR) { | |
106 // there is no immediate move of word values in asembler_i486.?pp | |
107 return false; | |
108 } | |
109 Constant* c = v->as_Constant(); | |
1819 | 110 if (c && c->state_before() == NULL) { |
0 | 111 // constants of any type can be stored directly, except for |
112 // unloaded object constants. | |
113 return true; | |
114 } | |
115 return false; | |
116 } | |
117 | |
118 | |
119 bool LIRGenerator::can_inline_as_constant(Value v) const { | |
304 | 120 if (v->type()->tag() == longTag) return false; |
0 | 121 return v->type()->tag() != objectTag || |
122 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); | |
123 } | |
124 | |
125 | |
126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { | |
304 | 127 if (c->type() == T_LONG) return false; |
0 | 128 return c->type() != T_OBJECT || c->as_jobject() == NULL; |
129 } | |
130 | |
131 | |
132 LIR_Opr LIRGenerator::safepoint_poll_register() { | |
133 return LIR_OprFact::illegalOpr; | |
134 } | |
135 | |
136 | |
137 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, | |
138 int shift, int disp, BasicType type) { | |
139 assert(base->is_register(), "must be"); | |
140 if (index->is_constant()) { | |
141 return new LIR_Address(base, | |
142 (index->as_constant_ptr()->as_jint() << shift) + disp, | |
143 type); | |
144 } else { | |
145 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); | |
146 } | |
147 } | |
148 | |
149 | |
150 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, | |
151 BasicType type, bool needs_card_mark) { | |
152 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); | |
153 | |
154 LIR_Address* addr; | |
155 if (index_opr->is_constant()) { | |
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156 int elem_size = type2aelembytes(type); |
0 | 157 addr = new LIR_Address(array_opr, |
158 offset_in_bytes + index_opr->as_jint() * elem_size, type); | |
159 } else { | |
304 | 160 #ifdef _LP64 |
161 if (index_opr->type() == T_INT) { | |
162 LIR_Opr tmp = new_register(T_LONG); | |
163 __ convert(Bytecodes::_i2l, index_opr, tmp); | |
164 index_opr = tmp; | |
165 } | |
166 #endif // _LP64 | |
0 | 167 addr = new LIR_Address(array_opr, |
168 index_opr, | |
169 LIR_Address::scale(type), | |
170 offset_in_bytes, type); | |
171 } | |
172 if (needs_card_mark) { | |
173 // This store will need a precise card mark, so go ahead and | |
174 // compute the full adddres instead of computing once for the | |
175 // store and again for the card mark. | |
304 | 176 LIR_Opr tmp = new_pointer_register(); |
0 | 177 __ leal(LIR_OprFact::address(addr), tmp); |
1572 | 178 return new LIR_Address(tmp, type); |
0 | 179 } else { |
180 return addr; | |
181 } | |
182 } | |
183 | |
184 | |
1783 | 185 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { |
186 LIR_Opr r; | |
187 if (type == T_LONG) { | |
188 r = LIR_OprFact::longConst(x); | |
189 } else if (type == T_INT) { | |
190 r = LIR_OprFact::intConst(x); | |
191 } else { | |
192 ShouldNotReachHere(); | |
193 } | |
194 return r; | |
195 } | |
196 | |
197 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { | |
304 | 198 LIR_Opr pointer = new_pointer_register(); |
199 __ move(LIR_OprFact::intptrConst(counter), pointer); | |
1783 | 200 LIR_Address* addr = new LIR_Address(pointer, type); |
0 | 201 increment_counter(addr, step); |
202 } | |
203 | |
204 | |
205 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { | |
206 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); | |
207 } | |
208 | |
209 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
210 __ cmp_mem_int(condition, base, disp, c, info); | |
211 } | |
212 | |
213 | |
214 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { | |
215 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
216 } | |
217 | |
218 | |
219 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { | |
220 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); | |
221 } | |
222 | |
223 | |
224 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { | |
225 if (tmp->is_valid()) { | |
226 if (is_power_of_2(c + 1)) { | |
227 __ move(left, tmp); | |
228 __ shift_left(left, log2_intptr(c + 1), left); | |
229 __ sub(left, tmp, result); | |
230 return true; | |
231 } else if (is_power_of_2(c - 1)) { | |
232 __ move(left, tmp); | |
233 __ shift_left(left, log2_intptr(c - 1), left); | |
234 __ add(left, tmp, result); | |
235 return true; | |
236 } | |
237 } | |
238 return false; | |
239 } | |
240 | |
241 | |
242 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { | |
243 BasicType type = item->type(); | |
244 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); | |
245 } | |
246 | |
247 //---------------------------------------------------------------------- | |
248 // visitor functions | |
249 //---------------------------------------------------------------------- | |
250 | |
251 | |
252 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { | |
1819 | 253 assert(x->is_pinned(),""); |
0 | 254 bool needs_range_check = true; |
255 bool use_length = x->length() != NULL; | |
256 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; | |
257 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || | |
258 !get_jobject_constant(x->value())->is_null_object()); | |
259 | |
260 LIRItem array(x->array(), this); | |
261 LIRItem index(x->index(), this); | |
262 LIRItem value(x->value(), this); | |
263 LIRItem length(this); | |
264 | |
265 array.load_item(); | |
266 index.load_nonconstant(); | |
267 | |
268 if (use_length) { | |
269 needs_range_check = x->compute_needs_range_check(); | |
270 if (needs_range_check) { | |
271 length.set_instruction(x->length()); | |
272 length.load_item(); | |
273 } | |
274 } | |
275 if (needs_store_check) { | |
276 value.load_item(); | |
277 } else { | |
278 value.load_for_store(x->elt_type()); | |
279 } | |
280 | |
281 set_no_result(x); | |
282 | |
283 // the CodeEmitInfo must be duplicated for each different | |
284 // LIR-instruction because spilling can occur anywhere between two | |
285 // instructions and so the debug information must be different | |
286 CodeEmitInfo* range_check_info = state_for(x); | |
287 CodeEmitInfo* null_check_info = NULL; | |
288 if (x->needs_null_check()) { | |
289 null_check_info = new CodeEmitInfo(range_check_info); | |
290 } | |
291 | |
292 // emit array address setup early so it schedules better | |
293 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); | |
294 | |
295 if (GenerateRangeChecks && needs_range_check) { | |
296 if (use_length) { | |
297 __ cmp(lir_cond_belowEqual, length.result(), index.result()); | |
298 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); | |
299 } else { | |
300 array_range_check(array.result(), index.result(), null_check_info, range_check_info); | |
301 // range_check also does the null check | |
302 null_check_info = NULL; | |
303 } | |
304 } | |
305 | |
306 if (GenerateArrayStoreCheck && needs_store_check) { | |
307 LIR_Opr tmp1 = new_register(objectType); | |
308 LIR_Opr tmp2 = new_register(objectType); | |
309 LIR_Opr tmp3 = new_register(objectType); | |
310 | |
311 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); | |
312 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info); | |
313 } | |
314 | |
315 if (obj_store) { | |
342
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316 // Needs GC write barriers. |
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317 pre_barrier(LIR_OprFact::address(array_addr), false, NULL); |
0 | 318 __ move(value.result(), array_addr, null_check_info); |
319 // Seems to be a precise | |
320 post_barrier(LIR_OprFact::address(array_addr), value.result()); | |
321 } else { | |
322 __ move(value.result(), array_addr, null_check_info); | |
323 } | |
324 } | |
325 | |
326 | |
327 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { | |
1819 | 328 assert(x->is_pinned(),""); |
0 | 329 LIRItem obj(x->obj(), this); |
330 obj.load_item(); | |
331 | |
332 set_no_result(x); | |
333 | |
334 // "lock" stores the address of the monitor stack slot, so this is not an oop | |
335 LIR_Opr lock = new_register(T_INT); | |
336 // Need a scratch register for biased locking on x86 | |
337 LIR_Opr scratch = LIR_OprFact::illegalOpr; | |
338 if (UseBiasedLocking) { | |
339 scratch = new_register(T_INT); | |
340 } | |
341 | |
342 CodeEmitInfo* info_for_exception = NULL; | |
343 if (x->needs_null_check()) { | |
1819 | 344 info_for_exception = state_for(x); |
0 | 345 } |
346 // this CodeEmitInfo must not have the xhandlers because here the | |
347 // object is already locked (xhandlers expect object to be unlocked) | |
348 CodeEmitInfo* info = state_for(x, x->state(), true); | |
349 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, | |
350 x->monitor_no(), info_for_exception, info); | |
351 } | |
352 | |
353 | |
354 void LIRGenerator::do_MonitorExit(MonitorExit* x) { | |
1819 | 355 assert(x->is_pinned(),""); |
0 | 356 |
357 LIRItem obj(x->obj(), this); | |
358 obj.dont_load_item(); | |
359 | |
360 LIR_Opr lock = new_register(T_INT); | |
361 LIR_Opr obj_temp = new_register(T_INT); | |
362 set_no_result(x); | |
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363 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); |
0 | 364 } |
365 | |
366 | |
367 // _ineg, _lneg, _fneg, _dneg | |
368 void LIRGenerator::do_NegateOp(NegateOp* x) { | |
369 LIRItem value(x->x(), this); | |
370 value.set_destroys_register(); | |
371 value.load_item(); | |
372 LIR_Opr reg = rlock(x); | |
373 __ negate(value.result(), reg); | |
374 | |
375 set_result(x, round_item(reg)); | |
376 } | |
377 | |
378 | |
379 // for _fadd, _fmul, _fsub, _fdiv, _frem | |
380 // _dadd, _dmul, _dsub, _ddiv, _drem | |
381 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { | |
382 LIRItem left(x->x(), this); | |
383 LIRItem right(x->y(), this); | |
384 LIRItem* left_arg = &left; | |
385 LIRItem* right_arg = &right; | |
386 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); | |
387 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); | |
388 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { | |
389 left.load_item(); | |
390 } else { | |
391 left.dont_load_item(); | |
392 } | |
393 | |
394 // do not load right operand if it is a constant. only 0 and 1 are | |
395 // loaded because there are special instructions for loading them | |
396 // without memory access (not needed for SSE2 instructions) | |
397 bool must_load_right = false; | |
398 if (right.is_constant()) { | |
399 LIR_Const* c = right.result()->as_constant_ptr(); | |
400 assert(c != NULL, "invalid constant"); | |
401 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); | |
402 | |
403 if (c->type() == T_FLOAT) { | |
404 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); | |
405 } else { | |
406 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); | |
407 } | |
408 } | |
409 | |
410 if (must_load_both) { | |
411 // frem and drem destroy also right operand, so move it to a new register | |
412 right.set_destroys_register(); | |
413 right.load_item(); | |
414 } else if (right.is_register() || must_load_right) { | |
415 right.load_item(); | |
416 } else { | |
417 right.dont_load_item(); | |
418 } | |
419 LIR_Opr reg = rlock(x); | |
420 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
421 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { | |
422 tmp = new_register(T_DOUBLE); | |
423 } | |
424 | |
425 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { | |
426 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots | |
427 LIR_Opr fpu0, fpu1; | |
428 if (x->op() == Bytecodes::_frem) { | |
429 fpu0 = LIR_OprFact::single_fpu(0); | |
430 fpu1 = LIR_OprFact::single_fpu(1); | |
431 } else { | |
432 fpu0 = LIR_OprFact::double_fpu(0); | |
433 fpu1 = LIR_OprFact::double_fpu(1); | |
434 } | |
435 __ move(right.result(), fpu1); // order of left and right operand is important! | |
436 __ move(left.result(), fpu0); | |
437 __ rem (fpu0, fpu1, fpu0); | |
438 __ move(fpu0, reg); | |
439 | |
440 } else { | |
441 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); | |
442 } | |
443 | |
444 set_result(x, round_item(reg)); | |
445 } | |
446 | |
447 | |
448 // for _ladd, _lmul, _lsub, _ldiv, _lrem | |
449 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { | |
450 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { | |
451 // long division is implemented as a direct call into the runtime | |
452 LIRItem left(x->x(), this); | |
453 LIRItem right(x->y(), this); | |
454 | |
455 // the check for division by zero destroys the right operand | |
456 right.set_destroys_register(); | |
457 | |
458 BasicTypeList signature(2); | |
459 signature.append(T_LONG); | |
460 signature.append(T_LONG); | |
461 CallingConvention* cc = frame_map()->c_calling_convention(&signature); | |
462 | |
463 // check for division by zero (destroys registers of right operand!) | |
464 CodeEmitInfo* info = state_for(x); | |
465 | |
466 const LIR_Opr result_reg = result_register_for(x->type()); | |
467 left.load_item_force(cc->at(1)); | |
468 right.load_item(); | |
469 | |
470 __ move(right.result(), cc->at(0)); | |
471 | |
472 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); | |
473 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); | |
474 | |
475 address entry; | |
476 switch (x->op()) { | |
477 case Bytecodes::_lrem: | |
478 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); | |
479 break; // check if dividend is 0 is done elsewhere | |
480 case Bytecodes::_ldiv: | |
481 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); | |
482 break; // check if dividend is 0 is done elsewhere | |
483 case Bytecodes::_lmul: | |
484 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); | |
485 break; | |
486 default: | |
487 ShouldNotReachHere(); | |
488 } | |
489 | |
490 LIR_Opr result = rlock_result(x); | |
491 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); | |
492 __ move(result_reg, result); | |
493 } else if (x->op() == Bytecodes::_lmul) { | |
494 // missing test if instr is commutative and if we should swap | |
495 LIRItem left(x->x(), this); | |
496 LIRItem right(x->y(), this); | |
497 | |
498 // right register is destroyed by the long mul, so it must be | |
499 // copied to a new register. | |
500 right.set_destroys_register(); | |
501 | |
502 left.load_item(); | |
503 right.load_item(); | |
504 | |
304 | 505 LIR_Opr reg = FrameMap::long0_opr; |
0 | 506 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); |
507 LIR_Opr result = rlock_result(x); | |
508 __ move(reg, result); | |
509 } else { | |
510 // missing test if instr is commutative and if we should swap | |
511 LIRItem left(x->x(), this); | |
512 LIRItem right(x->y(), this); | |
513 | |
514 left.load_item(); | |
605 | 515 // don't load constants to save register |
0 | 516 right.load_nonconstant(); |
517 rlock_result(x); | |
518 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); | |
519 } | |
520 } | |
521 | |
522 | |
523 | |
524 // for: _iadd, _imul, _isub, _idiv, _irem | |
525 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { | |
526 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { | |
527 // The requirements for division and modulo | |
528 // input : rax,: dividend min_int | |
529 // reg: divisor (may not be rax,/rdx) -1 | |
530 // | |
531 // output: rax,: quotient (= rax, idiv reg) min_int | |
532 // rdx: remainder (= rax, irem reg) 0 | |
533 | |
534 // rax, and rdx will be destroyed | |
535 | |
536 // Note: does this invalidate the spec ??? | |
537 LIRItem right(x->y(), this); | |
538 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid | |
539 | |
540 // call state_for before load_item_force because state_for may | |
541 // force the evaluation of other instructions that are needed for | |
542 // correct debug info. Otherwise the live range of the fix | |
543 // register might be too long. | |
544 CodeEmitInfo* info = state_for(x); | |
545 | |
546 left.load_item_force(divInOpr()); | |
547 | |
548 right.load_item(); | |
549 | |
550 LIR_Opr result = rlock_result(x); | |
551 LIR_Opr result_reg; | |
552 if (x->op() == Bytecodes::_idiv) { | |
553 result_reg = divOutOpr(); | |
554 } else { | |
555 result_reg = remOutOpr(); | |
556 } | |
557 | |
558 if (!ImplicitDiv0Checks) { | |
559 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); | |
560 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); | |
561 } | |
562 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation | |
563 if (x->op() == Bytecodes::_irem) { | |
564 __ irem(left.result(), right.result(), result_reg, tmp, info); | |
565 } else if (x->op() == Bytecodes::_idiv) { | |
566 __ idiv(left.result(), right.result(), result_reg, tmp, info); | |
567 } else { | |
568 ShouldNotReachHere(); | |
569 } | |
570 | |
571 __ move(result_reg, result); | |
572 } else { | |
573 // missing test if instr is commutative and if we should swap | |
574 LIRItem left(x->x(), this); | |
575 LIRItem right(x->y(), this); | |
576 LIRItem* left_arg = &left; | |
577 LIRItem* right_arg = &right; | |
578 if (x->is_commutative() && left.is_stack() && right.is_register()) { | |
579 // swap them if left is real stack (or cached) and right is real register(not cached) | |
580 left_arg = &right; | |
581 right_arg = &left; | |
582 } | |
583 | |
584 left_arg->load_item(); | |
585 | |
586 // do not need to load right, as we can handle stack and constants | |
587 if (x->op() == Bytecodes::_imul ) { | |
588 // check if we can use shift instead | |
589 bool use_constant = false; | |
590 bool use_tmp = false; | |
591 if (right_arg->is_constant()) { | |
592 int iconst = right_arg->get_jint_constant(); | |
593 if (iconst > 0) { | |
594 if (is_power_of_2(iconst)) { | |
595 use_constant = true; | |
596 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { | |
597 use_constant = true; | |
598 use_tmp = true; | |
599 } | |
600 } | |
601 } | |
602 if (use_constant) { | |
603 right_arg->dont_load_item(); | |
604 } else { | |
605 right_arg->load_item(); | |
606 } | |
607 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
608 if (use_tmp) { | |
609 tmp = new_register(T_INT); | |
610 } | |
611 rlock_result(x); | |
612 | |
613 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
614 } else { | |
615 right_arg->dont_load_item(); | |
616 rlock_result(x); | |
617 LIR_Opr tmp = LIR_OprFact::illegalOpr; | |
618 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); | |
619 } | |
620 } | |
621 } | |
622 | |
623 | |
624 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { | |
625 // when an operand with use count 1 is the left operand, then it is | |
626 // likely that no move for 2-operand-LIR-form is necessary | |
627 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
628 x->swap_operands(); | |
629 } | |
630 | |
631 ValueTag tag = x->type()->tag(); | |
632 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); | |
633 switch (tag) { | |
634 case floatTag: | |
635 case doubleTag: do_ArithmeticOp_FPU(x); return; | |
636 case longTag: do_ArithmeticOp_Long(x); return; | |
637 case intTag: do_ArithmeticOp_Int(x); return; | |
638 } | |
639 ShouldNotReachHere(); | |
640 } | |
641 | |
642 | |
643 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr | |
644 void LIRGenerator::do_ShiftOp(ShiftOp* x) { | |
645 // count must always be in rcx | |
646 LIRItem value(x->x(), this); | |
647 LIRItem count(x->y(), this); | |
648 | |
649 ValueTag elemType = x->type()->tag(); | |
650 bool must_load_count = !count.is_constant() || elemType == longTag; | |
651 if (must_load_count) { | |
652 // count for long must be in register | |
653 count.load_item_force(shiftCountOpr()); | |
654 } else { | |
655 count.dont_load_item(); | |
656 } | |
657 value.load_item(); | |
658 LIR_Opr reg = rlock_result(x); | |
659 | |
660 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); | |
661 } | |
662 | |
663 | |
664 // _iand, _land, _ior, _lor, _ixor, _lxor | |
665 void LIRGenerator::do_LogicOp(LogicOp* x) { | |
666 // when an operand with use count 1 is the left operand, then it is | |
667 // likely that no move for 2-operand-LIR-form is necessary | |
668 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { | |
669 x->swap_operands(); | |
670 } | |
671 | |
672 LIRItem left(x->x(), this); | |
673 LIRItem right(x->y(), this); | |
674 | |
675 left.load_item(); | |
676 right.load_nonconstant(); | |
677 LIR_Opr reg = rlock_result(x); | |
678 | |
679 logic_op(x->op(), reg, left.result(), right.result()); | |
680 } | |
681 | |
682 | |
683 | |
684 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg | |
685 void LIRGenerator::do_CompareOp(CompareOp* x) { | |
686 LIRItem left(x->x(), this); | |
687 LIRItem right(x->y(), this); | |
688 ValueTag tag = x->x()->type()->tag(); | |
689 if (tag == longTag) { | |
690 left.set_destroys_register(); | |
691 } | |
692 left.load_item(); | |
693 right.load_item(); | |
694 LIR_Opr reg = rlock_result(x); | |
695 | |
696 if (x->x()->type()->is_float_kind()) { | |
697 Bytecodes::Code code = x->op(); | |
698 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); | |
699 } else if (x->x()->type()->tag() == longTag) { | |
700 __ lcmp2int(left.result(), right.result(), reg); | |
701 } else { | |
702 Unimplemented(); | |
703 } | |
704 } | |
705 | |
706 | |
707 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) { | |
708 assert(x->number_of_arguments() == 3, "wrong type"); | |
709 LIRItem obj (x->argument_at(0), this); // AtomicLong object | |
710 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field | |
711 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value | |
712 | |
713 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction | |
304 | 714 cmp_value.load_item_force(FrameMap::long0_opr); |
0 | 715 |
716 // new value must be in rcx,ebx (hi,lo) | |
304 | 717 new_value.load_item_force(FrameMap::long1_opr); |
0 | 718 |
719 // object pointer register is overwritten with field address | |
720 obj.load_item(); | |
721 | |
722 // generate compare-and-swap; produces zero condition if swap occurs | |
723 int value_offset = sun_misc_AtomicLongCSImpl::value_offset(); | |
724 LIR_Opr addr = obj.result(); | |
725 __ add(addr, LIR_OprFact::intConst(value_offset), addr); | |
726 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed | |
727 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed | |
728 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2); | |
729 | |
730 // generate conditional move of boolean result | |
731 LIR_Opr result = rlock_result(x); | |
732 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); | |
733 } | |
734 | |
735 | |
736 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { | |
737 assert(x->number_of_arguments() == 4, "wrong type"); | |
738 LIRItem obj (x->argument_at(0), this); // object | |
739 LIRItem offset(x->argument_at(1), this); // offset of field | |
740 LIRItem cmp (x->argument_at(2), this); // value to compare with field | |
741 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp | |
742 | |
743 assert(obj.type()->tag() == objectTag, "invalid type"); | |
304 | 744 |
745 // In 64bit the type can be long, sparc doesn't have this assert | |
746 // assert(offset.type()->tag() == intTag, "invalid type"); | |
747 | |
0 | 748 assert(cmp.type()->tag() == type->tag(), "invalid type"); |
749 assert(val.type()->tag() == type->tag(), "invalid type"); | |
750 | |
751 // get address of field | |
752 obj.load_item(); | |
753 offset.load_nonconstant(); | |
754 | |
755 if (type == objectType) { | |
756 cmp.load_item_force(FrameMap::rax_oop_opr); | |
757 val.load_item(); | |
758 } else if (type == intType) { | |
759 cmp.load_item_force(FrameMap::rax_opr); | |
760 val.load_item(); | |
761 } else if (type == longType) { | |
304 | 762 cmp.load_item_force(FrameMap::long0_opr); |
763 val.load_item_force(FrameMap::long1_opr); | |
0 | 764 } else { |
765 ShouldNotReachHere(); | |
766 } | |
767 | |
1848 | 768 LIR_Opr addr = (type == objectType) ? new_register(T_OBJECT) : new_pointer_register(); |
1060 | 769 LIR_Address* a; |
770 if(offset.result()->is_constant()) { | |
771 a = new LIR_Address(obj.result(), | |
772 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()), | |
773 as_BasicType(type)); | |
774 } else { | |
775 a = new LIR_Address(obj.result(), | |
776 offset.result(), | |
777 LIR_Address::times_1, | |
778 0, | |
779 as_BasicType(type)); | |
780 } | |
781 __ leal(LIR_OprFact::address(a), addr); | |
0 | 782 |
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783 if (type == objectType) { // Write-barrier needed for Object fields. |
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784 // Do the pre-write barrier, if any. |
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785 pre_barrier(addr, false, NULL); |
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786 } |
0 | 787 |
788 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience | |
789 if (type == objectType) | |
790 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); | |
791 else if (type == intType) | |
792 __ cas_int(addr, cmp.result(), val.result(), ill, ill); | |
793 else if (type == longType) | |
794 __ cas_long(addr, cmp.result(), val.result(), ill, ill); | |
795 else { | |
796 ShouldNotReachHere(); | |
797 } | |
798 | |
799 // generate conditional move of boolean result | |
800 LIR_Opr result = rlock_result(x); | |
801 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); | |
802 if (type == objectType) { // Write-barrier needed for Object fields. | |
803 // Seems to be precise | |
804 post_barrier(addr, val.result()); | |
805 } | |
806 } | |
807 | |
808 | |
809 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { | |
810 assert(x->number_of_arguments() == 1, "wrong type"); | |
811 LIRItem value(x->argument_at(0), this); | |
812 | |
813 bool use_fpu = false; | |
814 if (UseSSE >= 2) { | |
815 switch(x->id()) { | |
816 case vmIntrinsics::_dsin: | |
817 case vmIntrinsics::_dcos: | |
818 case vmIntrinsics::_dtan: | |
819 case vmIntrinsics::_dlog: | |
820 case vmIntrinsics::_dlog10: | |
821 use_fpu = true; | |
822 } | |
823 } else { | |
824 value.set_destroys_register(); | |
825 } | |
826 | |
827 value.load_item(); | |
828 | |
829 LIR_Opr calc_input = value.result(); | |
830 LIR_Opr calc_result = rlock_result(x); | |
831 | |
832 // sin and cos need two free fpu stack slots, so register two temporary operands | |
833 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); | |
834 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); | |
835 | |
836 if (use_fpu) { | |
837 LIR_Opr tmp = FrameMap::fpu0_double_opr; | |
838 __ move(calc_input, tmp); | |
839 | |
840 calc_input = tmp; | |
841 calc_result = tmp; | |
842 tmp1 = FrameMap::caller_save_fpu_reg_at(1); | |
843 tmp2 = FrameMap::caller_save_fpu_reg_at(2); | |
844 } | |
845 | |
846 switch(x->id()) { | |
847 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
848 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; | |
849 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break; | |
850 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break; | |
851 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; | |
953
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852 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break; |
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853 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break; |
0 | 854 default: ShouldNotReachHere(); |
855 } | |
856 | |
857 if (use_fpu) { | |
858 __ move(calc_result, x->operand()); | |
859 } | |
860 } | |
861 | |
862 | |
863 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { | |
864 assert(x->number_of_arguments() == 5, "wrong type"); | |
865 LIRItem src(x->argument_at(0), this); | |
866 LIRItem src_pos(x->argument_at(1), this); | |
867 LIRItem dst(x->argument_at(2), this); | |
868 LIRItem dst_pos(x->argument_at(3), this); | |
869 LIRItem length(x->argument_at(4), this); | |
870 | |
871 // operands for arraycopy must use fixed registers, otherwise | |
872 // LinearScan will fail allocation (because arraycopy always needs a | |
873 // call) | |
304 | 874 |
875 #ifndef _LP64 | |
0 | 876 src.load_item_force (FrameMap::rcx_oop_opr); |
877 src_pos.load_item_force (FrameMap::rdx_opr); | |
878 dst.load_item_force (FrameMap::rax_oop_opr); | |
879 dst_pos.load_item_force (FrameMap::rbx_opr); | |
880 length.load_item_force (FrameMap::rdi_opr); | |
881 LIR_Opr tmp = (FrameMap::rsi_opr); | |
304 | 882 #else |
883 | |
884 // The java calling convention will give us enough registers | |
885 // so that on the stub side the args will be perfect already. | |
886 // On the other slow/special case side we call C and the arg | |
887 // positions are not similar enough to pick one as the best. | |
888 // Also because the java calling convention is a "shifted" version | |
889 // of the C convention we can process the java args trivially into C | |
890 // args without worry of overwriting during the xfer | |
891 | |
892 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); | |
893 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); | |
894 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); | |
895 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); | |
896 length.load_item_force (FrameMap::as_opr(j_rarg4)); | |
897 | |
898 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); | |
899 #endif // LP64 | |
900 | |
0 | 901 set_no_result(x); |
902 | |
903 int flags; | |
904 ciArrayKlass* expected_type; | |
905 arraycopy_helper(x, &flags, &expected_type); | |
906 | |
907 CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?) | |
908 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint | |
909 } | |
910 | |
911 | |
912 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f | |
913 // _i2b, _i2c, _i2s | |
914 LIR_Opr fixed_register_for(BasicType type) { | |
915 switch (type) { | |
916 case T_FLOAT: return FrameMap::fpu0_float_opr; | |
917 case T_DOUBLE: return FrameMap::fpu0_double_opr; | |
918 case T_INT: return FrameMap::rax_opr; | |
304 | 919 case T_LONG: return FrameMap::long0_opr; |
0 | 920 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; |
921 } | |
922 } | |
923 | |
924 void LIRGenerator::do_Convert(Convert* x) { | |
925 // flags that vary for the different operations and different SSE-settings | |
926 bool fixed_input, fixed_result, round_result, needs_stub; | |
927 | |
928 switch (x->op()) { | |
929 case Bytecodes::_i2l: // fall through | |
930 case Bytecodes::_l2i: // fall through | |
931 case Bytecodes::_i2b: // fall through | |
932 case Bytecodes::_i2c: // fall through | |
933 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
934 | |
935 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; | |
936 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; | |
937 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; | |
938 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; | |
939 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
940 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; | |
941 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; | |
942 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; | |
943 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
944 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; | |
945 default: ShouldNotReachHere(); | |
946 } | |
947 | |
948 LIRItem value(x->value(), this); | |
949 value.load_item(); | |
950 LIR_Opr input = value.result(); | |
951 LIR_Opr result = rlock(x); | |
952 | |
953 // arguments of lir_convert | |
954 LIR_Opr conv_input = input; | |
955 LIR_Opr conv_result = result; | |
956 ConversionStub* stub = NULL; | |
957 | |
958 if (fixed_input) { | |
959 conv_input = fixed_register_for(input->type()); | |
960 __ move(input, conv_input); | |
961 } | |
962 | |
963 assert(fixed_result == false || round_result == false, "cannot set both"); | |
964 if (fixed_result) { | |
965 conv_result = fixed_register_for(result->type()); | |
966 } else if (round_result) { | |
967 result = new_register(result->type()); | |
968 set_vreg_flag(result, must_start_in_memory); | |
969 } | |
970 | |
971 if (needs_stub) { | |
972 stub = new ConversionStub(x->op(), conv_input, conv_result); | |
973 } | |
974 | |
975 __ convert(x->op(), conv_input, conv_result, stub); | |
976 | |
977 if (result != conv_result) { | |
978 __ move(conv_result, result); | |
979 } | |
980 | |
981 assert(result->is_virtual(), "result must be virtual register"); | |
982 set_result(x, result); | |
983 } | |
984 | |
985 | |
986 void LIRGenerator::do_NewInstance(NewInstance* x) { | |
1819 | 987 #ifndef PRODUCT |
0 | 988 if (PrintNotLoaded && !x->klass()->is_loaded()) { |
1819 | 989 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci()); |
0 | 990 } |
1819 | 991 #endif |
0 | 992 CodeEmitInfo* info = state_for(x, x->state()); |
993 LIR_Opr reg = result_register_for(x->type()); | |
994 LIR_Opr klass_reg = new_register(objectType); | |
995 new_instance(reg, x->klass(), | |
996 FrameMap::rcx_oop_opr, | |
997 FrameMap::rdi_oop_opr, | |
998 FrameMap::rsi_oop_opr, | |
999 LIR_OprFact::illegalOpr, | |
1000 FrameMap::rdx_oop_opr, info); | |
1001 LIR_Opr result = rlock_result(x); | |
1002 __ move(reg, result); | |
1003 } | |
1004 | |
1005 | |
1006 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { | |
1007 CodeEmitInfo* info = state_for(x, x->state()); | |
1008 | |
1009 LIRItem length(x->length(), this); | |
1010 length.load_item_force(FrameMap::rbx_opr); | |
1011 | |
1012 LIR_Opr reg = result_register_for(x->type()); | |
1013 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
1014 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
1015 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
1016 LIR_Opr tmp4 = reg; | |
1017 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
1018 LIR_Opr len = length.result(); | |
1019 BasicType elem_type = x->elt_type(); | |
1020 | |
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1021 __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); |
0 | 1022 |
1023 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); | |
1024 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); | |
1025 | |
1026 LIR_Opr result = rlock_result(x); | |
1027 __ move(reg, result); | |
1028 } | |
1029 | |
1030 | |
1031 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { | |
1032 LIRItem length(x->length(), this); | |
1033 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction | |
1034 // and therefore provide the state before the parameters have been consumed | |
1035 CodeEmitInfo* patching_info = NULL; | |
1036 if (!x->klass()->is_loaded() || PatchALot) { | |
1037 patching_info = state_for(x, x->state_before()); | |
1038 } | |
1039 | |
1040 CodeEmitInfo* info = state_for(x, x->state()); | |
1041 | |
1042 const LIR_Opr reg = result_register_for(x->type()); | |
1043 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; | |
1044 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; | |
1045 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; | |
1046 LIR_Opr tmp4 = reg; | |
1047 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; | |
1048 | |
1049 length.load_item_force(FrameMap::rbx_opr); | |
1050 LIR_Opr len = length.result(); | |
1051 | |
1052 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); | |
1053 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass()); | |
1054 if (obj == ciEnv::unloaded_ciobjarrayklass()) { | |
1055 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); | |
1056 } | |
1057 jobject2reg_with_patching(klass_reg, obj, patching_info); | |
1058 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); | |
1059 | |
1060 LIR_Opr result = rlock_result(x); | |
1061 __ move(reg, result); | |
1062 } | |
1063 | |
1064 | |
1065 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { | |
1066 Values* dims = x->dims(); | |
1067 int i = dims->length(); | |
1068 LIRItemList* items = new LIRItemList(dims->length(), NULL); | |
1069 while (i-- > 0) { | |
1070 LIRItem* size = new LIRItem(dims->at(i), this); | |
1071 items->at_put(i, size); | |
1072 } | |
1073 | |
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1074 // Evaluate state_for early since it may emit code. |
0 | 1075 CodeEmitInfo* patching_info = NULL; |
1076 if (!x->klass()->is_loaded() || PatchALot) { | |
1077 patching_info = state_for(x, x->state_before()); | |
1078 | |
1079 // cannot re-use same xhandlers for multiple CodeEmitInfos, so | |
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1080 // clone all handlers. This is handled transparently in other |
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1081 // places by the CodeEmitInfo cloning logic but is handled |
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1082 // specially here because a stub isn't being used. |
0 | 1083 x->set_exception_handlers(new XHandlers(x->exception_handlers())); |
1084 } | |
1085 CodeEmitInfo* info = state_for(x, x->state()); | |
1086 | |
1087 i = dims->length(); | |
1088 while (i-- > 0) { | |
1089 LIRItem* size = items->at(i); | |
1090 size->load_nonconstant(); | |
1091 | |
1092 store_stack_parameter(size->result(), in_ByteSize(i*4)); | |
1093 } | |
1094 | |
1095 LIR_Opr reg = result_register_for(x->type()); | |
1096 jobject2reg_with_patching(reg, x->klass(), patching_info); | |
1097 | |
1098 LIR_Opr rank = FrameMap::rbx_opr; | |
1099 __ move(LIR_OprFact::intConst(x->rank()), rank); | |
1100 LIR_Opr varargs = FrameMap::rcx_opr; | |
1101 __ move(FrameMap::rsp_opr, varargs); | |
1102 LIR_OprList* args = new LIR_OprList(3); | |
1103 args->append(reg); | |
1104 args->append(rank); | |
1105 args->append(varargs); | |
1106 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), | |
1107 LIR_OprFact::illegalOpr, | |
1108 reg, args, info); | |
1109 | |
1110 LIR_Opr result = rlock_result(x); | |
1111 __ move(reg, result); | |
1112 } | |
1113 | |
1114 | |
1115 void LIRGenerator::do_BlockBegin(BlockBegin* x) { | |
1116 // nothing to do for now | |
1117 } | |
1118 | |
1119 | |
1120 void LIRGenerator::do_CheckCast(CheckCast* x) { | |
1121 LIRItem obj(x->obj(), this); | |
1122 | |
1123 CodeEmitInfo* patching_info = NULL; | |
1124 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { | |
1125 // must do this before locking the destination register as an oop register, | |
1126 // and before the obj is loaded (the latter is for deoptimization) | |
1127 patching_info = state_for(x, x->state_before()); | |
1128 } | |
1129 obj.load_item(); | |
1130 | |
1131 // info for exceptions | |
1819 | 1132 CodeEmitInfo* info_for_exception = state_for(x); |
0 | 1133 |
1134 CodeStub* stub; | |
1135 if (x->is_incompatible_class_change_check()) { | |
1136 assert(patching_info == NULL, "can't patch this"); | |
1137 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); | |
1138 } else { | |
1139 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); | |
1140 } | |
1141 LIR_Opr reg = rlock_result(x); | |
1142 __ checkcast(reg, obj.result(), x->klass(), | |
1143 new_register(objectType), new_register(objectType), | |
1144 !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr, | |
1145 x->direct_compare(), info_for_exception, patching_info, stub, | |
1146 x->profiled_method(), x->profiled_bci()); | |
1147 } | |
1148 | |
1149 | |
1150 void LIRGenerator::do_InstanceOf(InstanceOf* x) { | |
1151 LIRItem obj(x->obj(), this); | |
1152 | |
1153 // result and test object may not be in same register | |
1154 LIR_Opr reg = rlock_result(x); | |
1155 CodeEmitInfo* patching_info = NULL; | |
1156 if ((!x->klass()->is_loaded() || PatchALot)) { | |
1157 // must do this before locking the destination register as an oop register | |
1158 patching_info = state_for(x, x->state_before()); | |
1159 } | |
1160 obj.load_item(); | |
1161 __ instanceof(reg, obj.result(), x->klass(), | |
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1162 new_register(objectType), new_register(objectType), |
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1163 !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr, |
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1164 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); |
0 | 1165 } |
1166 | |
1167 | |
1168 void LIRGenerator::do_If(If* x) { | |
1169 assert(x->number_of_sux() == 2, "inconsistency"); | |
1170 ValueTag tag = x->x()->type()->tag(); | |
1171 bool is_safepoint = x->is_safepoint(); | |
1172 | |
1173 If::Condition cond = x->cond(); | |
1174 | |
1175 LIRItem xitem(x->x(), this); | |
1176 LIRItem yitem(x->y(), this); | |
1177 LIRItem* xin = &xitem; | |
1178 LIRItem* yin = &yitem; | |
1179 | |
1180 if (tag == longTag) { | |
1181 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; | |
1182 // mirror for other conditions | |
1183 if (cond == If::gtr || cond == If::leq) { | |
1184 cond = Instruction::mirror(cond); | |
1185 xin = &yitem; | |
1186 yin = &xitem; | |
1187 } | |
1188 xin->set_destroys_register(); | |
1189 } | |
1190 xin->load_item(); | |
1191 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { | |
1192 // inline long zero | |
1193 yin->dont_load_item(); | |
1194 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { | |
1195 // longs cannot handle constants at right side | |
1196 yin->load_item(); | |
1197 } else { | |
1198 yin->dont_load_item(); | |
1199 } | |
1200 | |
1201 // add safepoint before generating condition code so it can be recomputed | |
1202 if (x->is_safepoint()) { | |
1203 // increment backedge counter if needed | |
1783 | 1204 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci()); |
0 | 1205 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); |
1206 } | |
1207 set_no_result(x); | |
1208 | |
1209 LIR_Opr left = xin->result(); | |
1210 LIR_Opr right = yin->result(); | |
1211 __ cmp(lir_cond(cond), left, right); | |
1783 | 1212 // Generate branch profiling. Profiling code doesn't kill flags. |
0 | 1213 profile_branch(x, cond); |
1214 move_to_phi(x->state()); | |
1215 if (x->x()->type()->is_float_kind()) { | |
1216 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); | |
1217 } else { | |
1218 __ branch(lir_cond(cond), right->type(), x->tsux()); | |
1219 } | |
1220 assert(x->default_sux() == x->fsux(), "wrong destination above"); | |
1221 __ jump(x->default_sux()); | |
1222 } | |
1223 | |
1224 | |
1225 LIR_Opr LIRGenerator::getThreadPointer() { | |
304 | 1226 #ifdef _LP64 |
1227 return FrameMap::as_pointer_opr(r15_thread); | |
1228 #else | |
0 | 1229 LIR_Opr result = new_register(T_INT); |
1230 __ get_thread(result); | |
1231 return result; | |
304 | 1232 #endif // |
0 | 1233 } |
1234 | |
1235 void LIRGenerator::trace_block_entry(BlockBegin* block) { | |
1236 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); | |
1237 LIR_OprList* args = new LIR_OprList(); | |
1238 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); | |
1239 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); | |
1240 } | |
1241 | |
1242 | |
1243 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, | |
1244 CodeEmitInfo* info) { | |
1245 if (address->type() == T_LONG) { | |
1246 address = new LIR_Address(address->base(), | |
1247 address->index(), address->scale(), | |
1248 address->disp(), T_DOUBLE); | |
1249 // Transfer the value atomically by using FP moves. This means | |
1250 // the value has to be moved between CPU and FPU registers. It | |
1251 // always has to be moved through spill slot since there's no | |
1252 // quick way to pack the value into an SSE register. | |
1253 LIR_Opr temp_double = new_register(T_DOUBLE); | |
1254 LIR_Opr spill = new_register(T_LONG); | |
1255 set_vreg_flag(spill, must_start_in_memory); | |
1256 __ move(value, spill); | |
1257 __ volatile_move(spill, temp_double, T_LONG); | |
1258 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); | |
1259 } else { | |
1260 __ store(value, address, info); | |
1261 } | |
1262 } | |
1263 | |
1264 | |
1265 | |
1266 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, | |
1267 CodeEmitInfo* info) { | |
1268 if (address->type() == T_LONG) { | |
1269 address = new LIR_Address(address->base(), | |
1270 address->index(), address->scale(), | |
1271 address->disp(), T_DOUBLE); | |
1272 // Transfer the value atomically by using FP moves. This means | |
1273 // the value has to be moved between CPU and FPU registers. In | |
1274 // SSE0 and SSE1 mode it has to be moved through spill slot but in | |
1275 // SSE2+ mode it can be moved directly. | |
1276 LIR_Opr temp_double = new_register(T_DOUBLE); | |
1277 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); | |
1278 __ volatile_move(temp_double, result, T_LONG); | |
1279 if (UseSSE < 2) { | |
1280 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible | |
1281 set_vreg_flag(result, must_start_in_memory); | |
1282 } | |
1283 } else { | |
1284 __ load(address, result, info); | |
1285 } | |
1286 } | |
1287 | |
1288 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, | |
1289 BasicType type, bool is_volatile) { | |
1290 if (is_volatile && type == T_LONG) { | |
1291 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
1292 LIR_Opr tmp = new_register(T_DOUBLE); | |
1293 __ load(addr, tmp); | |
1294 LIR_Opr spill = new_register(T_LONG); | |
1295 set_vreg_flag(spill, must_start_in_memory); | |
1296 __ move(tmp, spill); | |
1297 __ move(spill, dst); | |
1298 } else { | |
1299 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1300 __ load(addr, dst); | |
1301 } | |
1302 } | |
1303 | |
1304 | |
1305 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, | |
1306 BasicType type, bool is_volatile) { | |
1307 if (is_volatile && type == T_LONG) { | |
1308 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); | |
1309 LIR_Opr tmp = new_register(T_DOUBLE); | |
1310 LIR_Opr spill = new_register(T_DOUBLE); | |
1311 set_vreg_flag(spill, must_start_in_memory); | |
1312 __ move(data, spill); | |
1313 __ move(spill, tmp); | |
1314 __ move(tmp, addr); | |
1315 } else { | |
1316 LIR_Address* addr = new LIR_Address(src, offset, type); | |
1317 bool is_obj = (type == T_ARRAY || type == T_OBJECT); | |
1318 if (is_obj) { | |
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1320 pre_barrier(LIR_OprFact::address(addr), false, NULL); |
0 | 1321 __ move(data, addr); |
1322 assert(src->is_register(), "must be register"); | |
1323 // Seems to be a precise address | |
1324 post_barrier(LIR_OprFact::address(addr), data); | |
1325 } else { | |
1326 __ move(data, addr); | |
1327 } | |
1328 } | |
1329 } |