Mercurial > hg > graal-jvmci-8
annotate jvmci/jdk.vm.ci.aarch64/src/jdk/vm/ci/aarch64/AArch64.java @ 24234:ea6f94ab283b default tip
Added tag jvmci-0.36 for changeset 8128b98d4736
| author | Gilles Duboscq <gilles.m.duboscq@oracle.com> |
|---|---|
| date | Mon, 18 Sep 2017 18:49:45 +0200 |
| parents | 9e1235406b59 |
| children |
| rev | line source |
|---|---|
| 22759 | 1 /* |
| 2 * Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved. | |
| 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
| 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA | |
| 20 * or visit www.oracle.com if you need additional information or have any | |
| 21 * questions. | |
| 22 */ | |
| 23 package jdk.vm.ci.aarch64; | |
| 24 | |
| 25 import java.nio.ByteOrder; | |
| 26 import java.util.EnumSet; | |
| 27 | |
| 28 import jdk.vm.ci.code.Architecture; | |
| 29 import jdk.vm.ci.code.Register; | |
| 30 import jdk.vm.ci.code.Register.RegisterCategory; | |
|
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31 import jdk.vm.ci.code.RegisterArray; |
| 22759 | 32 import jdk.vm.ci.meta.JavaKind; |
| 33 import jdk.vm.ci.meta.PlatformKind; | |
| 34 | |
| 35 /** | |
| 36 * Represents the AArch64 architecture. | |
| 37 */ | |
| 38 public class AArch64 extends Architecture { | |
| 39 | |
| 40 public static final RegisterCategory CPU = new RegisterCategory("CPU"); | |
| 41 | |
| 42 // General purpose CPU registers | |
| 43 public static final Register r0 = new Register(0, 0, "r0", CPU); | |
| 44 public static final Register r1 = new Register(1, 1, "r1", CPU); | |
| 45 public static final Register r2 = new Register(2, 2, "r2", CPU); | |
| 46 public static final Register r3 = new Register(3, 3, "r3", CPU); | |
| 47 public static final Register r4 = new Register(4, 4, "r4", CPU); | |
| 48 public static final Register r5 = new Register(5, 5, "r5", CPU); | |
| 49 public static final Register r6 = new Register(6, 6, "r6", CPU); | |
| 50 public static final Register r7 = new Register(7, 7, "r7", CPU); | |
| 51 public static final Register r8 = new Register(8, 8, "r8", CPU); | |
| 52 public static final Register r9 = new Register(9, 9, "r9", CPU); | |
| 53 public static final Register r10 = new Register(10, 10, "r10", CPU); | |
| 54 public static final Register r11 = new Register(11, 11, "r11", CPU); | |
| 55 public static final Register r12 = new Register(12, 12, "r12", CPU); | |
| 56 public static final Register r13 = new Register(13, 13, "r13", CPU); | |
| 57 public static final Register r14 = new Register(14, 14, "r14", CPU); | |
| 58 public static final Register r15 = new Register(15, 15, "r15", CPU); | |
| 59 public static final Register r16 = new Register(16, 16, "r16", CPU); | |
| 60 public static final Register r17 = new Register(17, 17, "r17", CPU); | |
| 61 public static final Register r18 = new Register(18, 18, "r18", CPU); | |
| 62 public static final Register r19 = new Register(19, 19, "r19", CPU); | |
| 63 public static final Register r20 = new Register(20, 20, "r20", CPU); | |
| 64 public static final Register r21 = new Register(21, 21, "r21", CPU); | |
| 65 public static final Register r22 = new Register(22, 22, "r22", CPU); | |
| 66 public static final Register r23 = new Register(23, 23, "r23", CPU); | |
| 67 public static final Register r24 = new Register(24, 24, "r24", CPU); | |
| 68 public static final Register r25 = new Register(25, 25, "r25", CPU); | |
| 69 public static final Register r26 = new Register(26, 26, "r26", CPU); | |
| 70 public static final Register r27 = new Register(27, 27, "r27", CPU); | |
| 71 public static final Register r28 = new Register(28, 28, "r28", CPU); | |
| 72 public static final Register r29 = new Register(29, 29, "r29", CPU); | |
| 73 public static final Register r30 = new Register(30, 30, "r30", CPU); | |
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74 |
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75 /* |
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76 * r31 is not a general purpose register, but represents either the stackpointer or the |
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77 * zero/discard register depending on the instruction. So we represent those two uses as two |
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78 * different registers. The register numbers are kept in sync with register_aarch64.hpp and have |
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79 * to be sequential, hence we also need a general r31 register here, which is never used. |
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80 */ |
| 22759 | 81 public static final Register r31 = new Register(31, 31, "r31", CPU); |
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82 public static final Register zr = new Register(32, 31, "zr", CPU); |
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83 public static final Register sp = new Register(33, 31, "sp", CPU); |
| 22759 | 84 |
| 85 public static final Register lr = r30; | |
| 86 | |
| 87 // @formatter:off | |
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Doug Simon <doug.simon@oracle.com>
parents:
23398
diff
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88 public static final RegisterArray cpuRegisters = new RegisterArray( |
| 22759 | 89 r0, r1, r2, r3, r4, r5, r6, r7, |
| 90 r8, r9, r10, r11, r12, r13, r14, r15, | |
| 91 r16, r17, r18, r19, r20, r21, r22, r23, | |
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92 r24, r25, r26, r27, r28, r29, r30, r31, |
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93 zr, sp |
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94 ); |
| 22759 | 95 // @formatter:on |
| 96 | |
| 97 public static final RegisterCategory SIMD = new RegisterCategory("SIMD"); | |
| 98 | |
| 99 // Simd registers | |
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100 public static final Register v0 = new Register(34, 0, "v0", SIMD); |
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101 public static final Register v1 = new Register(35, 1, "v1", SIMD); |
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102 public static final Register v2 = new Register(36, 2, "v2", SIMD); |
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103 public static final Register v3 = new Register(37, 3, "v3", SIMD); |
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104 public static final Register v4 = new Register(38, 4, "v4", SIMD); |
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105 public static final Register v5 = new Register(39, 5, "v5", SIMD); |
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106 public static final Register v6 = new Register(40, 6, "v6", SIMD); |
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107 public static final Register v7 = new Register(41, 7, "v7", SIMD); |
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108 public static final Register v8 = new Register(42, 8, "v8", SIMD); |
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109 public static final Register v9 = new Register(43, 9, "v9", SIMD); |
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110 public static final Register v10 = new Register(44, 10, "v10", SIMD); |
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111 public static final Register v11 = new Register(45, 11, "v11", SIMD); |
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112 public static final Register v12 = new Register(46, 12, "v12", SIMD); |
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113 public static final Register v13 = new Register(47, 13, "v13", SIMD); |
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114 public static final Register v14 = new Register(48, 14, "v14", SIMD); |
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115 public static final Register v15 = new Register(49, 15, "v15", SIMD); |
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116 public static final Register v16 = new Register(50, 16, "v16", SIMD); |
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117 public static final Register v17 = new Register(51, 17, "v17", SIMD); |
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118 public static final Register v18 = new Register(52, 18, "v18", SIMD); |
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119 public static final Register v19 = new Register(53, 19, "v19", SIMD); |
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120 public static final Register v20 = new Register(54, 20, "v20", SIMD); |
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121 public static final Register v21 = new Register(55, 21, "v21", SIMD); |
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122 public static final Register v22 = new Register(56, 22, "v22", SIMD); |
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123 public static final Register v23 = new Register(57, 23, "v23", SIMD); |
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124 public static final Register v24 = new Register(58, 24, "v24", SIMD); |
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125 public static final Register v25 = new Register(59, 25, "v25", SIMD); |
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126 public static final Register v26 = new Register(60, 26, "v26", SIMD); |
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127 public static final Register v27 = new Register(61, 27, "v27", SIMD); |
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128 public static final Register v28 = new Register(62, 28, "v28", SIMD); |
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129 public static final Register v29 = new Register(63, 29, "v29", SIMD); |
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130 public static final Register v30 = new Register(64, 30, "v30", SIMD); |
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131 public static final Register v31 = new Register(65, 31, "v31", SIMD); |
| 22759 | 132 |
| 133 // @formatter:off | |
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Doug Simon <doug.simon@oracle.com>
parents:
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134 public static final RegisterArray simdRegisters = new RegisterArray( |
| 22759 | 135 v0, v1, v2, v3, v4, v5, v6, v7, |
| 136 v8, v9, v10, v11, v12, v13, v14, v15, | |
| 137 v16, v17, v18, v19, v20, v21, v22, v23, | |
| 138 v24, v25, v26, v27, v28, v29, v30, v31 | |
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139 ); |
| 22759 | 140 // @formatter:on |
| 141 | |
| 142 // @formatter:off | |
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143 public static final RegisterArray allRegisters = new RegisterArray( |
| 22759 | 144 r0, r1, r2, r3, r4, r5, r6, r7, |
| 145 r8, r9, r10, r11, r12, r13, r14, r15, | |
| 146 r16, r17, r18, r19, r20, r21, r22, r23, | |
| 147 r24, r25, r26, r27, r28, r29, r30, r31, | |
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148 zr, sp, |
| 22759 | 149 |
| 150 v0, v1, v2, v3, v4, v5, v6, v7, | |
| 151 v8, v9, v10, v11, v12, v13, v14, v15, | |
| 152 v16, v17, v18, v19, v20, v21, v22, v23, | |
| 153 v24, v25, v26, v27, v28, v29, v30, v31 | |
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Doug Simon <doug.simon@oracle.com>
parents:
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154 ); |
| 22759 | 155 // @formatter:on |
| 156 | |
| 157 /** | |
| 158 * Basic set of CPU features mirroring what is returned from the cpuid instruction. See: | |
| 159 * {@code VM_Version::cpuFeatureFlags}. | |
| 160 */ | |
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161 public enum CPUFeature { |
| 22759 | 162 FP, |
| 163 ASIMD, | |
| 164 EVTSTRM, | |
| 165 AES, | |
| 166 PMULL, | |
| 167 SHA1, | |
| 168 SHA2, | |
| 169 CRC32, | |
| 170 A53MAC, | |
| 171 DMB_ATOMICS | |
| 172 } | |
| 173 | |
| 174 private final EnumSet<CPUFeature> features; | |
| 175 | |
| 176 /** | |
| 177 * Set of flags to control code emission. | |
| 178 */ | |
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179 public enum Flag { |
| 22759 | 180 UseBarriersForVolatile, |
| 181 UseCRC32, | |
| 182 UseNeon | |
| 183 } | |
| 184 | |
| 185 private final EnumSet<Flag> flags; | |
| 186 | |
| 187 public AArch64(EnumSet<CPUFeature> features, EnumSet<Flag> flags) { | |
| 188 super("aarch64", AArch64Kind.QWORD, ByteOrder.LITTLE_ENDIAN, true, allRegisters, 0, 0, 0); | |
| 189 this.features = features; | |
| 190 this.flags = flags; | |
| 191 } | |
| 192 | |
| 193 public EnumSet<CPUFeature> getFeatures() { | |
| 194 return features; | |
| 195 } | |
| 196 | |
| 197 public EnumSet<Flag> getFlags() { | |
| 198 return flags; | |
| 199 } | |
| 200 | |
| 201 @Override | |
| 202 public PlatformKind getPlatformKind(JavaKind javaKind) { | |
| 203 switch (javaKind) { | |
| 204 case Boolean: | |
| 205 case Byte: | |
| 206 return AArch64Kind.BYTE; | |
| 207 case Short: | |
| 208 case Char: | |
| 209 return AArch64Kind.WORD; | |
| 210 case Int: | |
| 211 return AArch64Kind.DWORD; | |
| 212 case Long: | |
| 213 case Object: | |
| 214 return AArch64Kind.QWORD; | |
| 215 case Float: | |
| 216 return AArch64Kind.SINGLE; | |
| 217 case Double: | |
| 218 return AArch64Kind.DOUBLE; | |
| 219 default: | |
| 220 return null; | |
| 221 } | |
| 222 } | |
| 223 | |
| 224 @Override | |
| 225 public boolean canStoreValue(RegisterCategory category, PlatformKind platformKind) { | |
| 226 AArch64Kind kind = (AArch64Kind) platformKind; | |
| 227 if (kind.isInteger()) { | |
| 228 return category.equals(CPU); | |
| 229 } else if (kind.isSIMD()) { | |
| 230 return category.equals(SIMD); | |
| 231 } | |
| 232 return false; | |
| 233 } | |
| 234 | |
| 235 @Override | |
| 236 public AArch64Kind getLargestStorableKind(RegisterCategory category) { | |
| 237 if (category.equals(CPU)) { | |
| 238 return AArch64Kind.QWORD; | |
| 239 } else if (category.equals(SIMD)) { | |
| 240 return AArch64Kind.V128_QWORD; | |
| 241 } else { | |
| 242 return null; | |
| 243 } | |
| 244 } | |
| 245 } |