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comparison src/cpu/x86/vm/x86_64.ad @ 14428:044b28168e20

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8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation Summary: added ability in C2 to expand mach nodes to several mach nodes after register allocation Reviewed-by: kvn
author goetz
date Thu, 14 Nov 2013 19:24:59 -0800
parents 2b8e28fdf503
children 50fdb38839eb
comparison
equal deleted inserted replaced
14427:eb178e97560c 14428:044b28168e20
684 //============================================================================= 684 //=============================================================================
685 const RegMask& MachConstantBaseNode::_out_RegMask = RegMask::Empty; 685 const RegMask& MachConstantBaseNode::_out_RegMask = RegMask::Empty;
686 686
687 int Compile::ConstantTable::calculate_table_base_offset() const { 687 int Compile::ConstantTable::calculate_table_base_offset() const {
688 return 0; // absolute addressing, no offset 688 return 0; // absolute addressing, no offset
689 }
690
691 bool MachConstantBaseNode::requires_postalloc_expand() const { return false; }
692 void MachConstantBaseNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {
693 ShouldNotReachHere();
689 } 694 }
690 695
691 void MachConstantBaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const { 696 void MachConstantBaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
692 // Empty encoding 697 // Empty encoding
693 } 698 }
1540 const int Matcher::long_cmove_cost() { return 0; } 1545 const int Matcher::long_cmove_cost() { return 0; }
1541 1546
1542 // No CMOVF/CMOVD with SSE2 1547 // No CMOVF/CMOVD with SSE2
1543 const int Matcher::float_cmove_cost() { return ConditionalMoveLimit; } 1548 const int Matcher::float_cmove_cost() { return ConditionalMoveLimit; }
1544 1549
1550 // Does the CPU require late expand (see block.cpp for description of late expand)?
1551 const bool Matcher::require_postalloc_expand = false;
1552
1545 // Should the Matcher clone shifts on addressing modes, expecting them 1553 // Should the Matcher clone shifts on addressing modes, expecting them
1546 // to be subsumed into complex addressing expressions or compute them 1554 // to be subsumed into complex addressing expressions or compute them
1547 // into registers? True for Intel but false for most RISCs 1555 // into registers? True for Intel but false for most RISCs
1548 const bool Matcher::clone_shift_expressions = true; 1556 const bool Matcher::clone_shift_expressions = true;
1549 1557