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comparison src/share/vm/opto/matcher.cpp @ 13073:1dcea64e9f00

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8024830: SEGV in org.apache.lucene.codecs.compressing.CompressingTermVectorsReader.get Summary: Exclude last input argument's stack slots from vector's spilling masks. Reviewed-by: iveresov
author kvn
date Mon, 11 Nov 2013 11:53:33 -0800
parents c9ccd7b85f20
children da862781b584 085b304a1cc5
comparison
equal deleted inserted replaced
13072:83c8f6f4ab09 13073:1dcea64e9f00
462 462
463 // At first, start with the empty mask 463 // At first, start with the empty mask
464 C->FIRST_STACK_mask().Clear(); 464 C->FIRST_STACK_mask().Clear();
465 465
466 // Add in the incoming argument area 466 // Add in the incoming argument area
467 OptoReg::Name init = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); 467 OptoReg::Name init_in = OptoReg::add(_old_SP, C->out_preserve_stack_slots());
468 for (i = init; i < _in_arg_limit; i = OptoReg::add(i,1)) 468 for (i = init_in; i < _in_arg_limit; i = OptoReg::add(i,1)) {
469 C->FIRST_STACK_mask().Insert(i); 469 C->FIRST_STACK_mask().Insert(i);
470 470 }
471 // Add in all bits past the outgoing argument area 471 // Add in all bits past the outgoing argument area
472 guarantee(RegMask::can_represent_arg(OptoReg::add(_out_arg_limit,-1)), 472 guarantee(RegMask::can_represent_arg(OptoReg::add(_out_arg_limit,-1)),
473 "must be able to represent all call arguments in reg mask"); 473 "must be able to represent all call arguments in reg mask");
474 init = _out_arg_limit; 474 OptoReg::Name init = _out_arg_limit;
475 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) 475 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) {
476 C->FIRST_STACK_mask().Insert(i); 476 C->FIRST_STACK_mask().Insert(i);
477 477 }
478 // Finally, set the "infinite stack" bit. 478 // Finally, set the "infinite stack" bit.
479 C->FIRST_STACK_mask().set_AllStack(); 479 C->FIRST_STACK_mask().set_AllStack();
480 480
481 // Make spill masks. Registers for their class, plus FIRST_STACK_mask. 481 // Make spill masks. Registers for their class, plus FIRST_STACK_mask.
482 RegMask aligned_stack_mask = C->FIRST_STACK_mask(); 482 RegMask aligned_stack_mask = C->FIRST_STACK_mask();
504 if (Matcher::vector_size_supported(T_BYTE,4)) { 504 if (Matcher::vector_size_supported(T_BYTE,4)) {
505 *idealreg2spillmask[Op_VecS] = *idealreg2regmask[Op_VecS]; 505 *idealreg2spillmask[Op_VecS] = *idealreg2regmask[Op_VecS];
506 idealreg2spillmask[Op_VecS]->OR(C->FIRST_STACK_mask()); 506 idealreg2spillmask[Op_VecS]->OR(C->FIRST_STACK_mask());
507 } 507 }
508 if (Matcher::vector_size_supported(T_FLOAT,2)) { 508 if (Matcher::vector_size_supported(T_FLOAT,2)) {
509 // For VecD we need dual alignment and 8 bytes (2 slots) for spills.
510 // RA guarantees such alignment since it is needed for Double and Long values.
509 *idealreg2spillmask[Op_VecD] = *idealreg2regmask[Op_VecD]; 511 *idealreg2spillmask[Op_VecD] = *idealreg2regmask[Op_VecD];
510 idealreg2spillmask[Op_VecD]->OR(aligned_stack_mask); 512 idealreg2spillmask[Op_VecD]->OR(aligned_stack_mask);
511 } 513 }
512 if (Matcher::vector_size_supported(T_FLOAT,4)) { 514 if (Matcher::vector_size_supported(T_FLOAT,4)) {
515 // For VecX we need quadro alignment and 16 bytes (4 slots) for spills.
516 //
517 // RA can use input arguments stack slots for spills but until RA
518 // we don't know frame size and offset of input arg stack slots.
519 //
520 // Exclude last input arg stack slots to avoid spilling vectors there
521 // otherwise vector spills could stomp over stack slots in caller frame.
522 OptoReg::Name in = OptoReg::add(_in_arg_limit, -1);
523 for (int k = 1; (in >= init_in) && (k < RegMask::SlotsPerVecX); k++) {
524 aligned_stack_mask.Remove(in);
525 in = OptoReg::add(in, -1);
526 }
513 aligned_stack_mask.clear_to_sets(RegMask::SlotsPerVecX); 527 aligned_stack_mask.clear_to_sets(RegMask::SlotsPerVecX);
514 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); 528 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack");
515 *idealreg2spillmask[Op_VecX] = *idealreg2regmask[Op_VecX]; 529 *idealreg2spillmask[Op_VecX] = *idealreg2regmask[Op_VecX];
516 idealreg2spillmask[Op_VecX]->OR(aligned_stack_mask); 530 idealreg2spillmask[Op_VecX]->OR(aligned_stack_mask);
517 } 531 }
518 if (Matcher::vector_size_supported(T_FLOAT,8)) { 532 if (Matcher::vector_size_supported(T_FLOAT,8)) {
533 // For VecY we need octo alignment and 32 bytes (8 slots) for spills.
534 OptoReg::Name in = OptoReg::add(_in_arg_limit, -1);
535 for (int k = 1; (in >= init_in) && (k < RegMask::SlotsPerVecY); k++) {
536 aligned_stack_mask.Remove(in);
537 in = OptoReg::add(in, -1);
538 }
519 aligned_stack_mask.clear_to_sets(RegMask::SlotsPerVecY); 539 aligned_stack_mask.clear_to_sets(RegMask::SlotsPerVecY);
520 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); 540 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack");
521 *idealreg2spillmask[Op_VecY] = *idealreg2regmask[Op_VecY]; 541 *idealreg2spillmask[Op_VecY] = *idealreg2regmask[Op_VecY];
522 idealreg2spillmask[Op_VecY]->OR(aligned_stack_mask); 542 idealreg2spillmask[Op_VecY]->OR(aligned_stack_mask);
523 } 543 }