Mercurial > hg > graal-jvmci-8
comparison src/share/vm/opto/mulnode.cpp @ 14429:2113136690bc
8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering
Summary: Add a field to C2 LoadNode and StoreNode classes which indicates whether the load/store should do an acquire/release on platforms which support it.
Reviewed-by: kvn
author | goetz |
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date | Fri, 15 Nov 2013 11:05:32 -0800 |
parents | 67f4c477c9ab |
children | 4ca6dc0799b6 |
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14427:eb178e97560c | 14429:2113136690bc |
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483 load->outcnt() == 1 && load->unique_out() == this) { | 483 load->outcnt() == 1 && load->unique_out() == this) { |
484 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) { | 484 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) { |
485 Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control), | 485 Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control), |
486 load->in(MemNode::Memory), | 486 load->in(MemNode::Memory), |
487 load->in(MemNode::Address), | 487 load->in(MemNode::Address), |
488 load->adr_type()); | 488 load->adr_type(), |
489 TypeInt::CHAR, MemNode::unordered); | |
489 ldus = phase->transform(ldus); | 490 ldus = phase->transform(ldus); |
490 return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF)); | 491 return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF)); |
491 } | 492 } |
492 | 493 |
493 // Masking sign bits off of a Byte? Do an unsigned byte load plus | 494 // Masking sign bits off of a Byte? Do an unsigned byte load plus |
494 // an and. | 495 // an and. |
495 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) { | 496 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) { |
496 Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control), | 497 Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control), |
497 load->in(MemNode::Memory), | 498 load->in(MemNode::Memory), |
498 load->in(MemNode::Address), | 499 load->in(MemNode::Address), |
499 load->adr_type()); | 500 load->adr_type(), |
501 TypeInt::UBYTE, MemNode::unordered); | |
500 ldub = phase->transform(ldub); | 502 ldub = phase->transform(ldub); |
501 return new (phase->C) AndINode(ldub, phase->intcon(mask)); | 503 return new (phase->C) AndINode(ldub, phase->intcon(mask)); |
502 } | 504 } |
503 } | 505 } |
504 | 506 |
929 else if( can_reshape && | 931 else if( can_reshape && |
930 ld->Opcode() == Op_LoadUS && | 932 ld->Opcode() == Op_LoadUS && |
931 ld->outcnt() == 1 && ld->unique_out() == shl) | 933 ld->outcnt() == 1 && ld->unique_out() == shl) |
932 // Replace zero-extension-load with sign-extension-load | 934 // Replace zero-extension-load with sign-extension-load |
933 return new (phase->C) LoadSNode( ld->in(MemNode::Control), | 935 return new (phase->C) LoadSNode( ld->in(MemNode::Control), |
934 ld->in(MemNode::Memory), | 936 ld->in(MemNode::Memory), |
935 ld->in(MemNode::Address), | 937 ld->in(MemNode::Address), |
936 ld->adr_type()); | 938 ld->adr_type(), TypeInt::SHORT, |
939 MemNode::unordered); | |
937 } | 940 } |
938 | 941 |
939 // Check for "(byte[i] <<24)>>24" which simply sign-extends | 942 // Check for "(byte[i] <<24)>>24" which simply sign-extends |
940 if( shift == 24 && | 943 if( shift == 24 && |
941 (t3 = phase->type(shl->in(2))->isa_int()) && | 944 (t3 = phase->type(shl->in(2))->isa_int()) && |