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comparison src/cpu/ppc/vm/ppc.ad @ 23032:37a5a1341478

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8080190: PPC64: Fix wrong rotate instructions in the .ad file Reviewed-by: kvn
author simonis
date Tue, 19 May 2015 11:06:34 +0200
parents aefa2e84b424
children c3d0bd36ab28
comparison
equal deleted inserted replaced
23031:e5406a79ae90 23032:37a5a1341478
2262 // registers? True for Intel but false for most RISCs. 2262 // registers? True for Intel but false for most RISCs.
2263 const bool Matcher::clone_shift_expressions = false; 2263 const bool Matcher::clone_shift_expressions = false;
2264 2264
2265 // Do we need to mask the count passed to shift instructions or does 2265 // Do we need to mask the count passed to shift instructions or does
2266 // the cpu only look at the lower 5/6 bits anyway? 2266 // the cpu only look at the lower 5/6 bits anyway?
2267 // Off, as masks are generated in expand rules where required. 2267 // PowerPC requires masked shift counts.
2268 // Constant shift counts are handled in Ideal phase. 2268 const bool Matcher::need_masked_shift_count = true;
2269 const bool Matcher::need_masked_shift_count = false;
2270 2269
2271 // This affects two different things: 2270 // This affects two different things:
2272 // - how Decode nodes are matched 2271 // - how Decode nodes are matched
2273 // - how ImplicitNullCheck opportunities are recognized 2272 // - how ImplicitNullCheck opportunities are recognized
2274 // If true, the matcher will try to remove all Decodes and match them 2273 // If true, the matcher will try to remove all Decodes and match them