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comparison src/cpu/sparc/vm/vm_version_sparc.cpp @ 3839:3d42f82cd811

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7063628: Use cbcond on T4 Summary: Add new short branch instruction to Hotspot sparc assembler. Reviewed-by: never, twisti, jrose
author kvn
date Thu, 21 Jul 2011 11:25:07 -0700
parents faa472957b38
children 95134e034042
comparison
equal deleted inserted replaced
3838:6a991dcb52bb 3839:3d42f82cd811
56 56
57 AllocatePrefetchDistance = allocate_prefetch_distance(); 57 AllocatePrefetchDistance = allocate_prefetch_distance();
58 AllocatePrefetchStyle = allocate_prefetch_style(); 58 AllocatePrefetchStyle = allocate_prefetch_style();
59 59
60 assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value"); 60 assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value");
61
62 if (AllocatePrefetchStyle == 3 && !has_blk_init()) {
63 warning("BIS instructions are not available on this CPU");
64 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1);
65 }
61 66
62 UseSSE = 0; // Only on x86 and x64 67 UseSSE = 0; // Only on x86 and x64
63 68
64 _supports_cx8 = has_v9(); 69 _supports_cx8 = has_v9();
65 70
114 // Use hardware population count instruction if available. 119 // Use hardware population count instruction if available.
115 if (has_hardware_popc()) { 120 if (has_hardware_popc()) {
116 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { 121 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
117 FLAG_SET_DEFAULT(UsePopCountInstruction, true); 122 FLAG_SET_DEFAULT(UsePopCountInstruction, true);
118 } 123 }
124 } else if (UsePopCountInstruction) {
125 warning("POPC instruction is not available on this CPU");
126 FLAG_SET_DEFAULT(UsePopCountInstruction, false);
127 }
128
129 // T4 and newer Sparc cpus have new compare and branch instruction.
130 if (has_cbcond()) {
131 if (FLAG_IS_DEFAULT(UseCBCond)) {
132 FLAG_SET_DEFAULT(UseCBCond, true);
133 }
134 } else if (UseCBCond) {
135 warning("CBCOND instruction is not available on this CPU");
136 FLAG_SET_DEFAULT(UseCBCond, false);
119 } 137 }
120 138
121 #ifdef COMPILER2 139 #ifdef COMPILER2
140 // T4 and newer Sparc cpus have fast RDPC.
141 if (has_fast_rdpc() && FLAG_IS_DEFAULT(UseRDPCForConstantTableBase)) {
142 // FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true);
143 }
144
122 // Currently not supported anywhere. 145 // Currently not supported anywhere.
123 FLAG_SET_DEFAULT(UseFPUForSpilling, false); 146 FLAG_SET_DEFAULT(UseFPUForSpilling, false);
124 #endif 147 #endif
125 148
126 char buf[512]; 149 char buf[512];
127 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 150 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
128 (has_v8() ? ", has_v8" : ""), 151 (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")),
129 (has_v9() ? ", has_v9" : ""),
130 (has_hardware_popc() ? ", popc" : ""), 152 (has_hardware_popc() ? ", popc" : ""),
131 (has_vis1() ? ", has_vis1" : ""), 153 (has_vis1() ? ", vis1" : ""),
132 (has_vis2() ? ", has_vis2" : ""), 154 (has_vis2() ? ", vis2" : ""),
133 (has_vis3() ? ", has_vis3" : ""), 155 (has_vis3() ? ", vis3" : ""),
134 (has_blk_init() ? ", has_blk_init" : ""), 156 (has_blk_init() ? ", blk_init" : ""),
135 (is_ultra3() ? ", is_ultra3" : ""), 157 (has_cbcond() ? ", cbcond" : ""),
136 (is_sun4v() ? ", is_sun4v" : ""), 158 (is_ultra3() ? ", ultra3" : ""),
137 (is_niagara() ? ", is_niagara" : ""), 159 (is_sun4v() ? ", sun4v" : ""),
138 (is_niagara_plus() ? ", is_niagara_plus" : ""), 160 (is_niagara_plus() ? ", niagara_plus" : (is_niagara() ? ", niagara" : "")),
139 (is_sparc64() ? ", is_sparc64" : ""), 161 (is_sparc64() ? ", sparc64" : ""),
140 (!has_hardware_mul32() ? ", no-mul32" : ""), 162 (!has_hardware_mul32() ? ", no-mul32" : ""),
141 (!has_hardware_div32() ? ", no-div32" : ""), 163 (!has_hardware_div32() ? ", no-div32" : ""),
142 (!has_hardware_fsmuld() ? ", no-fsmuld" : "")); 164 (!has_hardware_fsmuld() ? ", no-fsmuld" : ""));
143 165
144 // buf is started with ", " or is empty 166 // buf is started with ", " or is empty