Mercurial > hg > graal-jvmci-8
comparison src/cpu/sparc/vm/nativeInst_sparc.cpp @ 1748:3e8fbc61cee8
6978355: renaming for 6961697
Summary: This is the renaming part of 6961697 to keep the actual changes small for review.
Reviewed-by: kvn, never
author | twisti |
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date | Wed, 25 Aug 2010 05:27:54 -0700 |
parents | e9ff18c4ace7 |
children | f95d63e2154a |
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1747:53dbe853fb3a | 1748:3e8fbc61cee8 |
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191 | 191 |
192 VM_Version::allow_all(); | 192 VM_Version::allow_all(); |
193 | 193 |
194 a->call( a->pc(), relocInfo::none ); | 194 a->call( a->pc(), relocInfo::none ); |
195 a->delayed()->nop(); | 195 a->delayed()->nop(); |
196 nc = nativeCall_at( cb.code_begin() ); | 196 nc = nativeCall_at( cb.insts_begin() ); |
197 nc->print(); | 197 nc->print(); |
198 | 198 |
199 nc = nativeCall_overwriting_at( nc->next_instruction_address() ); | 199 nc = nativeCall_overwriting_at( nc->next_instruction_address() ); |
200 for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) { | 200 for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) { |
201 nc->set_destination( cb.code_begin() + offsets[idx] ); | 201 nc->set_destination( cb.insts_begin() + offsets[idx] ); |
202 assert(nc->destination() == (cb.code_begin() + offsets[idx]), "check unit test"); | 202 assert(nc->destination() == (cb.insts_begin() + offsets[idx]), "check unit test"); |
203 nc->print(); | 203 nc->print(); |
204 } | 204 } |
205 | 205 |
206 nc = nativeCall_before( cb.code_begin() + 8 ); | 206 nc = nativeCall_before( cb.insts_begin() + 8 ); |
207 nc->print(); | 207 nc->print(); |
208 | 208 |
209 VM_Version::revert(); | 209 VM_Version::revert(); |
210 #endif | 210 #endif |
211 } | 211 } |
366 a->add(I3, al1.low10(), I3); | 366 a->add(I3, al1.low10(), I3); |
367 AddressLiteral al2(0xccccdddd, relocInfo::external_word_type); | 367 AddressLiteral al2(0xccccdddd, relocInfo::external_word_type); |
368 a->sethi(al2, O2); | 368 a->sethi(al2, O2); |
369 a->add(O2, al2.low10(), O2); | 369 a->add(O2, al2.low10(), O2); |
370 | 370 |
371 nm = nativeMovConstReg_at( cb.code_begin() ); | 371 nm = nativeMovConstReg_at( cb.insts_begin() ); |
372 nm->print(); | 372 nm->print(); |
373 | 373 |
374 nm = nativeMovConstReg_at( nm->next_instruction_address() ); | 374 nm = nativeMovConstReg_at( nm->next_instruction_address() ); |
375 for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) { | 375 for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) { |
376 nm->set_data( offsets[idx] ); | 376 nm->set_data( offsets[idx] ); |
478 AddressLiteral al2(0xccccdddd, relocInfo::external_word_type); | 478 AddressLiteral al2(0xccccdddd, relocInfo::external_word_type); |
479 a->sethi(al2, O2); | 479 a->sethi(al2, O2); |
480 a->nop(); | 480 a->nop(); |
481 a->add(O2, al2.low10(), O2); | 481 a->add(O2, al2.low10(), O2); |
482 | 482 |
483 nm = nativeMovConstRegPatching_at( cb.code_begin() ); | 483 nm = nativeMovConstRegPatching_at( cb.insts_begin() ); |
484 nm->print(); | 484 nm->print(); |
485 | 485 |
486 nm = nativeMovConstRegPatching_at( nm->next_instruction_address() ); | 486 nm = nativeMovConstRegPatching_at( nm->next_instruction_address() ); |
487 for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) { | 487 for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) { |
488 nm->set_data( offsets[idx] ); | 488 nm->set_data( offsets[idx] ); |
614 a->std( G5, G4, I3 ); idx++; | 614 a->std( G5, G4, I3 ); idx++; |
615 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++; | 615 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++; |
616 a->sethi(al2, I3); a->add(I3, al2.low10(), I3); | 616 a->sethi(al2, I3); a->add(I3, al2.low10(), I3); |
617 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++; | 617 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++; |
618 | 618 |
619 nm = nativeMovRegMem_at( cb.code_begin() ); | 619 nm = nativeMovRegMem_at( cb.insts_begin() ); |
620 nm->print(); | 620 nm->print(); |
621 nm->set_offset( low10(0) ); | 621 nm->set_offset( low10(0) ); |
622 nm->print(); | 622 nm->print(); |
623 nm->add_offset_in_bytes( low10(0xbb) * wordSize ); | 623 nm->add_offset_in_bytes( low10(0xbb) * wordSize ); |
624 nm->print(); | 624 nm->print(); |
758 a->std( G5, G4, I3 ); idx++; | 758 a->std( G5, G4, I3 ); idx++; |
759 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++; | 759 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++; |
760 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3); | 760 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3); |
761 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++; | 761 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++; |
762 | 762 |
763 nm = nativeMovRegMemPatching_at( cb.code_begin() ); | 763 nm = nativeMovRegMemPatching_at( cb.insts_begin() ); |
764 nm->print(); | 764 nm->print(); |
765 nm->set_offset( low10(0) ); | 765 nm->set_offset( low10(0) ); |
766 nm->print(); | 766 nm->print(); |
767 nm->add_offset_in_bytes( low10(0xbb) * wordSize ); | 767 nm->add_offset_in_bytes( low10(0xbb) * wordSize ); |
768 nm->print(); | 768 nm->print(); |
847 a->delayed()->nop(); | 847 a->delayed()->nop(); |
848 a->sethi(al, I3); | 848 a->sethi(al, I3); |
849 a->jmpl(I3, al.low10(), L3, RelocationHolder::none); | 849 a->jmpl(I3, al.low10(), L3, RelocationHolder::none); |
850 a->delayed()->nop(); | 850 a->delayed()->nop(); |
851 | 851 |
852 nj = nativeJump_at( cb.code_begin() ); | 852 nj = nativeJump_at( cb.insts_begin() ); |
853 nj->print(); | 853 nj->print(); |
854 | 854 |
855 nj = nativeJump_at( nj->next_instruction_address() ); | 855 nj = nativeJump_at( nj->next_instruction_address() ); |
856 for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) { | 856 for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) { |
857 nj->set_jump_destination( nj->instruction_address() + offsets[idx] ); | 857 nj->set_jump_destination( nj->instruction_address() + offsets[idx] ); |