Mercurial > hg > graal-jvmci-8
comparison src/cpu/sparc/vm/vm_version_sparc.hpp @ 14909:4ca6dc0799b6
Backout jdk9 merge
author | Gilles Duboscq <duboscq@ssw.jku.at> |
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date | Tue, 01 Apr 2014 13:57:07 +0200 |
parents | 73b1030c6253 |
children | 2b7c005ae93a |
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14908:8db6e76cb658 | 14909:4ca6dc0799b6 |
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1 /* | 1 /* |
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. | 2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | 4 * |
5 * This code is free software; you can redistribute it and/or modify it | 5 * This code is free software; you can redistribute it and/or modify it |
6 * under the terms of the GNU General Public License version 2 only, as | 6 * under the terms of the GNU General Public License version 2 only, as |
7 * published by the Free Software Foundation. | 7 * published by the Free Software Foundation. |
46 vis3_instructions = 12, | 46 vis3_instructions = 12, |
47 cbcond_instructions = 13, | 47 cbcond_instructions = 13, |
48 sparc64_family = 14, | 48 sparc64_family = 14, |
49 M_family = 15, | 49 M_family = 15, |
50 T_family = 16, | 50 T_family = 16, |
51 T1_model = 17, | 51 T1_model = 17 |
52 sparc5_instructions = 18, | |
53 aes_instructions = 19 | |
54 }; | 52 }; |
55 | 53 |
56 enum Feature_Flag_Set { | 54 enum Feature_Flag_Set { |
57 unknown_m = 0, | 55 unknown_m = 0, |
58 all_features_m = -1, | 56 all_features_m = -1, |
73 cbcond_instructions_m = 1 << cbcond_instructions, | 71 cbcond_instructions_m = 1 << cbcond_instructions, |
74 sparc64_family_m = 1 << sparc64_family, | 72 sparc64_family_m = 1 << sparc64_family, |
75 M_family_m = 1 << M_family, | 73 M_family_m = 1 << M_family, |
76 T_family_m = 1 << T_family, | 74 T_family_m = 1 << T_family, |
77 T1_model_m = 1 << T1_model, | 75 T1_model_m = 1 << T1_model, |
78 sparc5_instructions_m = 1 << sparc5_instructions, | |
79 aes_instructions_m = 1 << aes_instructions, | |
80 | 76 |
81 generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m, | 77 generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m, |
82 generic_v9_m = generic_v8_m | v9_instructions_m, | 78 generic_v9_m = generic_v8_m | v9_instructions_m, |
83 ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m, | 79 ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m, |
84 | 80 |
125 static bool has_vis1() { return (_features & vis1_instructions_m) != 0; } | 121 static bool has_vis1() { return (_features & vis1_instructions_m) != 0; } |
126 static bool has_vis2() { return (_features & vis2_instructions_m) != 0; } | 122 static bool has_vis2() { return (_features & vis2_instructions_m) != 0; } |
127 static bool has_vis3() { return (_features & vis3_instructions_m) != 0; } | 123 static bool has_vis3() { return (_features & vis3_instructions_m) != 0; } |
128 static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; } | 124 static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; } |
129 static bool has_cbcond() { return (_features & cbcond_instructions_m) != 0; } | 125 static bool has_cbcond() { return (_features & cbcond_instructions_m) != 0; } |
130 static bool has_sparc5_instr() { return (_features & sparc5_instructions_m) != 0; } | |
131 static bool has_aes() { return (_features & aes_instructions_m) != 0; } | |
132 | 126 |
133 static bool supports_compare_and_exchange() | 127 static bool supports_compare_and_exchange() |
134 { return has_v9(); } | 128 { return has_v9(); } |
135 | 129 |
136 // Returns true if the platform is in the niagara line (T series) | 130 // Returns true if the platform is in the niagara line (T series) |
137 // and newer than the niagara1. | 131 // and newer than the niagara1. |
138 static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); } | 132 static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); } |
139 | 133 |
140 static bool is_M_series() { return is_M_family(_features); } | 134 static bool is_M_series() { return is_M_family(_features); } |
141 static bool is_T4() { return is_T_family(_features) && has_cbcond(); } | 135 static bool is_T4() { return is_T_family(_features) && has_cbcond(); } |
142 static bool is_T7() { return is_T_family(_features) && has_sparc5_instr(); } | |
143 | 136 |
144 // Fujitsu SPARC64 | 137 // Fujitsu SPARC64 |
145 static bool is_sparc64() { return (_features & sparc64_family_m) != 0; } | 138 static bool is_sparc64() { return (_features & sparc64_family_m) != 0; } |
146 | 139 |
147 static bool is_sun4v() { return (_features & sun4v_m) != 0; } | 140 static bool is_sun4v() { return (_features & sun4v_m) != 0; } |
157 static bool has_block_zeroing() { return has_blk_init() && is_T4(); } | 150 static bool has_block_zeroing() { return has_blk_init() && is_T4(); } |
158 | 151 |
159 static const char* cpu_features() { return _features_str; } | 152 static const char* cpu_features() { return _features_str; } |
160 | 153 |
161 static intx prefetch_data_size() { | 154 static intx prefetch_data_size() { |
162 return is_T4() && !is_T7() ? 32 : 64; // default prefetch block size on sparc | 155 return is_T4() ? 32 : 64; // default prefetch block size on sparc |
163 } | 156 } |
164 | 157 |
165 // Prefetch | 158 // Prefetch |
166 static intx prefetch_copy_interval_in_bytes() { | 159 static intx prefetch_copy_interval_in_bytes() { |
167 intx interval = PrefetchCopyIntervalInBytes; | 160 intx interval = PrefetchCopyIntervalInBytes; |