Mercurial > hg > graal-jvmci-8
comparison src/cpu/x86/vm/assembler_x86.cpp @ 622:56aae7be60d4
6812678: macro assembler needs delayed binding of a few constants (for 6655638)
Summary: minor assembler enhancements preparing for method handles
Reviewed-by: kvn
author | jrose |
---|---|
date | Wed, 04 Mar 2009 09:58:39 -0800 |
parents | 19962e74284f |
children | 9adddb8c0fc8 |
comparison
equal
deleted
inserted
replaced
621:19f25e603e7b | 622:56aae7be60d4 |
---|---|
6195 sarl(dst, 24); | 6195 sarl(dst, 24); |
6196 } | 6196 } |
6197 return off; | 6197 return off; |
6198 } | 6198 } |
6199 | 6199 |
6200 // word => int32 which seems bad for 64bit | 6200 // Note: load_signed_short used to be called load_signed_word. |
6201 int MacroAssembler::load_signed_word(Register dst, Address src) { | 6201 // Although the 'w' in x86 opcodes refers to the term "word" in the assembler |
6202 // manual, which means 16 bits, that usage is found nowhere in HotSpot code. | |
6203 // The term "word" in HotSpot means a 32- or 64-bit machine word. | |
6204 int MacroAssembler::load_signed_short(Register dst, Address src) { | |
6202 int off; | 6205 int off; |
6203 if (LP64_ONLY(true ||) VM_Version::is_P6()) { | 6206 if (LP64_ONLY(true ||) VM_Version::is_P6()) { |
6204 // This is dubious to me since it seems safe to do a signed 16 => 64 bit | 6207 // This is dubious to me since it seems safe to do a signed 16 => 64 bit |
6205 // version but this is what 64bit has always done. This seems to imply | 6208 // version but this is what 64bit has always done. This seems to imply |
6206 // that users are only using 32bits worth. | 6209 // that users are only using 32bits worth. |
6207 off = offset(); | 6210 off = offset(); |
6208 movswl(dst, src); // movsxw | 6211 movswl(dst, src); // movsxw |
6209 } else { | 6212 } else { |
6210 off = load_unsigned_word(dst, src); | 6213 off = load_unsigned_short(dst, src); |
6211 shll(dst, 16); | 6214 shll(dst, 16); |
6212 sarl(dst, 16); | 6215 sarl(dst, 16); |
6213 } | 6216 } |
6214 return off; | 6217 return off; |
6215 } | 6218 } |
6227 movb(dst, src); | 6230 movb(dst, src); |
6228 } | 6231 } |
6229 return off; | 6232 return off; |
6230 } | 6233 } |
6231 | 6234 |
6232 int MacroAssembler::load_unsigned_word(Register dst, Address src) { | 6235 // Note: load_unsigned_short used to be called load_unsigned_word. |
6236 int MacroAssembler::load_unsigned_short(Register dst, Address src) { | |
6233 // According to Intel Doc. AP-526, "Zero-Extension of Short", p.16, | 6237 // According to Intel Doc. AP-526, "Zero-Extension of Short", p.16, |
6234 // and "3.9 Partial Register Penalties", p. 22). | 6238 // and "3.9 Partial Register Penalties", p. 22). |
6235 int off; | 6239 int off; |
6236 if (LP64_ONLY(true ||) VM_Version::is_P6() || src.uses(dst)) { | 6240 if (LP64_ONLY(true ||) VM_Version::is_P6() || src.uses(dst)) { |
6237 off = offset(); | 6241 off = offset(); |
6240 xorl(dst, dst); | 6244 xorl(dst, dst); |
6241 off = offset(); | 6245 off = offset(); |
6242 movw(dst, src); | 6246 movw(dst, src); |
6243 } | 6247 } |
6244 return off; | 6248 return off; |
6249 } | |
6250 | |
6251 void MacroAssembler::load_sized_value(Register dst, Address src, | |
6252 int size_in_bytes, bool is_signed) { | |
6253 switch (size_in_bytes ^ (is_signed ? -1 : 0)) { | |
6254 #ifndef _LP64 | |
6255 // For case 8, caller is responsible for manually loading | |
6256 // the second word into another register. | |
6257 case ~8: // fall through: | |
6258 case 8: movl( dst, src ); break; | |
6259 #else | |
6260 case ~8: // fall through: | |
6261 case 8: movq( dst, src ); break; | |
6262 #endif | |
6263 case ~4: // fall through: | |
6264 case 4: movl( dst, src ); break; | |
6265 case ~2: load_signed_short( dst, src ); break; | |
6266 case 2: load_unsigned_short( dst, src ); break; | |
6267 case ~1: load_signed_byte( dst, src ); break; | |
6268 case 1: load_unsigned_byte( dst, src ); break; | |
6269 default: ShouldNotReachHere(); | |
6270 } | |
6245 } | 6271 } |
6246 | 6272 |
6247 void MacroAssembler::mov32(AddressLiteral dst, Register src) { | 6273 void MacroAssembler::mov32(AddressLiteral dst, Register src) { |
6248 if (reachable(dst)) { | 6274 if (reachable(dst)) { |
6249 movl(as_Address(dst), src); | 6275 movl(as_Address(dst), src); |
7093 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address())); | 7119 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address())); |
7094 call(rax); | 7120 call(rax); |
7095 } | 7121 } |
7096 | 7122 |
7097 | 7123 |
7124 RegisterConstant MacroAssembler::delayed_value(intptr_t* delayed_value_addr, | |
7125 Register tmp, | |
7126 int offset) { | |
7127 intptr_t value = *delayed_value_addr; | |
7128 if (value != 0) | |
7129 return RegisterConstant(value + offset); | |
7130 | |
7131 // load indirectly to solve generation ordering problem | |
7132 movptr(tmp, ExternalAddress((address) delayed_value_addr)); | |
7133 | |
7134 #ifdef ASSERT | |
7135 Label L; | |
7136 testl(tmp, tmp); | |
7137 jccb(Assembler::notZero, L); | |
7138 hlt(); | |
7139 bind(L); | |
7140 #endif | |
7141 | |
7142 if (offset != 0) | |
7143 addptr(tmp, offset); | |
7144 | |
7145 return RegisterConstant(tmp); | |
7146 } | |
7147 | |
7148 | |
7098 void MacroAssembler::verify_oop_addr(Address addr, const char* s) { | 7149 void MacroAssembler::verify_oop_addr(Address addr, const char* s) { |
7099 if (!VerifyOops) return; | 7150 if (!VerifyOops) return; |
7100 | 7151 |
7101 // Address adjust(addr.base(), addr.index(), addr.scale(), addr.disp() + BytesPerWord); | 7152 // Address adjust(addr.base(), addr.index(), addr.scale(), addr.disp() + BytesPerWord); |
7102 // Pass register number to verify_oop_subroutine | 7153 // Pass register number to verify_oop_subroutine |