Mercurial > hg > graal-jvmci-8
comparison src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp @ 1564:61b2245abf36
6930772: JSR 292 needs to support SPARC C1
Summary: C1 for SPARC needs to support JSR 292.
Reviewed-by: never, jrose
author | twisti |
---|---|
date | Fri, 21 May 2010 02:59:24 -0700 |
parents | 9f5b60a14736 |
children | e9ff18c4ace7 |
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1563:1a5913bf5e19 | 1564:61b2245abf36 |
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734 } | 734 } |
735 | 735 |
736 | 736 |
737 void LIR_Assembler::call(LIR_OpJavaCall* op, relocInfo::relocType rtype) { | 737 void LIR_Assembler::call(LIR_OpJavaCall* op, relocInfo::relocType rtype) { |
738 __ call(op->addr(), rtype); | 738 __ call(op->addr(), rtype); |
739 // the peephole pass fills the delay slot | 739 // The peephole pass fills the delay slot, add_call_info is done in |
740 // LIR_Assembler::emit_delay. | |
740 } | 741 } |
741 | 742 |
742 | 743 |
743 void LIR_Assembler::ic_call(LIR_OpJavaCall* op) { | 744 void LIR_Assembler::ic_call(LIR_OpJavaCall* op) { |
744 RelocationHolder rspec = virtual_call_Relocation::spec(pc()); | 745 RelocationHolder rspec = virtual_call_Relocation::spec(pc()); |
745 __ set_oop((jobject)Universe::non_oop_word(), G5_inline_cache_reg); | 746 __ set_oop((jobject)Universe::non_oop_word(), G5_inline_cache_reg); |
746 __ relocate(rspec); | 747 __ relocate(rspec); |
747 __ call(op->addr(), relocInfo::none); | 748 __ call(op->addr(), relocInfo::none); |
748 // the peephole pass fills the delay slot | 749 // The peephole pass fills the delay slot, add_call_info is done in |
750 // LIR_Assembler::emit_delay. | |
749 } | 751 } |
750 | 752 |
751 | 753 |
752 void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) { | 754 void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) { |
753 add_debug_info_for_null_check_here(op->info()); | 755 add_debug_info_for_null_check_here(op->info()); |
761 __ ld_ptr(G3_scratch, G5_method, G5_method); | 763 __ ld_ptr(G3_scratch, G5_method, G5_method); |
762 } | 764 } |
763 __ ld_ptr(G5_method, methodOopDesc::from_compiled_offset(), G3_scratch); | 765 __ ld_ptr(G5_method, methodOopDesc::from_compiled_offset(), G3_scratch); |
764 __ callr(G3_scratch, G0); | 766 __ callr(G3_scratch, G0); |
765 // the peephole pass fills the delay slot | 767 // the peephole pass fills the delay slot |
766 } | |
767 | |
768 | |
769 void LIR_Assembler::preserve_SP(LIR_OpJavaCall* op) { | |
770 Unimplemented(); | |
771 } | |
772 | |
773 | |
774 void LIR_Assembler::restore_SP(LIR_OpJavaCall* op) { | |
775 Unimplemented(); | |
776 } | 768 } |
777 | 769 |
778 | 770 |
779 // load with 32-bit displacement | 771 // load with 32-bit displacement |
780 int LIR_Assembler::load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo *info) { | 772 int LIR_Assembler::load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo *info) { |
2932 "only one instruction can go in a delay slot"); | 2924 "only one instruction can go in a delay slot"); |
2933 #endif | 2925 #endif |
2934 | 2926 |
2935 // we may also be emitting the call info for the instruction | 2927 // we may also be emitting the call info for the instruction |
2936 // which we are the delay slot of. | 2928 // which we are the delay slot of. |
2937 CodeEmitInfo * call_info = op->call_info(); | 2929 CodeEmitInfo* call_info = op->call_info(); |
2938 if (call_info) { | 2930 if (call_info) { |
2939 add_call_info(code_offset(), call_info); | 2931 add_call_info(code_offset(), call_info); |
2940 } | 2932 } |
2941 | 2933 |
2942 if (VerifyStackAtCalls) { | 2934 if (VerifyStackAtCalls) { |
3157 #ifndef PRODUCT | 3149 #ifndef PRODUCT |
3158 if (LIRTracePeephole) { | 3150 if (LIRTracePeephole) { |
3159 tty->print_cr("delayed"); | 3151 tty->print_cr("delayed"); |
3160 inst->at(i - 1)->print(); | 3152 inst->at(i - 1)->print(); |
3161 inst->at(i)->print(); | 3153 inst->at(i)->print(); |
3154 tty->cr(); | |
3162 } | 3155 } |
3163 #endif | 3156 #endif |
3164 continue; | 3157 continue; |
3165 } | 3158 } |
3166 } | 3159 } |
3172 break; | 3165 break; |
3173 } | 3166 } |
3174 case lir_static_call: | 3167 case lir_static_call: |
3175 case lir_virtual_call: | 3168 case lir_virtual_call: |
3176 case lir_icvirtual_call: | 3169 case lir_icvirtual_call: |
3177 case lir_optvirtual_call: { | 3170 case lir_optvirtual_call: |
3178 LIR_Op* delay_op = NULL; | 3171 case lir_dynamic_call: { |
3179 LIR_Op* prev = inst->at(i - 1); | 3172 LIR_Op* prev = inst->at(i - 1); |
3180 if (LIRFillDelaySlots && prev && prev->code() == lir_move && prev->info() == NULL && | 3173 if (LIRFillDelaySlots && prev && prev->code() == lir_move && prev->info() == NULL && |
3181 (op->code() != lir_virtual_call || | 3174 (op->code() != lir_virtual_call || |
3182 !prev->result_opr()->is_single_cpu() || | 3175 !prev->result_opr()->is_single_cpu() || |
3183 prev->result_opr()->as_register() != O0) && | 3176 prev->result_opr()->as_register() != O0) && |
3190 #ifndef PRODUCT | 3183 #ifndef PRODUCT |
3191 if (LIRTracePeephole) { | 3184 if (LIRTracePeephole) { |
3192 tty->print_cr("delayed"); | 3185 tty->print_cr("delayed"); |
3193 inst->at(i - 1)->print(); | 3186 inst->at(i - 1)->print(); |
3194 inst->at(i)->print(); | 3187 inst->at(i)->print(); |
3188 tty->cr(); | |
3195 } | 3189 } |
3196 #endif | 3190 #endif |
3197 continue; | 3191 continue; |
3198 } | 3192 } |
3199 | 3193 |
3200 if (!delay_op) { | 3194 LIR_Op* delay_op = new LIR_OpDelay(new LIR_Op0(lir_nop), op->as_OpJavaCall()->info()); |
3201 delay_op = new LIR_OpDelay(new LIR_Op0(lir_nop), op->as_OpJavaCall()->info()); | 3195 inst->insert_before(i + 1, delay_op); |
3202 inst->insert_before(i + 1, delay_op); | |
3203 } | |
3204 break; | 3196 break; |
3205 } | 3197 } |
3206 } | 3198 } |
3207 } | 3199 } |
3208 } | 3200 } |