Mercurial > hg > graal-jvmci-8
comparison graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java @ 16303:66c7e50a9a32
SPARCMove.java: Adding constant float and double loads
SPARCConstDataOp.java, SPARCLIRGenerator.java: Introducing CSTrings as constant value (Used for debugging)
SPARCHotSpotLIRGenerationResult.java, SPARCHotSpotBackend.java: Adapting to new LIR interface
SPARCAssembler.java: Introducing comments for some instructions
author | Stefan Anzinger <stefan.anzinger@gmail.com> |
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date | Sat, 19 Apr 2014 15:29:48 +0200 |
parents | 8db6e76cb658 |
children | 151fe6b1e511 |
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15250:4c68a0eb69ca | 16303:66c7e50a9a32 |
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35 */ | 35 */ |
36 public abstract class SPARCAssembler extends Assembler { | 36 public abstract class SPARCAssembler extends Assembler { |
37 | 37 |
38 /** | 38 /** |
39 * Constructs an assembler for the SPARC architecture. | 39 * Constructs an assembler for the SPARC architecture. |
40 * | 40 * |
41 * @param registerConfig the register configuration used to bind {@link Register#Frame} and | 41 * @param registerConfig the register configuration used to bind {@link Register#Frame} and |
42 * {@link Register#CallerFrame} to physical registers. This value can be null if this | 42 * {@link Register#CallerFrame} to physical registers. This value can be null if this |
43 * assembler instance will not be used to assemble instructions using these logical | 43 * assembler instance will not be used to assemble instructions using these logical |
44 * registers. | 44 * registers. |
45 */ | 45 */ |
48 } | 48 } |
49 | 49 |
50 // @formatter:off | 50 // @formatter:off |
51 /** | 51 /** |
52 * Instruction format for sethi. | 52 * Instruction format for sethi. |
53 * | 53 * |
54 * | 00 | rd | op2 | imm22 | | 54 * | 00 | rd | op2 | imm22 | |
55 * |31 30|29 25|24 22|21 0| | 55 * |31 30|29 25|24 22|21 0| |
56 */ | 56 */ |
57 // @formatter:on | 57 // @formatter:on |
58 public static class Fmt00a { | 58 public static class Fmt00a { |
121 } | 121 } |
122 | 122 |
123 // @formatter:off | 123 // @formatter:off |
124 /** | 124 /** |
125 * Instruction format for branches. | 125 * Instruction format for branches. |
126 * | 126 * |
127 * | 00 |a | cond | op2 | disp22 | | 127 * | 00 |a | cond | op2 | disp22 | |
128 * |31 30|29|28 25|24 22|21 0| | 128 * |31 30|29|28 25|24 22|21 0| |
129 */ | 129 */ |
130 // @formatter:on | 130 // @formatter:on |
131 public static class Fmt00b { | 131 public static class Fmt00b { |
140 } | 140 } |
141 | 141 |
142 // @formatter:off | 142 // @formatter:off |
143 /** | 143 /** |
144 * Instruction format for conditional branches. | 144 * Instruction format for conditional branches. |
145 * | 145 * |
146 * | 00 |a | cond | op2 |cc1|cc0|p | disp19 | | 146 * | 00 |a | cond | op2 |cc1|cc0|p | disp19 | |
147 * |31 30|29|28 25|24 22|21 |20 |19| 0| | 147 * |31 30|29|28 25|24 22|21 |20 |19| 0| |
148 */ | 148 */ |
149 // @formatter:on | 149 // @formatter:on |
150 public static class Fmt00c { | 150 public static class Fmt00c { |
328 } | 328 } |
329 | 329 |
330 // @formatter:off | 330 // @formatter:off |
331 /** | 331 /** |
332 * Instruction format for calls. | 332 * Instruction format for calls. |
333 * | 333 * |
334 * | 01 | disp30 | | 334 * | 01 | disp30 | |
335 * |31 30|29 0| | 335 * |31 30|29 0| |
336 */ | 336 */ |
337 // @formatter:on | 337 // @formatter:on |
338 public static class Fmt01 { | 338 public static class Fmt01 { |
455 } | 455 } |
456 | 456 |
457 // @formatter:off | 457 // @formatter:off |
458 /** | 458 /** |
459 * Instruction format for Arithmetic, Logical, Moves, Tcc, Prefetch, and Misc. | 459 * Instruction format for Arithmetic, Logical, Moves, Tcc, Prefetch, and Misc. |
460 * | 460 * |
461 * | 10 | rd | op3 | rs1 | i| imm_asi | rs2 | | 461 * | 10 | rd | op3 | rs1 | i| imm_asi | rs2 | |
462 * | 10 | rd | op3 | rs1 | i| simm13 | | 462 * | 10 | rd | op3 | rs1 | i| simm13 | |
463 * | 10 | rd | op3 | rs1 | i| x| | rs2 | | 463 * | 10 | rd | op3 | rs1 | i| x| | rs2 | |
464 * | 10 | rd | op3 | rs1 | i| x| | shcnt32 | | 464 * | 10 | rd | op3 | rs1 | i| x| | shcnt32 | |
465 * | 10 | rd | op3 | rs1 | i| x| | shcnt64 | | 465 * | 10 | rd | op3 | rs1 | i| x| | shcnt64 | |
592 } | 592 } |
593 | 593 |
594 // @formatter:off | 594 // @formatter:off |
595 /** | 595 /** |
596 * Instruction format for Loads, Stores and Misc. | 596 * Instruction format for Loads, Stores and Misc. |
597 * | 597 * |
598 * | 11 | rd | op3 | rs1 | i| imm_asi | rs2 | | 598 * | 11 | rd | op3 | rs1 | i| imm_asi | rs2 | |
599 * | 11 | rd | op3 | rs1 | i| simm13 | | 599 * | 11 | rd | op3 | rs1 | i| simm13 | |
600 * |31 30|29 25|24 19|18 14|13|12 5|4 0| | 600 * |31 30|29 25|24 19|18 14|13|12 5|4 0| |
601 */ | 601 */ |
602 // @formatter:on | 602 // @formatter:on |
747 } | 747 } |
748 | 748 |
749 // @formatter:off | 749 // @formatter:off |
750 /** | 750 /** |
751 * Instruction format for Movcc. | 751 * Instruction format for Movcc. |
752 * | 752 * |
753 * | 10 | rd | op3 |cc2| cond | i|cc1|cc0| - | rs2 | | 753 * | 10 | rd | op3 |cc2| cond | i|cc1|cc0| - | rs2 | |
754 * | 10 | rd | op3 |cc2| cond | i|cc1|cc0| simm11 | | 754 * | 10 | rd | op3 |cc2| cond | i|cc1|cc0| simm11 | |
755 * |31 30|29 25|24 19| 18|17 14|13| 12| 11|10 5|4 0| | 755 * |31 30|29 25|24 19| 18|17 14|13| 12| 11|10 5|4 0| |
756 */ | 756 */ |
757 // @formatter:on | 757 // @formatter:on |
1276 public String getOperator() { | 1276 public String getOperator() { |
1277 return operator; | 1277 return operator; |
1278 } | 1278 } |
1279 } | 1279 } |
1280 | 1280 |
1281 /** | |
1282 * Condition Codes to use for instruction | |
1283 */ | |
1281 public enum CC { | 1284 public enum CC { |
1282 // @formatter:off | 1285 // @formatter:off |
1283 | 1286 /** |
1287 * Condition is considered as 32bit operation condition | |
1288 */ | |
1284 Icc(0b00, "icc"), | 1289 Icc(0b00, "icc"), |
1290 /** | |
1291 * Condition is considered as 64bit operation condition | |
1292 */ | |
1285 Xcc(0b10, "xcc"), | 1293 Xcc(0b10, "xcc"), |
1286 Ptrcc(getHostWordKind() == Kind.Long ? Xcc.getValue() : Icc.getValue(), "ptrcc"), | 1294 Ptrcc(getHostWordKind() == Kind.Long ? Xcc.getValue() : Icc.getValue(), "ptrcc"), |
1287 Fcc0(0b00, "fcc0"), | 1295 Fcc0(0b00, "fcc0"), |
1288 Fcc1(0b01, "fcc1"), | 1296 Fcc1(0b01, "fcc1"), |
1289 Fcc2(0b10, "fcc2"), | 1297 Fcc2(0b10, "fcc2"), |
1400 public String getOperator() { | 1408 public String getOperator() { |
1401 return operator; | 1409 return operator; |
1402 } | 1410 } |
1403 } | 1411 } |
1404 | 1412 |
1413 /** | |
1414 * Represents the <b>Address Space Identifier</b> defined in the SPARC architec | |
1415 */ | |
1405 public enum Asi { | 1416 public enum Asi { |
1406 // @formatter:off | 1417 // @formatter:off |
1407 | 1418 |
1408 INVALID(-1), | 1419 INVALID(-1), |
1409 ASI_PRIMARY(0x80), | 1420 ASI_PRIMARY(0x80), |
1904 /* CRYPTO only */ | 1915 /* CRYPTO only */ |
1905 super(Ops.ArithOp, Op3s.Impdep1, Opfs.Crc32c, src1, src2, dst); | 1916 super(Ops.ArithOp, Op3s.Impdep1, Opfs.Crc32c, src1, src2, dst); |
1906 } | 1917 } |
1907 } | 1918 } |
1908 | 1919 |
1920 /** | |
1921 * Compare and Branch if Carry Clear ( Greater not C Than or Equal, Unsigned ) | |
1922 */ | |
1909 public static class Cwbcc extends Fmt00e { | 1923 public static class Cwbcc extends Fmt00e { |
1910 | 1924 |
1911 public Cwbcc(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 1925 public Cwbcc(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
1912 super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 1926 super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
1913 } | 1927 } |
1915 public Cwbcc(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 1929 public Cwbcc(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
1916 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 1930 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
1917 } | 1931 } |
1918 } | 1932 } |
1919 | 1933 |
1934 /** | |
1935 * Compare and Branch if Carry Set (Less Than, Unsigned) | |
1936 */ | |
1920 public static class Cwbcs extends Fmt00e { | 1937 public static class Cwbcs extends Fmt00e { |
1921 | 1938 |
1922 public Cwbcs(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 1939 public Cwbcs(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
1923 super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 1940 super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
1924 } | 1941 } |
1926 public Cwbcs(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 1943 public Cwbcs(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
1927 super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 1944 super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
1928 } | 1945 } |
1929 } | 1946 } |
1930 | 1947 |
1948 /** | |
1949 * Compare and Branch if Equal | |
1950 */ | |
1931 public static class Cwbe extends Fmt00e { | 1951 public static class Cwbe extends Fmt00e { |
1932 | 1952 |
1933 public Cwbe(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 1953 public Cwbe(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
1934 super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 1954 super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
1935 } | 1955 } |
1937 public Cwbe(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 1957 public Cwbe(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
1938 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 1958 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
1939 } | 1959 } |
1940 } | 1960 } |
1941 | 1961 |
1962 /** | |
1963 * Compare and Branch if Greater | |
1964 */ | |
1942 public static class Cwbg extends Fmt00e { | 1965 public static class Cwbg extends Fmt00e { |
1943 | 1966 |
1944 public Cwbg(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 1967 public Cwbg(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
1945 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 1968 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
1946 } | 1969 } |
1948 public Cwbg(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 1971 public Cwbg(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
1949 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 1972 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
1950 } | 1973 } |
1951 } | 1974 } |
1952 | 1975 |
1976 /** | |
1977 * Compare and Branch if Greater or Equal | |
1978 */ | |
1953 public static class Cwbge extends Fmt00e { | 1979 public static class Cwbge extends Fmt00e { |
1954 | 1980 |
1955 public Cwbge(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 1981 public Cwbge(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
1956 super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 1982 super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
1957 } | 1983 } |
1959 public Cwbge(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 1985 public Cwbge(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
1960 super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 1986 super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
1961 } | 1987 } |
1962 } | 1988 } |
1963 | 1989 |
1990 /** | |
1991 * Compare and Branch if Greater Unsigned | |
1992 */ | |
1964 public static class Cwbgu extends Fmt00e { | 1993 public static class Cwbgu extends Fmt00e { |
1965 | 1994 |
1966 public Cwbgu(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 1995 public Cwbgu(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
1967 super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 1996 super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
1968 } | 1997 } |
1970 public Cwbgu(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 1999 public Cwbgu(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
1971 super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 2000 super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
1972 } | 2001 } |
1973 } | 2002 } |
1974 | 2003 |
2004 /** | |
2005 * Compare and Branch if Less | |
2006 */ | |
1975 public static class Cwbl extends Fmt00e { | 2007 public static class Cwbl extends Fmt00e { |
1976 | 2008 |
1977 public Cwbl(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 2009 public Cwbl(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
1978 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 2010 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
1979 } | 2011 } |
1981 public Cwbl(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 2013 public Cwbl(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
1982 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 2014 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
1983 } | 2015 } |
1984 } | 2016 } |
1985 | 2017 |
2018 /** | |
2019 * Compare and Branch if Less or Equal | |
2020 */ | |
1986 public static class Cwble extends Fmt00e { | 2021 public static class Cwble extends Fmt00e { |
1987 | 2022 |
1988 public Cwble(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 2023 public Cwble(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
1989 super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 2024 super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
1990 } | 2025 } |
1992 public Cwble(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 2027 public Cwble(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
1993 super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 2028 super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
1994 } | 2029 } |
1995 } | 2030 } |
1996 | 2031 |
2032 /** | |
2033 * Compare and Branch if Less or Equal Unsigned | |
2034 */ | |
1997 public static class Cwbleu extends Fmt00e { | 2035 public static class Cwbleu extends Fmt00e { |
1998 | 2036 |
1999 public Cwbleu(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 2037 public Cwbleu(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
2000 super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 2038 super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
2001 } | 2039 } |
2003 public Cwbleu(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 2041 public Cwbleu(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
2004 super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 2042 super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
2005 } | 2043 } |
2006 } | 2044 } |
2007 | 2045 |
2046 /** | |
2047 * Compare and Branch if Not Equal | |
2048 */ | |
2008 public static class Cwbne extends Fmt00e { | 2049 public static class Cwbne extends Fmt00e { |
2009 | 2050 |
2010 public Cwbne(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 2051 public Cwbne(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
2011 super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 2052 super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
2012 } | 2053 } |
2014 public Cwbne(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 2055 public Cwbne(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
2015 super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 2056 super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
2016 } | 2057 } |
2017 } | 2058 } |
2018 | 2059 |
2060 /** | |
2061 * Compare and Branch if Negative | |
2062 */ | |
2019 public static class Cwbneg extends Fmt00e { | 2063 public static class Cwbneg extends Fmt00e { |
2020 | 2064 |
2021 public Cwbneg(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 2065 public Cwbneg(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
2022 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 2066 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
2023 } | 2067 } |
2025 public Cwbneg(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 2069 public Cwbneg(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
2026 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 2070 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
2027 } | 2071 } |
2028 } | 2072 } |
2029 | 2073 |
2074 /** | |
2075 * Compare and Branch if Positive | |
2076 */ | |
2030 public static class Cwbpos extends Fmt00e { | 2077 public static class Cwbpos extends Fmt00e { |
2031 | 2078 |
2032 public Cwbpos(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 2079 public Cwbpos(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
2033 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 2080 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
2034 } | 2081 } |
2036 public Cwbpos(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 2083 public Cwbpos(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
2037 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 2084 super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
2038 } | 2085 } |
2039 } | 2086 } |
2040 | 2087 |
2088 /** | |
2089 * Compare and Branch if Overflow Clear | |
2090 */ | |
2041 public static class Cwbvc extends Fmt00e { | 2091 public static class Cwbvc extends Fmt00e { |
2042 | 2092 |
2043 public Cwbvc(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 2093 public Cwbvc(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
2044 super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 2094 super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
2045 } | 2095 } |
2047 public Cwbvc(SPARCAssembler asm, Register src1, int immed5, int simm10) { | 2097 public Cwbvc(SPARCAssembler asm, Register src1, int immed5, int simm10) { |
2048 super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); | 2098 super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); |
2049 } | 2099 } |
2050 } | 2100 } |
2051 | 2101 |
2102 /** | |
2103 * Compare and Branch if Overflow Set | |
2104 */ | |
2052 public static class Cwbvs extends Fmt00e { | 2105 public static class Cwbvs extends Fmt00e { |
2053 | 2106 |
2054 public Cwbvs(SPARCAssembler asm, Register src1, Register src2, int simm10) { | 2107 public Cwbvs(SPARCAssembler asm, Register src1, Register src2, int simm10) { |
2055 super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 0, src1.encoding(), simm10, src2.encoding()); | 2108 super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 0, src1.encoding(), simm10, src2.encoding()); |
2056 } | 2109 } |
2338 public Fdivd(Register src1, Register src2, Register dst) { | 2391 public Fdivd(Register src1, Register src2, Register dst) { |
2339 super(Ops.ArithOp, Op3s.Fpop1, Opfs.Fdivd, src1, src2, dst); | 2392 super(Ops.ArithOp, Op3s.Fpop1, Opfs.Fdivd, src1, src2, dst); |
2340 } | 2393 } |
2341 } | 2394 } |
2342 | 2395 |
2396 /** | |
2397 * Floating-point multiply-add single (fused) | |
2398 */ | |
2343 public static class Fmadds extends Fmt5a { | 2399 public static class Fmadds extends Fmt5a { |
2344 | 2400 |
2345 public Fmadds(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { | 2401 public Fmadds(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { |
2346 super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmadds.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); | 2402 super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmadds.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); |
2347 } | 2403 } |
2348 } | 2404 } |
2349 | 2405 |
2406 /** | |
2407 * Floating-point multiply-add double (fused) | |
2408 */ | |
2350 public static class Fmaddd extends Fmt5a { | 2409 public static class Fmaddd extends Fmt5a { |
2351 | 2410 |
2352 public Fmaddd(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { | 2411 public Fmaddd(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { |
2353 super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmaddd.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); | 2412 super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmaddd.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); |
2354 } | 2413 } |
2355 } | 2414 } |
2356 | 2415 |
2416 /** | |
2417 * 16-bit partitioned average | |
2418 */ | |
2357 public static class Fmean16 extends Fmt3p { | 2419 public static class Fmean16 extends Fmt3p { |
2358 | 2420 |
2359 public Fmean16(Register src1, Register src2, Register dst) { | 2421 public Fmean16(Register src1, Register src2, Register dst) { |
2360 /* VIS3 only */ | 2422 /* VIS3 only */ |
2361 super(Ops.ArithOp, Op3s.Impdep1, Opfs.Fmean16, src1, src2, dst); | 2423 super(Ops.ArithOp, Op3s.Impdep1, Opfs.Fmean16, src1, src2, dst); |
2549 public Fstoi(SPARCAssembler masm, Register src2, Register dst) { | 2611 public Fstoi(SPARCAssembler masm, Register src2, Register dst) { |
2550 super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fstoi.getValue(), src2.encoding(), dst.encoding()); | 2612 super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fstoi.getValue(), src2.encoding(), dst.encoding()); |
2551 } | 2613 } |
2552 } | 2614 } |
2553 | 2615 |
2616 /** | |
2617 * Convert Double to 32-bit Integer | |
2618 */ | |
2554 public static class Fdtoi extends Fmt3n { | 2619 public static class Fdtoi extends Fmt3n { |
2555 | 2620 |
2556 public Fdtoi(SPARCAssembler masm, Register src2, Register dst) { | 2621 public Fdtoi(SPARCAssembler masm, Register src2, Register dst) { |
2557 super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fdtoi.getValue(), src2.encoding(), dst.encoding()); | 2622 super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fdtoi.getValue(), src2.encoding(), dst.encoding()); |
2558 } | 2623 } |
2559 } | 2624 } |
2560 | 2625 |
2626 /** | |
2627 * Flush register windows | |
2628 */ | |
2561 public static class Flushw extends Fmt10 { | 2629 public static class Flushw extends Fmt10 { |
2562 | 2630 |
2563 public Flushw() { | 2631 public Flushw() { |
2564 super(Op3s.Flushw); | 2632 super(Op3s.Flushw); |
2565 } | 2633 } |