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comparison src/cpu/ppc/vm/sharedRuntime_ppc.cpp @ 14445:67fa91961822

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8029940: PPC64 (part 122): C2 compiler port Reviewed-by: kvn
author goetz
date Wed, 11 Dec 2013 00:06:11 +0100
parents b0133e4187d3
children e5e8aa897002
comparison
equal deleted inserted replaced
14444:492e67693373 14445:67fa91961822
685 F11->as_VMReg(), 685 F11->as_VMReg(),
686 F12->as_VMReg(), 686 F12->as_VMReg(),
687 F13->as_VMReg() 687 F13->as_VMReg()
688 }; 688 };
689 689
690 const int num_iarg_registers = sizeof(iarg_reg) / sizeof(iarg_reg[0]);
691 const int num_farg_registers = sizeof(farg_reg) / sizeof(farg_reg[0]);
692
693 // The first 8 arguments are not passed on the stack.
694 const int num_args_in_regs = 8;
695 #define put_arg_in_reg(arg) ((arg) < num_args_in_regs)
696
697 // Check calling conventions consistency. 690 // Check calling conventions consistency.
698 assert(num_iarg_registers == num_args_in_regs 691 assert(sizeof(iarg_reg) / sizeof(iarg_reg[0]) == Argument::n_int_register_parameters_c &&
699 && num_iarg_registers == 8 692 sizeof(farg_reg) / sizeof(farg_reg[0]) == Argument::n_float_register_parameters_c,
700 && num_farg_registers == 13,
701 "consistency"); 693 "consistency");
702 694
703 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy 695 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy
704 // 2 such slots, like 64 bit values do. 696 // 2 such slots, like 64 bit values do.
705 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats 697 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats
706 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles 698 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
707 699
708 int ill_i = 0;
709 int ill_t = 0;
710 int i; 700 int i;
711 VMReg reg; 701 VMReg reg;
712 // Leave room for C-compatible ABI_112. 702 // Leave room for C-compatible ABI_112.
713 int stk = (frame::abi_112_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size; 703 int stk = (frame::abi_112_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size;
714 int arg = 0; 704 int arg = 0;
724 for (int i = 0; i < total_args_passed; ++i, ++arg) { 714 for (int i = 0; i < total_args_passed; ++i, ++arg) {
725 // Initialize regs2 to BAD. 715 // Initialize regs2 to BAD.
726 if (regs2 != NULL) regs2[i].set_bad(); 716 if (regs2 != NULL) regs2[i].set_bad();
727 717
728 switch(sig_bt[i]) { 718 switch(sig_bt[i]) {
719
720 //
721 // If arguments 0-7 are integers, they are passed in integer registers.
722 // Argument i is placed in iarg_reg[i].
723 //
729 case T_BOOLEAN: 724 case T_BOOLEAN:
730 case T_CHAR: 725 case T_CHAR:
731 case T_BYTE: 726 case T_BYTE:
732 case T_SHORT: 727 case T_SHORT:
733 case T_INT: 728 case T_INT:
752 case T_OBJECT: 747 case T_OBJECT:
753 case T_ARRAY: 748 case T_ARRAY:
754 case T_ADDRESS: 749 case T_ADDRESS:
755 case T_METADATA: 750 case T_METADATA:
756 // Oops are already boxed if required (JNI). 751 // Oops are already boxed if required (JNI).
757 if (put_arg_in_reg(arg)) { 752 if (arg < Argument::n_int_register_parameters_c) {
758 reg = iarg_reg[arg]; 753 reg = iarg_reg[arg];
759 } else { 754 } else {
760 reg = VMRegImpl::stack2reg(stk); 755 reg = VMRegImpl::stack2reg(stk);
761 stk += inc_stk_for_longdouble; 756 stk += inc_stk_for_longdouble;
762 } 757 }
763 regs[i].set2(reg); 758 regs[i].set2(reg);
764 break; 759 break;
760
761 //
762 // Floats are treated differently from int regs: The first 13 float arguments
763 // are passed in registers (not the float args among the first 13 args).
764 // Thus argument i is NOT passed in farg_reg[i] if it is float. It is passed
765 // in farg_reg[j] if argument i is the j-th float argument of this call.
766 //
765 case T_FLOAT: 767 case T_FLOAT:
766 if (put_arg_in_reg(arg)) { 768 if (freg < Argument::n_float_register_parameters_c) {
769 // Put float in register ...
767 reg = farg_reg[freg]; 770 reg = farg_reg[freg];
771 ++freg;
772
773 // Argument i for i > 8 is placed on the stack even if it's
774 // placed in a register (if it's a float arg). Aix disassembly
775 // shows that xlC places these float args on the stack AND in
776 // a register. This is not documented, but we follow this
777 // convention, too.
778 if (arg >= Argument::n_regs_not_on_stack_c) {
779 // ... and on the stack.
780 guarantee(regs2 != NULL, "must pass float in register and stack slot");
781 VMReg reg2 = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
782 regs2[i].set1(reg2);
783 stk += inc_stk_for_intfloat;
784 }
785
768 } else { 786 } else {
769 // Put float on stack 787 // Put float on stack.
770 # if defined(LINUX) 788 reg = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
771 reg = VMRegImpl::stack2reg(stk+1);
772 # elif defined(AIX)
773 reg = VMRegImpl::stack2reg(stk);
774 # else
775 # error "unknown OS"
776 # endif
777 stk += inc_stk_for_intfloat; 789 stk += inc_stk_for_intfloat;
778 } 790 }
779
780 if (freg < num_farg_registers) {
781 // There are still some float argument registers left. Put the
782 // float in a register if not already done.
783 if (reg != farg_reg[freg]) {
784 guarantee(regs2 != NULL, "must pass float in register and stack slot");
785 VMReg reg2 = farg_reg[freg];
786 regs2[i].set1(reg2);
787 }
788 ++freg;
789 }
790
791 regs[i].set1(reg); 791 regs[i].set1(reg);
792 break; 792 break;
793 case T_DOUBLE: 793 case T_DOUBLE:
794 assert(sig_bt[i+1] == T_VOID, "expecting half"); 794 assert(sig_bt[i+1] == T_VOID, "expecting half");
795 if (put_arg_in_reg(arg)) { 795 if (freg < Argument::n_float_register_parameters_c) {
796 // Put double in register ...
796 reg = farg_reg[freg]; 797 reg = farg_reg[freg];
798 ++freg;
799
800 // Argument i for i > 8 is placed on the stack even if it's
801 // placed in a register (if it's a double arg). Aix disassembly
802 // shows that xlC places these float args on the stack AND in
803 // a register. This is not documented, but we follow this
804 // convention, too.
805 if (arg >= Argument::n_regs_not_on_stack_c) {
806 // ... and on the stack.
807 guarantee(regs2 != NULL, "must pass float in register and stack slot");
808 VMReg reg2 = VMRegImpl::stack2reg(stk);
809 regs2[i].set2(reg2);
810 stk += inc_stk_for_longdouble;
811 }
797 } else { 812 } else {
798 // Put double on stack. 813 // Put double on stack.
799 reg = VMRegImpl::stack2reg(stk); 814 reg = VMRegImpl::stack2reg(stk);
800 stk += inc_stk_for_longdouble; 815 stk += inc_stk_for_longdouble;
801 } 816 }
802
803 if (freg < num_farg_registers) {
804 // There are still some float argument registers left. Put the
805 // float in a register if not already done.
806 if (reg != farg_reg[freg]) {
807 guarantee(regs2 != NULL, "must pass float in register and stack slot");
808 VMReg reg2 = farg_reg[freg];
809 regs2[i].set2(reg2);
810 }
811 ++freg;
812 }
813
814 regs[i].set2(reg); 817 regs[i].set2(reg);
815 break; 818 break;
819
816 case T_VOID: 820 case T_VOID:
817 // Do not count halves. 821 // Do not count halves.
818 regs[i].set_bad(); 822 regs[i].set_bad();
819 --arg; 823 --arg;
820 break; 824 break;
875 __ ld(return_pc, _abi(lr), R1_SP); 879 __ ld(return_pc, _abi(lr), R1_SP);
876 __ ld(ientry, method_(interpreter_entry)); // preloaded 880 __ ld(ientry, method_(interpreter_entry)); // preloaded
877 __ mtlr(return_pc); 881 __ mtlr(return_pc);
878 882
879 883
880 // call the interpreter 884 // Call the interpreter.
881 __ BIND(call_interpreter); 885 __ BIND(call_interpreter);
882 __ mtctr(ientry); 886 __ mtctr(ientry);
883 887
884 // Get a copy of the current SP for loading caller's arguments. 888 // Get a copy of the current SP for loading caller's arguments.
885 __ mr(sender_SP, R1_SP); 889 __ mr(sender_SP, R1_SP);
945 } 949 }
946 } 950 }
947 951
948 // Jump to the interpreter just as if interpreter was doing it. 952 // Jump to the interpreter just as if interpreter was doing it.
949 953
954 #ifdef CC_INTERP
955 const Register tos = R17_tos;
956 #endif
957
950 // load TOS 958 // load TOS
951 __ addi(R17_tos, R1_SP, st_off); 959 __ addi(tos, R1_SP, st_off);
952 960
953 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1. 961 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
954 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register"); 962 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
955 __ bctr(); 963 __ bctr();
956 964
980 // we must align the stack to 16 bytes on an i2c entry else we 988 // we must align the stack to 16 bytes on an i2c entry else we
981 // lose alignment we expect in all compiled code and register 989 // lose alignment we expect in all compiled code and register
982 // save code can segv when fxsave instructions find improperly 990 // save code can segv when fxsave instructions find improperly
983 // aligned stack pointer. 991 // aligned stack pointer.
984 992
993 #ifdef CC_INTERP
985 const Register ld_ptr = R17_tos; 994 const Register ld_ptr = R17_tos;
995 #endif
986 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 }; 996 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 };
987 const int num_value_regs = sizeof(value_regs) / sizeof(Register); 997 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
988 int value_regs_index = 0; 998 int value_regs_index = 0;
989 999
990 int ld_offset = total_args_passed*wordSize; 1000 int ld_offset = total_args_passed*wordSize;
1135 Label valid; 1145 Label valid;
1136 __ cmpdi(CCR0, R3_ARG1, 0); 1146 __ cmpdi(CCR0, R3_ARG1, 0);
1137 __ bne_predict_taken(CCR0, valid); 1147 __ bne_predict_taken(CCR0, valid);
1138 // We have a null argument, branch to ic_miss_stub. 1148 // We have a null argument, branch to ic_miss_stub.
1139 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), 1149 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1140 relocInfo::runtime_call_type); 1150 relocInfo::runtime_call_type);
1141 __ BIND(valid); 1151 __ BIND(valid);
1142 } 1152 }
1143 } 1153 }
1144 // Assume argument is not NULL, load klass from receiver. 1154 // Assume argument is not NULL, load klass from receiver.
1145 __ load_klass(receiver_klass, R3_ARG1); 1155 __ load_klass(receiver_klass, R3_ARG1);
1152 Label valid; 1162 Label valid;
1153 __ cmpd(CCR0, receiver_klass, ic_klass); 1163 __ cmpd(CCR0, receiver_klass, ic_klass);
1154 __ beq_predict_taken(CCR0, valid); 1164 __ beq_predict_taken(CCR0, valid);
1155 // We have an unexpected klass, branch to ic_miss_stub. 1165 // We have an unexpected klass, branch to ic_miss_stub.
1156 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), 1166 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1157 relocInfo::runtime_call_type); 1167 relocInfo::runtime_call_type);
1158 __ BIND(valid); 1168 __ BIND(valid);
1159 } 1169 }
1160 1170
1161 // Argument is valid and klass is as expected, continue. 1171 // Argument is valid and klass is as expected, continue.
1162 1172
1168 __ cmpdi(CCR0, code, 0); 1178 __ cmpdi(CCR0, code, 0);
1169 __ ld(ientry, method_(interpreter_entry)); // preloaded 1179 __ ld(ientry, method_(interpreter_entry)); // preloaded
1170 __ beq_predict_taken(CCR0, call_interpreter); 1180 __ beq_predict_taken(CCR0, call_interpreter);
1171 1181
1172 // Branch to ic_miss_stub. 1182 // Branch to ic_miss_stub.
1173 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), 1183 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
1174 relocInfo::runtime_call_type);
1175 1184
1176 // entry: c2i 1185 // entry: c2i
1177 1186
1178 c2i_entry = gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry); 1187 c2i_entry = gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry);
1179 1188
2592 2601
2593 __ ld(pc_reg, 0, pcs_reg); 2602 __ ld(pc_reg, 0, pcs_reg);
2594 __ ld(frame_size_reg, 0, frame_sizes_reg); 2603 __ ld(frame_size_reg, 0, frame_sizes_reg);
2595 __ std(pc_reg, _abi(lr), R1_SP); 2604 __ std(pc_reg, _abi(lr), R1_SP);
2596 __ push_frame(frame_size_reg, R0/*tmp*/); 2605 __ push_frame(frame_size_reg, R0/*tmp*/);
2606 #ifdef CC_INTERP
2597 __ std(R1_SP, _parent_ijava_frame_abi(initial_caller_sp), R1_SP); 2607 __ std(R1_SP, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2608 #else
2609 Unimplemented();
2610 #endif
2598 __ addi(number_of_frames_reg, number_of_frames_reg, -1); 2611 __ addi(number_of_frames_reg, number_of_frames_reg, -1);
2599 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize); 2612 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize);
2600 __ addi(pcs_reg, pcs_reg, wordSize); 2613 __ addi(pcs_reg, pcs_reg, wordSize);
2601 } 2614 }
2602 2615
2691 // Get the return address pointing into the frame manager. 2704 // Get the return address pointing into the frame manager.
2692 __ ld(R0, 0, pcs_reg); 2705 __ ld(R0, 0, pcs_reg);
2693 // Store it in the top interpreter frame. 2706 // Store it in the top interpreter frame.
2694 __ std(R0, _abi(lr), R1_SP); 2707 __ std(R0, _abi(lr), R1_SP);
2695 // Initialize frame_manager_lr of interpreter top frame. 2708 // Initialize frame_manager_lr of interpreter top frame.
2709 #ifdef CC_INTERP
2696 __ std(R0, _top_ijava_frame_abi(frame_manager_lr), R1_SP); 2710 __ std(R0, _top_ijava_frame_abi(frame_manager_lr), R1_SP);
2711 #endif
2697 } 2712 }
2698 #endif 2713 #endif
2699 2714
2700 void SharedRuntime::generate_deopt_blob() { 2715 void SharedRuntime::generate_deopt_blob() {
2701 // Allocate space for the code 2716 // Allocate space for the code
2884 // stack: (top interpreter frame, ..., optional interpreter frame, 2899 // stack: (top interpreter frame, ..., optional interpreter frame,
2885 // optional c2i, caller of deoptee, ...). 2900 // optional c2i, caller of deoptee, ...).
2886 2901
2887 // Initialize R14_state. 2902 // Initialize R14_state.
2888 __ ld(R14_state, 0, R1_SP); 2903 __ ld(R14_state, 0, R1_SP);
2889 __ addi(R14_state, R14_state, 2904 __ addi(R14_state, R14_state, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
2890 -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
2891 // Also inititialize R15_prev_state. 2905 // Also inititialize R15_prev_state.
2892 __ restore_prev_state(); 2906 __ restore_prev_state();
2893 2907
2894 // Return to the interpreter entry point. 2908 // Return to the interpreter entry point.
2895 __ blr(); 2909 __ blr();
3008 // stack: (top interpreter frame, ..., optional interpreter frame, 3022 // stack: (top interpreter frame, ..., optional interpreter frame,
3009 // optional c2i, caller of deoptee, ...). 3023 // optional c2i, caller of deoptee, ...).
3010 3024
3011 // Initialize R14_state, ... 3025 // Initialize R14_state, ...
3012 __ ld(R11_scratch1, 0, R1_SP); 3026 __ ld(R11_scratch1, 0, R1_SP);
3013 __ addi(R14_state, R11_scratch1, 3027 __ addi(R14_state, R11_scratch1, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
3014 -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
3015 // also initialize R15_prev_state. 3028 // also initialize R15_prev_state.
3016 __ restore_prev_state(); 3029 __ restore_prev_state();
3017 // Return to the interpreter entry point. 3030 // Return to the interpreter entry point.
3018 __ blr(); 3031 __ blr();
3019 3032