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comparison src/cpu/sparc/vm/jniFastGetField_sparc.cpp @ 727:6b2273dd6fa9

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6822110: Add AddressLiteral class on SPARC Summary: The Address class on SPARC currently handles both, addresses and address literals, what makes the Address class more complicated than it has to be. Reviewed-by: never, kvn
author twisti
date Tue, 21 Apr 2009 11:16:30 -0700
parents a61af66fc99e
children c18cbe5936b8
comparison
equal deleted inserted replaced
725:928912ce8438 727:6b2273dd6fa9
1 /* 1 /*
2 * Copyright 2004-2006 Sun Microsystems, Inc. All Rights Reserved. 2 * Copyright 2004-2009 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
55 CodeBuffer cbuf(fast_entry, b->instructions_size()); 55 CodeBuffer cbuf(fast_entry, b->instructions_size());
56 MacroAssembler* masm = new MacroAssembler(&cbuf); 56 MacroAssembler* masm = new MacroAssembler(&cbuf);
57 57
58 Label label1, label2; 58 Label label1, label2;
59 59
60 address cnt_addr = SafepointSynchronize::safepoint_counter_addr(); 60 AddressLiteral cnt_addrlit(SafepointSynchronize::safepoint_counter_addr());
61 Address ca(O3, cnt_addr); 61 __ sethi (cnt_addrlit, O3);
62 __ sethi (ca); 62 Address cnt_addr(O3, cnt_addrlit.low10());
63 __ ld (ca, G4); 63 __ ld (cnt_addr, G4);
64 __ andcc (G4, 1, G0); 64 __ andcc (G4, 1, G0);
65 __ br (Assembler::notZero, false, Assembler::pn, label1); 65 __ br (Assembler::notZero, false, Assembler::pn, label1);
66 __ delayed()->srl (O2, 2, O4); 66 __ delayed()->srl (O2, 2, O4);
67 __ ld_ptr (O1, 0, O5); 67 __ ld_ptr (O1, 0, O5);
68 68
75 case T_SHORT: __ ldsh (O5, O4, G3); break; 75 case T_SHORT: __ ldsh (O5, O4, G3); break;
76 case T_INT: __ ld (O5, O4, G3); break; 76 case T_INT: __ ld (O5, O4, G3); break;
77 default: ShouldNotReachHere(); 77 default: ShouldNotReachHere();
78 } 78 }
79 79
80 __ ld (ca, O5); 80 __ ld (cnt_addr, O5);
81 __ cmp (O5, G4); 81 __ cmp (O5, G4);
82 __ br (Assembler::notEqual, false, Assembler::pn, label2); 82 __ br (Assembler::notEqual, false, Assembler::pn, label2);
83 __ delayed()->mov (O7, G1); 83 __ delayed()->mov (O7, G1);
84 __ retl (); 84 __ retl ();
85 __ delayed()->mov (G3, O0); 85 __ delayed()->mov (G3, O0);
134 CodeBuffer cbuf(fast_entry, b->instructions_size()); 134 CodeBuffer cbuf(fast_entry, b->instructions_size());
135 MacroAssembler* masm = new MacroAssembler(&cbuf); 135 MacroAssembler* masm = new MacroAssembler(&cbuf);
136 136
137 Label label1, label2; 137 Label label1, label2;
138 138
139 address cnt_addr = SafepointSynchronize::safepoint_counter_addr(); 139 AddressLiteral cnt_addrlit(SafepointSynchronize::safepoint_counter_addr());
140 Address ca(G3, cnt_addr); 140 __ sethi (cnt_addrlit, G3);
141 __ sethi (ca); 141 Address cnt_addr(G3, cnt_addrlit.low10());
142 __ ld (ca, G4); 142 __ ld (cnt_addr, G4);
143 __ andcc (G4, 1, G0); 143 __ andcc (G4, 1, G0);
144 __ br (Assembler::notZero, false, Assembler::pn, label1); 144 __ br (Assembler::notZero, false, Assembler::pn, label1);
145 __ delayed()->srl (O2, 2, O4); 145 __ delayed()->srl (O2, 2, O4);
146 __ ld_ptr (O1, 0, O5); 146 __ ld_ptr (O1, 0, O5);
147 __ add (O5, O4, O5); 147 __ add (O5, O4, O5);
157 assert(count < LIST_CAPACITY, "LIST_CAPACITY too small"); 157 assert(count < LIST_CAPACITY, "LIST_CAPACITY too small");
158 speculative_load_pclist[count] = __ pc(); 158 speculative_load_pclist[count] = __ pc();
159 __ ldx (O5, 0, O3); 159 __ ldx (O5, 0, O3);
160 #endif 160 #endif
161 161
162 __ ld (ca, G1); 162 __ ld (cnt_addr, G1);
163 __ cmp (G1, G4); 163 __ cmp (G1, G4);
164 __ br (Assembler::notEqual, false, Assembler::pn, label2); 164 __ br (Assembler::notEqual, false, Assembler::pn, label2);
165 __ delayed()->mov (O7, G1); 165 __ delayed()->mov (O7, G1);
166 166
167 #ifndef _LP64 167 #ifndef _LP64
206 CodeBuffer cbuf(fast_entry, b->instructions_size()); 206 CodeBuffer cbuf(fast_entry, b->instructions_size());
207 MacroAssembler* masm = new MacroAssembler(&cbuf); 207 MacroAssembler* masm = new MacroAssembler(&cbuf);
208 208
209 Label label1, label2; 209 Label label1, label2;
210 210
211 address cnt_addr = SafepointSynchronize::safepoint_counter_addr(); 211 AddressLiteral cnt_addrlit(SafepointSynchronize::safepoint_counter_addr());
212 Address ca(O3, cnt_addr); 212 __ sethi (cnt_addrlit, O3);
213 __ sethi (ca); 213 Address cnt_addr(O3, cnt_addrlit.low10());
214 __ ld (ca, G4); 214 __ ld (cnt_addr, G4);
215 __ andcc (G4, 1, G0); 215 __ andcc (G4, 1, G0);
216 __ br (Assembler::notZero, false, Assembler::pn, label1); 216 __ br (Assembler::notZero, false, Assembler::pn, label1);
217 __ delayed()->srl (O2, 2, O4); 217 __ delayed()->srl (O2, 2, O4);
218 __ ld_ptr (O1, 0, O5); 218 __ ld_ptr (O1, 0, O5);
219 219
223 case T_FLOAT: __ ldf (FloatRegisterImpl::S, O5, O4, F0); break; 223 case T_FLOAT: __ ldf (FloatRegisterImpl::S, O5, O4, F0); break;
224 case T_DOUBLE: __ ldf (FloatRegisterImpl::D, O5, O4, F0); break; 224 case T_DOUBLE: __ ldf (FloatRegisterImpl::D, O5, O4, F0); break;
225 default: ShouldNotReachHere(); 225 default: ShouldNotReachHere();
226 } 226 }
227 227
228 __ ld (ca, O5); 228 __ ld (cnt_addr, O5);
229 __ cmp (O5, G4); 229 __ cmp (O5, G4);
230 __ br (Assembler::notEqual, false, Assembler::pn, label2); 230 __ br (Assembler::notEqual, false, Assembler::pn, label2);
231 __ delayed()->mov (O7, G1); 231 __ delayed()->mov (O7, G1);
232 232
233 __ retl (); 233 __ retl ();