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comparison src/cpu/sparc/vm/nativeInst_sparc.cpp @ 727:6b2273dd6fa9

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6822110: Add AddressLiteral class on SPARC Summary: The Address class on SPARC currently handles both, addresses and address literals, what makes the Address class more complicated than it has to be. Reviewed-by: never, kvn
author twisti
date Tue, 21 Apr 2009 11:16:30 -0700
parents d1605aabd0a1
children c18cbe5936b8 1a5913bf5e19
comparison
equal deleted inserted replaced
725:928912ce8438 727:6b2273dd6fa9
1 /* 1 /*
2 * Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved. 2 * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
36 MacroAssembler* _masm = new MacroAssembler(&buf); 36 MacroAssembler* _masm = new MacroAssembler(&buf);
37 Register destreg; 37 Register destreg;
38 38
39 destreg = inv_rd(*(unsigned int *)instaddr); 39 destreg = inv_rd(*(unsigned int *)instaddr);
40 // Generate a the new sequence 40 // Generate a the new sequence
41 Address dest( destreg, (address)x ); 41 _masm->patchable_sethi(x, destreg);
42 _masm->sethi( dest, true );
43 ICache::invalidate_range(instaddr, 7 * BytesPerInstWord); 42 ICache::invalidate_range(instaddr, 7 * BytesPerInstWord);
44 } 43 }
45 44
46 void NativeInstruction::verify() { 45 void NativeInstruction::verify() {
47 // make sure code pattern is actually an instruction address 46 // make sure code pattern is actually an instruction address
225 } 224 }
226 ResourceMark rm; 225 ResourceMark rm;
227 CodeBuffer buf(addr_at(0), instruction_size + 1); 226 CodeBuffer buf(addr_at(0), instruction_size + 1);
228 MacroAssembler* _masm = new MacroAssembler(&buf); 227 MacroAssembler* _masm = new MacroAssembler(&buf);
229 // Generate the new sequence 228 // Generate the new sequence
230 Address(O7, dest); 229 AddressLiteral(dest);
231 _masm->jumpl_to(dest, O7); 230 _masm->jumpl_to(dest, O7, O7);
232 ICache::invalidate_range(addr_at(0), instruction_size ); 231 ICache::invalidate_range(addr_at(0), instruction_size );
233 #endif 232 #endif
234 } 233 }
235 234
236 void NativeFarCall::verify() { 235 void NativeFarCall::verify() {
359 4097, 358 4097,
360 }; 359 };
361 360
362 VM_Version::allow_all(); 361 VM_Version::allow_all();
363 362
364 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); 363 AddressLiteral al1(0xaaaabbbb, relocInfo::external_word_type);
365 a->add(I3, low10(0xaaaabbbb), I3); 364 a->sethi(al1, I3);
366 a->sethi(0xccccdddd, O2, true, RelocationHolder::none); 365 a->add(I3, al1.low10(), I3);
367 a->add(O2, low10(0xccccdddd), O2); 366 AddressLiteral al2(0xccccdddd, relocInfo::external_word_type);
367 a->sethi(al2, O2);
368 a->add(O2, al2.low10(), O2);
368 369
369 nm = nativeMovConstReg_at( cb.code_begin() ); 370 nm = nativeMovConstReg_at( cb.code_begin() );
370 nm->print(); 371 nm->print();
371 372
372 nm = nativeMovConstReg_at( nm->next_instruction_address() ); 373 nm = nativeMovConstReg_at( nm->next_instruction_address() );
466 4097, 467 4097,
467 }; 468 };
468 469
469 VM_Version::allow_all(); 470 VM_Version::allow_all();
470 471
471 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); 472 AddressLiteral al1(0xaaaabbbb, relocInfo::external_word_type);
473 a->sethi(al1, I3);
472 a->nop(); 474 a->nop();
473 a->add(I3, low10(0xaaaabbbb), I3); 475 a->add(I3, al1.low10(), I3);
474 a->sethi(0xccccdddd, O2, true, RelocationHolder::none); 476 AddressLiteral al2(0xccccdddd, relocInfo::external_word_type);
477 a->sethi(al2, O2);
475 a->nop(); 478 a->nop();
476 a->add(O2, low10(0xccccdddd), O2); 479 a->add(O2, al2.low10(), O2);
477 480
478 nm = nativeMovConstRegPatching_at( cb.code_begin() ); 481 nm = nativeMovConstRegPatching_at( cb.code_begin() );
479 nm->print(); 482 nm->print();
480 483
481 nm = nativeMovConstRegPatching_at( nm->next_instruction_address() ); 484 nm = nativeMovConstRegPatching_at( nm->next_instruction_address() );
560 0x4000, 563 0x4000,
561 }; 564 };
562 565
563 VM_Version::allow_all(); 566 VM_Version::allow_all();
564 567
565 a->ldsw( G5, low10(0xffffffff), G4 ); idx++; 568 AddressLiteral al1(0xffffffff, relocInfo::external_word_type);
566 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 569 AddressLiteral al2(0xaaaabbbb, relocInfo::external_word_type);
570 a->ldsw( G5, al1.low10(), G4 ); idx++;
571 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
567 a->ldsw( G5, I3, G4 ); idx++; 572 a->ldsw( G5, I3, G4 ); idx++;
568 a->ldsb( G5, low10(0xffffffff), G4 ); idx++; 573 a->ldsb( G5, al1.low10(), G4 ); idx++;
569 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 574 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
570 a->ldsb( G5, I3, G4 ); idx++; 575 a->ldsb( G5, I3, G4 ); idx++;
571 a->ldsh( G5, low10(0xffffffff), G4 ); idx++; 576 a->ldsh( G5, al1.low10(), G4 ); idx++;
572 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 577 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
573 a->ldsh( G5, I3, G4 ); idx++; 578 a->ldsh( G5, I3, G4 ); idx++;
574 a->lduw( G5, low10(0xffffffff), G4 ); idx++; 579 a->lduw( G5, al1.low10(), G4 ); idx++;
575 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 580 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
576 a->lduw( G5, I3, G4 ); idx++; 581 a->lduw( G5, I3, G4 ); idx++;
577 a->ldub( G5, low10(0xffffffff), G4 ); idx++; 582 a->ldub( G5, al1.low10(), G4 ); idx++;
578 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 583 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
579 a->ldub( G5, I3, G4 ); idx++; 584 a->ldub( G5, I3, G4 ); idx++;
580 a->lduh( G5, low10(0xffffffff), G4 ); idx++; 585 a->lduh( G5, al1.low10(), G4 ); idx++;
581 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 586 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
582 a->lduh( G5, I3, G4 ); idx++; 587 a->lduh( G5, I3, G4 ); idx++;
583 a->ldx( G5, low10(0xffffffff), G4 ); idx++; 588 a->ldx( G5, al1.low10(), G4 ); idx++;
584 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 589 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
585 a->ldx( G5, I3, G4 ); idx++; 590 a->ldx( G5, I3, G4 ); idx++;
586 a->ldd( G5, low10(0xffffffff), G4 ); idx++; 591 a->ldd( G5, al1.low10(), G4 ); idx++;
587 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 592 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
588 a->ldd( G5, I3, G4 ); idx++; 593 a->ldd( G5, I3, G4 ); idx++;
589 a->ldf( FloatRegisterImpl::D, O2, -1, F14 ); idx++; 594 a->ldf( FloatRegisterImpl::D, O2, -1, F14 ); idx++;
590 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 595 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
591 a->ldf( FloatRegisterImpl::S, O0, I3, F15 ); idx++; 596 a->ldf( FloatRegisterImpl::S, O0, I3, F15 ); idx++;
592 597
593 a->stw( G5, G4, low10(0xffffffff) ); idx++; 598 a->stw( G5, G4, al1.low10() ); idx++;
594 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 599 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
595 a->stw( G5, G4, I3 ); idx++; 600 a->stw( G5, G4, I3 ); idx++;
596 a->stb( G5, G4, low10(0xffffffff) ); idx++; 601 a->stb( G5, G4, al1.low10() ); idx++;
597 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 602 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
598 a->stb( G5, G4, I3 ); idx++; 603 a->stb( G5, G4, I3 ); idx++;
599 a->sth( G5, G4, low10(0xffffffff) ); idx++; 604 a->sth( G5, G4, al1.low10() ); idx++;
600 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 605 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
601 a->sth( G5, G4, I3 ); idx++; 606 a->sth( G5, G4, I3 ); idx++;
602 a->stx( G5, G4, low10(0xffffffff) ); idx++; 607 a->stx( G5, G4, al1.low10() ); idx++;
603 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 608 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
604 a->stx( G5, G4, I3 ); idx++; 609 a->stx( G5, G4, I3 ); idx++;
605 a->std( G5, G4, low10(0xffffffff) ); idx++; 610 a->std( G5, G4, al1.low10() ); idx++;
606 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 611 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
607 a->std( G5, G4, I3 ); idx++; 612 a->std( G5, G4, I3 ); idx++;
608 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++; 613 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++;
609 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->add(I3, low10(0xaaaabbbb), I3); 614 a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
610 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++; 615 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++;
611 616
612 nm = nativeMovRegMem_at( cb.code_begin() ); 617 nm = nativeMovRegMem_at( cb.code_begin() );
613 nm->print(); 618 nm->print();
614 nm->set_offset( low10(0) ); 619 nm->set_offset( low10(0) );
703 0x4000, 708 0x4000,
704 }; 709 };
705 710
706 VM_Version::allow_all(); 711 VM_Version::allow_all();
707 712
708 a->ldsw( G5, low10(0xffffffff), G4 ); idx++; 713 AddressLiteral al(0xffffffff, relocInfo::external_word_type);
709 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 714 a->ldsw( G5, al.low10(), G4); idx++;
715 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
710 a->ldsw( G5, I3, G4 ); idx++; 716 a->ldsw( G5, I3, G4 ); idx++;
711 a->ldsb( G5, low10(0xffffffff), G4 ); idx++; 717 a->ldsb( G5, al.low10(), G4); idx++;
712 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 718 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
713 a->ldsb( G5, I3, G4 ); idx++; 719 a->ldsb( G5, I3, G4 ); idx++;
714 a->ldsh( G5, low10(0xffffffff), G4 ); idx++; 720 a->ldsh( G5, al.low10(), G4); idx++;
715 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 721 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
716 a->ldsh( G5, I3, G4 ); idx++; 722 a->ldsh( G5, I3, G4 ); idx++;
717 a->lduw( G5, low10(0xffffffff), G4 ); idx++; 723 a->lduw( G5, al.low10(), G4); idx++;
718 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 724 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
719 a->lduw( G5, I3, G4 ); idx++; 725 a->lduw( G5, I3, G4 ); idx++;
720 a->ldub( G5, low10(0xffffffff), G4 ); idx++; 726 a->ldub( G5, al.low10(), G4); idx++;
721 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 727 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
722 a->ldub( G5, I3, G4 ); idx++; 728 a->ldub( G5, I3, G4 ); idx++;
723 a->lduh( G5, low10(0xffffffff), G4 ); idx++; 729 a->lduh( G5, al.low10(), G4); idx++;
724 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 730 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
725 a->lduh( G5, I3, G4 ); idx++; 731 a->lduh( G5, I3, G4 ); idx++;
726 a->ldx( G5, low10(0xffffffff), G4 ); idx++; 732 a->ldx( G5, al.low10(), G4); idx++;
727 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 733 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
728 a->ldx( G5, I3, G4 ); idx++; 734 a->ldx( G5, I3, G4 ); idx++;
729 a->ldd( G5, low10(0xffffffff), G4 ); idx++; 735 a->ldd( G5, al.low10(), G4); idx++;
730 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 736 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
731 a->ldd( G5, I3, G4 ); idx++; 737 a->ldd( G5, I3, G4 ); idx++;
732 a->ldf( FloatRegisterImpl::D, O2, -1, F14 ); idx++; 738 a->ldf( FloatRegisterImpl::D, O2, -1, F14 ); idx++;
733 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 739 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
734 a->ldf( FloatRegisterImpl::S, O0, I3, F15 ); idx++; 740 a->ldf( FloatRegisterImpl::S, O0, I3, F15 ); idx++;
735 741
736 a->stw( G5, G4, low10(0xffffffff) ); idx++; 742 a->stw( G5, G4, al.low10()); idx++;
737 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 743 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
738 a->stw( G5, G4, I3 ); idx++; 744 a->stw( G5, G4, I3 ); idx++;
739 a->stb( G5, G4, low10(0xffffffff) ); idx++; 745 a->stb( G5, G4, al.low10()); idx++;
740 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 746 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
741 a->stb( G5, G4, I3 ); idx++; 747 a->stb( G5, G4, I3 ); idx++;
742 a->sth( G5, G4, low10(0xffffffff) ); idx++; 748 a->sth( G5, G4, al.low10()); idx++;
743 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 749 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
744 a->sth( G5, G4, I3 ); idx++; 750 a->sth( G5, G4, I3 ); idx++;
745 a->stx( G5, G4, low10(0xffffffff) ); idx++; 751 a->stx( G5, G4, al.low10()); idx++;
746 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 752 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
747 a->stx( G5, G4, I3 ); idx++; 753 a->stx( G5, G4, I3 ); idx++;
748 a->std( G5, G4, low10(0xffffffff) ); idx++; 754 a->std( G5, G4, al.low10()); idx++;
749 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 755 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
750 a->std( G5, G4, I3 ); idx++; 756 a->std( G5, G4, I3 ); idx++;
751 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++; 757 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++;
752 a->sethi(0xaaaabbbb, I3, true, RelocationHolder::none); a->nop(); a->add(I3, low10(0xaaaabbbb), I3); 758 a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
753 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++; 759 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++;
754 760
755 nm = nativeMovRegMemPatching_at( cb.code_begin() ); 761 nm = nativeMovRegMemPatching_at( cb.code_begin() );
756 nm->print(); 762 nm->print();
757 nm->set_offset( low10(0) ); 763 nm->set_offset( low10(0) );
831 0x4000, 837 0x4000,
832 }; 838 };
833 839
834 VM_Version::allow_all(); 840 VM_Version::allow_all();
835 841
836 a->sethi(0x7fffbbbb, I3, true, RelocationHolder::none); 842 AddressLiteral al(0x7fffbbbb, relocInfo::external_word_type);
837 a->jmpl(I3, low10(0x7fffbbbb), G0, RelocationHolder::none); 843 a->sethi(al, I3);
844 a->jmpl(I3, al.low10(), G0, RelocationHolder::none);
838 a->delayed()->nop(); 845 a->delayed()->nop();
839 a->sethi(0x7fffbbbb, I3, true, RelocationHolder::none); 846 a->sethi(al, I3);
840 a->jmpl(I3, low10(0x7fffbbbb), L3, RelocationHolder::none); 847 a->jmpl(I3, al.low10(), L3, RelocationHolder::none);
841 a->delayed()->nop(); 848 a->delayed()->nop();
842 849
843 nj = nativeJump_at( cb.code_begin() ); 850 nj = nativeJump_at( cb.code_begin() );
844 nj->print(); 851 nj->print();
845 852