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comparison src/cpu/x86/vm/register_x86.hpp @ 6179:8c92982cbbc4

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7119644: Increase superword's vector size up to 256 bits Summary: Increase vector size up to 256-bits for YMM AVX registers on x86. Reviewed-by: never, twisti, roland
author kvn
date Fri, 15 Jun 2012 01:25:19 -0700
parents f95d63e2154a
children a560c9b81f0f
comparison
equal deleted inserted replaced
6146:eba1d5bce9e8 6179:8c92982cbbc4
1 /* 1 /*
2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
156 156
157 // derived registers, offsets, and addresses 157 // derived registers, offsets, and addresses
158 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); } 158 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); }
159 159
160 // accessors 160 // accessors
161 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } 161 int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this )); return (intptr_t)this; }
162 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } 162 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
163 const char* name() const; 163 const char* name() const;
164 }; 164 };
165 165
166 166
214 number_of_registers = RegisterImpl::number_of_registers + 214 number_of_registers = RegisterImpl::number_of_registers +
215 #ifdef AMD64 215 #ifdef AMD64
216 RegisterImpl::number_of_registers + // "H" half of a 64bit register 216 RegisterImpl::number_of_registers + // "H" half of a 64bit register
217 #endif // AMD64 217 #endif // AMD64
218 2 * FloatRegisterImpl::number_of_registers + 218 2 * FloatRegisterImpl::number_of_registers +
219 2 * XMMRegisterImpl::number_of_registers + 219 8 * XMMRegisterImpl::number_of_registers +
220 1 // eflags 220 1 // eflags
221 }; 221 };
222 222
223 static const int max_gpr; 223 static const int max_gpr;
224 static const int max_fpr; 224 static const int max_fpr;