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comparison src/cpu/sparc/vm/assembler_sparc.hpp @ 3851:95134e034042

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7063629: use cbcond in C2 generated code on T4 Summary: Use new short branch instruction in C2 generated code. Reviewed-by: never
author kvn
date Thu, 11 Aug 2011 12:08:11 -0700
parents 3d42f82cd811
children 1af104d6cf99
comparison
equal deleted inserted replaced
3850:6987871cfb9b 3851:95134e034042
1190 1190
1191 void no_cbcond_before() { 1191 void no_cbcond_before() {
1192 assert(offset() == 0 || !cbcond_before(), "cbcond should not follow an other cbcond"); 1192 assert(offset() == 0 || !cbcond_before(), "cbcond should not follow an other cbcond");
1193 } 1193 }
1194 1194
1195 public:
1196
1195 bool use_cbcond(Label& L) { 1197 bool use_cbcond(Label& L) {
1196 if (!UseCBCond || cbcond_before()) return false; 1198 if (!UseCBCond || cbcond_before()) return false;
1197 intptr_t x = intptr_t(target_distance(L)) - intptr_t(pc()); 1199 intptr_t x = intptr_t(target_distance(L)) - intptr_t(pc());
1198 assert( (x & 3) == 0, "not word aligned"); 1200 assert( (x & 3) == 0, "not word aligned");
1199 return is_simm(x, 12); 1201 return is_simm(x, 12);
1200 } 1202 }
1201 1203
1202 public:
1203 // Tells assembler you know that next instruction is delayed 1204 // Tells assembler you know that next instruction is delayed
1204 Assembler* delayed() { 1205 Assembler* delayed() {
1205 #ifdef CHECK_DELAY 1206 #ifdef CHECK_DELAY
1206 assert ( delay_state == at_delay_slot, "delayed instruction is not in delay slot"); 1207 assert ( delay_state == at_delay_slot, "delayed instruction is not in delay slot");
1207 delay_state = filling_delay_slot; 1208 delay_state = filling_delay_slot;
1246 // pp 136 1247 // pp 136
1247 1248
1248 inline void bpr(RCondition c, bool a, Predict p, Register s1, address d, relocInfo::relocType rt = relocInfo::none); 1249 inline void bpr(RCondition c, bool a, Predict p, Register s1, address d, relocInfo::relocType rt = relocInfo::none);
1249 inline void bpr(RCondition c, bool a, Predict p, Register s1, Label& L); 1250 inline void bpr(RCondition c, bool a, Predict p, Register s1, Label& L);
1250 1251
1251 protected: // use MacroAssembler::br instead
1252
1253 // pp 138
1254
1255 inline void fb( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
1256 inline void fb( Condition c, bool a, Label& L );
1257
1258 // pp 141
1259
1260 inline void fbp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
1261 inline void fbp( Condition c, bool a, CC cc, Predict p, Label& L );
1262
1263 // pp 144
1264
1265 inline void br( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
1266 inline void br( Condition c, bool a, Label& L );
1267
1268 // pp 146
1269
1270 inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
1271 inline void bp( Condition c, bool a, CC cc, Predict p, Label& L );
1272
1273 // pp 121 (V8)
1274
1275 inline void cb( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
1276 inline void cb( Condition c, bool a, Label& L );
1277
1278 // compare and branch 1252 // compare and branch
1279 inline void cbcond(Condition c, CC cc, Register s1, Register s2, Label& L); 1253 inline void cbcond(Condition c, CC cc, Register s1, Register s2, Label& L);
1280 inline void cbcond(Condition c, CC cc, Register s1, int simm5, Label& L); 1254 inline void cbcond(Condition c, CC cc, Register s1, int simm5, Label& L);
1255
1256 protected: // use MacroAssembler::br instead
1257
1258 // pp 138
1259
1260 inline void fb( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
1261 inline void fb( Condition c, bool a, Label& L );
1262
1263 // pp 141
1264
1265 inline void fbp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
1266 inline void fbp( Condition c, bool a, CC cc, Predict p, Label& L );
1267
1268 // pp 144
1269
1270 inline void br( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
1271 inline void br( Condition c, bool a, Label& L );
1272
1273 // pp 146
1274
1275 inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
1276 inline void bp( Condition c, bool a, CC cc, Predict p, Label& L );
1277
1278 // pp 121 (V8)
1279
1280 inline void cb( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
1281 inline void cb( Condition c, bool a, Label& L );
1281 1282
1282 // pp 149 1283 // pp 149
1283 1284
1284 inline void call( address d, relocInfo::relocType rt = relocInfo::runtime_call_type ); 1285 inline void call( address d, relocInfo::relocType rt = relocInfo::runtime_call_type );
1285 inline void call( Label& L, relocInfo::relocType rt = relocInfo::runtime_call_type ); 1286 inline void call( Label& L, relocInfo::relocType rt = relocInfo::runtime_call_type );