Mercurial > hg > graal-jvmci-8
comparison src/os_cpu/linux_sparc/vm/linux_sparc.s @ 11127:980532a806a5
8016697: Use stubs to implement safefetch
Summary: Implement Safefetch as stub routines. This reduces compiler and os dependencies.
Reviewed-by: twisti, kvn
author | goetz |
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date | Thu, 20 Jun 2013 15:02:05 +0200 |
parents | c18cbe5936b8 |
children | de6a9e811145 |
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11088:ea4d24c1e0c6 | 11127:980532a806a5 |
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18 # | 18 # |
19 # Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA | 19 # Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
20 # or visit www.oracle.com if you need additional information or have any | 20 # or visit www.oracle.com if you need additional information or have any |
21 # questions. | 21 # questions. |
22 # | 22 # |
23 | |
24 # Prototype: int SafeFetch32 (int * adr, int ErrValue) | |
25 # The "ld" at Fetch32 is potentially faulting instruction. | |
26 # If the instruction traps the trap handler will arrange | |
27 # for control to resume at Fetch32Resume. | |
28 # By convention with the trap handler we ensure there is a non-CTI | |
29 # instruction in the trap shadow. | |
30 | |
31 | |
32 .globl SafeFetch32, Fetch32PFI, Fetch32Resume | |
33 .globl SafeFetchN | |
34 .align 32 | |
35 .type SafeFetch32,@function | |
36 SafeFetch32: | |
37 mov %o0, %g1 | |
38 mov %o1, %o0 | |
39 Fetch32PFI: | |
40 # <-- Potentially faulting instruction | |
41 ld [%g1], %o0 | |
42 Fetch32Resume: | |
43 nop | |
44 retl | |
45 nop | |
46 | |
47 .globl SafeFetchN, FetchNPFI, FetchNResume | |
48 .type SafeFetchN,@function | |
49 .align 32 | |
50 SafeFetchN: | |
51 mov %o0, %g1 | |
52 mov %o1, %o0 | |
53 FetchNPFI: | |
54 ldn [%g1], %o0 | |
55 FetchNResume: | |
56 nop | |
57 retl | |
58 nop | |
59 | 23 |
60 # Possibilities: | 24 # Possibilities: |
61 # -- membar | 25 # -- membar |
62 # -- CAS (SP + BIAS, G0, G0) | 26 # -- CAS (SP + BIAS, G0, G0) |
63 # -- wr %g0, %asi | 27 # -- wr %g0, %asi |