Mercurial > hg > graal-jvmci-8
comparison src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp @ 1711:a6bff45449bc
6973570: OrderAccess::storestore() scales poorly on multi-socket x64 and sparc: cache-line ping-ponging
Summary: volatile store to static variable removed in favour of a volatile store to stack to avoid excessive cache coherency traffic; verified that the volatile store is not elided by any of our current compilers.
Reviewed-by: dholmes, dice, jcoomes, kvn
author | ysr |
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date | Tue, 10 Aug 2010 14:53:35 -0700 |
parents | c18cbe5936b8 |
children | f95d63e2154a |
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1710:94251661de76 | 1711:a6bff45449bc |
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1 /* | 1 /* |
2 * Copyright (c) 2003, 2009, Oracle and/or its affiliates. All rights reserved. | 2 * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | 4 * |
5 * This code is free software; you can redistribute it and/or modify it | 5 * This code is free software; you can redistribute it and/or modify it |
6 * under the terms of the GNU General Public License version 2 only, as | 6 * under the terms of the GNU General Public License version 2 only, as |
7 * published by the Free Software Foundation. | 7 * published by the Free Software Foundation. |
28 inline void OrderAccess::storestore() { release(); } | 28 inline void OrderAccess::storestore() { release(); } |
29 inline void OrderAccess::loadstore() { acquire(); } | 29 inline void OrderAccess::loadstore() { acquire(); } |
30 inline void OrderAccess::storeload() { fence(); } | 30 inline void OrderAccess::storeload() { fence(); } |
31 | 31 |
32 inline void OrderAccess::acquire() { | 32 inline void OrderAccess::acquire() { |
33 volatile intptr_t dummy; | 33 volatile intptr_t local_dummy; |
34 #ifdef AMD64 | 34 #ifdef AMD64 |
35 __asm__ volatile ("movq 0(%%rsp), %0" : "=r" (dummy) : : "memory"); | 35 __asm__ volatile ("movq 0(%%rsp), %0" : "=r" (local_dummy) : : "memory"); |
36 #else | 36 #else |
37 __asm__ volatile ("movl 0(%%esp),%0" : "=r" (dummy) : : "memory"); | 37 __asm__ volatile ("movl 0(%%esp),%0" : "=r" (local_dummy) : : "memory"); |
38 #endif // AMD64 | 38 #endif // AMD64 |
39 } | 39 } |
40 | 40 |
41 inline void OrderAccess::release() { | 41 inline void OrderAccess::release() { |
42 dummy = 0; | 42 // Avoid hitting the same cache-line from |
43 // different threads. | |
44 volatile jint local_dummy = 0; | |
43 } | 45 } |
44 | 46 |
45 inline void OrderAccess::fence() { | 47 inline void OrderAccess::fence() { |
46 if (os::is_MP()) { | 48 if (os::is_MP()) { |
47 // always use locked addl since mfence is sometimes expensive | 49 // always use locked addl since mfence is sometimes expensive |