Mercurial > hg > graal-jvmci-8
comparison src/cpu/x86/vm/c1_FrameMap_x86.cpp @ 2002:ac637b7220d1
6985015: C1 needs to support compressed oops
Summary: This change implements compressed oops for C1 for x64 and sparc. The changes are mostly on the codegen level, with a few exceptions when we do access things outside of the heap that are uncompressed from the IR. Compressed oops are now also enabled with tiered.
Reviewed-by: twisti, kvn, never, phh
author | iveresov |
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date | Tue, 30 Nov 2010 23:23:40 -0800 |
parents | f95d63e2154a |
children | 8a02ca5e5576 |
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1972:f95d63e2154a | 2002:ac637b7220d1 |
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156 map_register(7, rbp); | 156 map_register(7, rbp); |
157 #else | 157 #else |
158 map_register( 6, r8); r8_opr = LIR_OprFact::single_cpu(6); | 158 map_register( 6, r8); r8_opr = LIR_OprFact::single_cpu(6); |
159 map_register( 7, r9); r9_opr = LIR_OprFact::single_cpu(7); | 159 map_register( 7, r9); r9_opr = LIR_OprFact::single_cpu(7); |
160 map_register( 8, r11); r11_opr = LIR_OprFact::single_cpu(8); | 160 map_register( 8, r11); r11_opr = LIR_OprFact::single_cpu(8); |
161 map_register( 9, r12); r12_opr = LIR_OprFact::single_cpu(9); | 161 map_register( 9, r13); r13_opr = LIR_OprFact::single_cpu(9); |
162 map_register(10, r13); r13_opr = LIR_OprFact::single_cpu(10); | 162 map_register(10, r14); r14_opr = LIR_OprFact::single_cpu(10); |
163 map_register(11, r14); r14_opr = LIR_OprFact::single_cpu(11); | 163 // r12 is allocated conditionally. With compressed oops it holds |
164 // the heapbase value and is not visible to the allocator. | |
165 map_register(11, r12); r12_opr = LIR_OprFact::single_cpu(11); | |
164 // The unallocatable registers are at the end | 166 // The unallocatable registers are at the end |
165 map_register(12, r10); r10_opr = LIR_OprFact::single_cpu(12); | 167 map_register(12, r10); r10_opr = LIR_OprFact::single_cpu(12); |
166 map_register(13, r15); r15_opr = LIR_OprFact::single_cpu(13); | 168 map_register(13, r15); r15_opr = LIR_OprFact::single_cpu(13); |
167 map_register(14, rsp); | 169 map_register(14, rsp); |
168 map_register(15, rbp); | 170 map_register(15, rbp); |
189 | 191 |
190 #ifdef _LP64 | 192 #ifdef _LP64 |
191 _caller_save_cpu_regs[6] = r8_opr; | 193 _caller_save_cpu_regs[6] = r8_opr; |
192 _caller_save_cpu_regs[7] = r9_opr; | 194 _caller_save_cpu_regs[7] = r9_opr; |
193 _caller_save_cpu_regs[8] = r11_opr; | 195 _caller_save_cpu_regs[8] = r11_opr; |
194 _caller_save_cpu_regs[9] = r12_opr; | 196 _caller_save_cpu_regs[9] = r13_opr; |
195 _caller_save_cpu_regs[10] = r13_opr; | 197 _caller_save_cpu_regs[10] = r14_opr; |
196 _caller_save_cpu_regs[11] = r14_opr; | 198 _caller_save_cpu_regs[11] = r12_opr; |
197 #endif // _LP64 | 199 #endif // _LP64 |
198 | 200 |
199 | 201 |
200 _xmm_regs[0] = xmm0; | 202 _xmm_regs[0] = xmm0; |
201 _xmm_regs[1] = xmm1; | 203 _xmm_regs[1] = xmm1; |