Mercurial > hg > graal-jvmci-8
comparison src/share/vm/opto/compile.cpp @ 12071:adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
Summary: public methods that don't need to be public should be private.
Reviewed-by: kvn, twisti
author | adlertz |
---|---|
date | Fri, 16 Aug 2013 10:23:55 +0200 |
parents | d1034bd8cefc |
children | 650868c062a9 e2722a66aba7 |
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12070:afbe18ae0905 | 12071:adb9a7d94cb5 |
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2134 | 2134 |
2135 | 2135 |
2136 //------------------------------Code_Gen--------------------------------------- | 2136 //------------------------------Code_Gen--------------------------------------- |
2137 // Given a graph, generate code for it | 2137 // Given a graph, generate code for it |
2138 void Compile::Code_Gen() { | 2138 void Compile::Code_Gen() { |
2139 if (failing()) return; | 2139 if (failing()) { |
2140 return; | |
2141 } | |
2140 | 2142 |
2141 // Perform instruction selection. You might think we could reclaim Matcher | 2143 // Perform instruction selection. You might think we could reclaim Matcher |
2142 // memory PDQ, but actually the Matcher is used in generating spill code. | 2144 // memory PDQ, but actually the Matcher is used in generating spill code. |
2143 // Internals of the Matcher (including some VectorSets) must remain live | 2145 // Internals of the Matcher (including some VectorSets) must remain live |
2144 // for awhile - thus I cannot reclaim Matcher memory lest a VectorSet usage | 2146 // for awhile - thus I cannot reclaim Matcher memory lest a VectorSet usage |
2146 | 2148 |
2147 // In debug mode can dump m._nodes.dump() for mapping of ideal to machine | 2149 // In debug mode can dump m._nodes.dump() for mapping of ideal to machine |
2148 // nodes. Mapping is only valid at the root of each matched subtree. | 2150 // nodes. Mapping is only valid at the root of each matched subtree. |
2149 NOT_PRODUCT( verify_graph_edges(); ) | 2151 NOT_PRODUCT( verify_graph_edges(); ) |
2150 | 2152 |
2151 Node_List proj_list; | 2153 Matcher matcher; |
2152 Matcher m(proj_list); | 2154 _matcher = &matcher; |
2153 _matcher = &m; | |
2154 { | 2155 { |
2155 TracePhase t2("matcher", &_t_matcher, true); | 2156 TracePhase t2("matcher", &_t_matcher, true); |
2156 m.match(); | 2157 matcher.match(); |
2157 } | 2158 } |
2158 // In debug mode can dump m._nodes.dump() for mapping of ideal to machine | 2159 // In debug mode can dump m._nodes.dump() for mapping of ideal to machine |
2159 // nodes. Mapping is only valid at the root of each matched subtree. | 2160 // nodes. Mapping is only valid at the root of each matched subtree. |
2160 NOT_PRODUCT( verify_graph_edges(); ) | 2161 NOT_PRODUCT( verify_graph_edges(); ) |
2161 | 2162 |
2162 // If you have too many nodes, or if matching has failed, bail out | 2163 // If you have too many nodes, or if matching has failed, bail out |
2163 check_node_count(0, "out of nodes matching instructions"); | 2164 check_node_count(0, "out of nodes matching instructions"); |
2164 if (failing()) return; | 2165 if (failing()) { |
2166 return; | |
2167 } | |
2165 | 2168 |
2166 // Build a proper-looking CFG | 2169 // Build a proper-looking CFG |
2167 PhaseCFG cfg(node_arena(), root(), m); | 2170 PhaseCFG cfg(node_arena(), root(), matcher); |
2168 _cfg = &cfg; | 2171 _cfg = &cfg; |
2169 { | 2172 { |
2170 NOT_PRODUCT( TracePhase t2("scheduler", &_t_scheduler, TimeCompiler); ) | 2173 NOT_PRODUCT( TracePhase t2("scheduler", &_t_scheduler, TimeCompiler); ) |
2171 cfg.Dominators(); | 2174 bool success = cfg.do_global_code_motion(); |
2172 if (failing()) return; | 2175 if (!success) { |
2173 | 2176 return; |
2177 } | |
2178 | |
2179 print_method(PHASE_GLOBAL_CODE_MOTION, 2); | |
2174 NOT_PRODUCT( verify_graph_edges(); ) | 2180 NOT_PRODUCT( verify_graph_edges(); ) |
2175 | |
2176 cfg.Estimate_Block_Frequency(); | |
2177 cfg.GlobalCodeMotion(m,unique(),proj_list); | |
2178 if (failing()) return; | |
2179 | |
2180 print_method(PHASE_GLOBAL_CODE_MOTION, 2); | |
2181 | |
2182 NOT_PRODUCT( verify_graph_edges(); ) | |
2183 | |
2184 debug_only( cfg.verify(); ) | 2181 debug_only( cfg.verify(); ) |
2185 } | 2182 } |
2186 NOT_PRODUCT( verify_graph_edges(); ) | 2183 |
2187 | 2184 PhaseChaitin regalloc(unique(), cfg, matcher); |
2188 PhaseChaitin regalloc(unique(), cfg, m); | |
2189 _regalloc = ®alloc; | 2185 _regalloc = ®alloc; |
2190 { | 2186 { |
2191 TracePhase t2("regalloc", &_t_registerAllocation, true); | 2187 TracePhase t2("regalloc", &_t_registerAllocation, true); |
2192 // Perform register allocation. After Chaitin, use-def chains are | 2188 // Perform register allocation. After Chaitin, use-def chains are |
2193 // no longer accurate (at spill code) and so must be ignored. | 2189 // no longer accurate (at spill code) and so must be ignored. |
2204 // the allocator needed a place to spill. After register allocation we | 2200 // the allocator needed a place to spill. After register allocation we |
2205 // are not adding any new instructions. If any basic block is empty, we | 2201 // are not adding any new instructions. If any basic block is empty, we |
2206 // can now safely remove it. | 2202 // can now safely remove it. |
2207 { | 2203 { |
2208 NOT_PRODUCT( TracePhase t2("blockOrdering", &_t_blockOrdering, TimeCompiler); ) | 2204 NOT_PRODUCT( TracePhase t2("blockOrdering", &_t_blockOrdering, TimeCompiler); ) |
2209 cfg.remove_empty(); | 2205 cfg.remove_empty_blocks(); |
2210 if (do_freq_based_layout()) { | 2206 if (do_freq_based_layout()) { |
2211 PhaseBlockLayout layout(cfg); | 2207 PhaseBlockLayout layout(cfg); |
2212 } else { | 2208 } else { |
2213 cfg.set_loop_alignment(); | 2209 cfg.set_loop_alignment(); |
2214 } | 2210 } |
2251 int pc = 0x0; // Program counter | 2247 int pc = 0x0; // Program counter |
2252 char starts_bundle = ' '; | 2248 char starts_bundle = ' '; |
2253 _regalloc->dump_frame(); | 2249 _regalloc->dump_frame(); |
2254 | 2250 |
2255 Node *n = NULL; | 2251 Node *n = NULL; |
2256 for( uint i=0; i<_cfg->_num_blocks; i++ ) { | 2252 for (uint i = 0; i < _cfg->number_of_blocks(); i++) { |
2257 if (VMThread::should_terminate()) { cut_short = true; break; } | 2253 if (VMThread::should_terminate()) { |
2258 Block *b = _cfg->_blocks[i]; | 2254 cut_short = true; |
2259 if (b->is_connector() && !Verbose) continue; | 2255 break; |
2260 n = b->_nodes[0]; | 2256 } |
2261 if (pcs && n->_idx < pc_limit) | 2257 Block* block = _cfg->get_block(i); |
2258 if (block->is_connector() && !Verbose) { | |
2259 continue; | |
2260 } | |
2261 n = block->_nodes[0]; | |
2262 if (pcs && n->_idx < pc_limit) { | |
2262 tty->print("%3.3x ", pcs[n->_idx]); | 2263 tty->print("%3.3x ", pcs[n->_idx]); |
2263 else | 2264 } else { |
2264 tty->print(" "); | 2265 tty->print(" "); |
2265 b->dump_head(_cfg); | 2266 } |
2266 if (b->is_connector()) { | 2267 block->dump_head(_cfg); |
2268 if (block->is_connector()) { | |
2267 tty->print_cr(" # Empty connector block"); | 2269 tty->print_cr(" # Empty connector block"); |
2268 } else if (b->num_preds() == 2 && b->pred(1)->is_CatchProj() && b->pred(1)->as_CatchProj()->_con == CatchProjNode::fall_through_index) { | 2270 } else if (block->num_preds() == 2 && block->pred(1)->is_CatchProj() && block->pred(1)->as_CatchProj()->_con == CatchProjNode::fall_through_index) { |
2269 tty->print_cr(" # Block is sole successor of call"); | 2271 tty->print_cr(" # Block is sole successor of call"); |
2270 } | 2272 } |
2271 | 2273 |
2272 // For all instructions | 2274 // For all instructions |
2273 Node *delay = NULL; | 2275 Node *delay = NULL; |
2274 for( uint j = 0; j<b->_nodes.size(); j++ ) { | 2276 for (uint j = 0; j < block->_nodes.size(); j++) { |
2275 if (VMThread::should_terminate()) { cut_short = true; break; } | 2277 if (VMThread::should_terminate()) { |
2276 n = b->_nodes[j]; | 2278 cut_short = true; |
2279 break; | |
2280 } | |
2281 n = block->_nodes[j]; | |
2277 if (valid_bundle_info(n)) { | 2282 if (valid_bundle_info(n)) { |
2278 Bundle *bundle = node_bundling(n); | 2283 Bundle* bundle = node_bundling(n); |
2279 if (bundle->used_in_unconditional_delay()) { | 2284 if (bundle->used_in_unconditional_delay()) { |
2280 delay = n; | 2285 delay = n; |
2281 continue; | 2286 continue; |
2282 } | 2287 } |
2283 if (bundle->starts_bundle()) | 2288 if (bundle->starts_bundle()) { |
2284 starts_bundle = '+'; | 2289 starts_bundle = '+'; |
2285 } | 2290 } |
2286 | 2291 } |
2287 if (WizardMode) n->dump(); | 2292 |
2293 if (WizardMode) { | |
2294 n->dump(); | |
2295 } | |
2288 | 2296 |
2289 if( !n->is_Region() && // Dont print in the Assembly | 2297 if( !n->is_Region() && // Dont print in the Assembly |
2290 !n->is_Phi() && // a few noisely useless nodes | 2298 !n->is_Phi() && // a few noisely useless nodes |
2291 !n->is_Proj() && | 2299 !n->is_Proj() && |
2292 !n->is_MachTemp() && | 2300 !n->is_MachTemp() && |