comparison src/cpu/x86/vm/macroAssembler_x86.hpp @ 20311:b1bc1af04c6e

8052081: Optimize generated by C2 code for Intel's Atom processor Summary: Allow to execute vectorization and crc32 optimization on Atom. Enable UseFPUForSpilling by default on x86. Reviewed-by: roland
author kvn
date Tue, 05 Aug 2014 15:02:10 -0700
parents 0bf37f737702
children 166d744df0de
comparison
equal deleted inserted replaced
20310:bfba6779654b 20311:b1bc1af04c6e
964 964
965 void mulss(XMMRegister dst, XMMRegister src) { Assembler::mulss(dst, src); } 965 void mulss(XMMRegister dst, XMMRegister src) { Assembler::mulss(dst, src); }
966 void mulss(XMMRegister dst, Address src) { Assembler::mulss(dst, src); } 966 void mulss(XMMRegister dst, Address src) { Assembler::mulss(dst, src); }
967 void mulss(XMMRegister dst, AddressLiteral src); 967 void mulss(XMMRegister dst, AddressLiteral src);
968 968
969 // Carry-Less Multiplication Quadword
970 void pclmulldq(XMMRegister dst, XMMRegister src) {
971 // 0x00 - multiply lower 64 bits [0:63]
972 Assembler::pclmulqdq(dst, src, 0x00);
973 }
974 void pclmulhdq(XMMRegister dst, XMMRegister src) {
975 // 0x11 - multiply upper 64 bits [64:127]
976 Assembler::pclmulqdq(dst, src, 0x11);
977 }
978
969 void sqrtsd(XMMRegister dst, XMMRegister src) { Assembler::sqrtsd(dst, src); } 979 void sqrtsd(XMMRegister dst, XMMRegister src) { Assembler::sqrtsd(dst, src); }
970 void sqrtsd(XMMRegister dst, Address src) { Assembler::sqrtsd(dst, src); } 980 void sqrtsd(XMMRegister dst, Address src) { Assembler::sqrtsd(dst, src); }
971 void sqrtsd(XMMRegister dst, AddressLiteral src); 981 void sqrtsd(XMMRegister dst, AddressLiteral src);
972 982
973 void sqrtss(XMMRegister dst, XMMRegister src) { Assembler::sqrtss(dst, src); } 983 void sqrtss(XMMRegister dst, XMMRegister src) { Assembler::sqrtss(dst, src); }