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comparison src/cpu/x86/vm/nativeInst_x86.hpp @ 2404:b40d4fa697bf

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6964776: c2 should ensure the polling page is reachable on 64 bit Summary: Materialize the pointer to the polling page in a register instead of using rip-relative addressing when the distance from the code cache is larger than disp32. Reviewed-by: never, kvn
author iveresov
date Sun, 27 Mar 2011 13:17:37 -0700
parents f95d63e2154a
children f79b652d4437 127b3692c168
comparison
equal deleted inserted replaced
2403:1927db75dd85 2404:b40d4fa697bf
1 /* 1 /*
2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
517 517
518 // Simple test vs memory 518 // Simple test vs memory
519 class NativeTstRegMem: public NativeInstruction { 519 class NativeTstRegMem: public NativeInstruction {
520 public: 520 public:
521 enum Intel_specific_constants { 521 enum Intel_specific_constants {
522 instruction_code_memXregl = 0x85 522 instruction_rex_prefix_mask = 0xF0,
523 instruction_rex_prefix = Assembler::REX,
524 instruction_code_memXregl = 0x85,
525 modrm_mask = 0x38, // select reg from the ModRM byte
526 modrm_reg = 0x00 // rax
523 }; 527 };
524 }; 528 };
525 529
526 inline bool NativeInstruction::is_illegal() { return (short)int_at(0) == (short)NativeIllegalInstruction::instruction_code; } 530 inline bool NativeInstruction::is_illegal() { return (short)int_at(0) == (short)NativeIllegalInstruction::instruction_code; }
527 inline bool NativeInstruction::is_call() { return ubyte_at(0) == NativeCall::instruction_code; } 531 inline bool NativeInstruction::is_call() { return ubyte_at(0) == NativeCall::instruction_code; }
531 ubyte_at(0) == 0xEB; /* short jump */ } 535 ubyte_at(0) == 0xEB; /* short jump */ }
532 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ || 536 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ ||
533 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ } 537 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ }
534 inline bool NativeInstruction::is_safepoint_poll() { 538 inline bool NativeInstruction::is_safepoint_poll() {
535 #ifdef AMD64 539 #ifdef AMD64
536 if ( ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl && 540 if (Assembler::is_polling_page_far()) {
537 ubyte_at(1) == 0x05 ) { // 00 rax 101 541 // two cases, depending on the choice of the base register in the address.
538 address fault = addr_at(6) + int_at(2); 542 if (((ubyte_at(0) & NativeTstRegMem::instruction_rex_prefix_mask) == NativeTstRegMem::instruction_rex_prefix &&
539 return os::is_poll_address(fault); 543 ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl &&
544 (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) ||
545 ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
546 (ubyte_at(1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) {
547 return true;
548 } else {
549 return false;
550 }
540 } else { 551 } else {
541 return false; 552 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
553 ubyte_at(1) == 0x05) { // 00 rax 101
554 address fault = addr_at(6) + int_at(2);
555 return os::is_poll_address(fault);
556 } else {
557 return false;
558 }
542 } 559 }
543 #else 560 #else
544 return ( ubyte_at(0) == NativeMovRegMem::instruction_code_mem2reg || 561 return ( ubyte_at(0) == NativeMovRegMem::instruction_code_mem2reg ||
545 ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl ) && 562 ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl ) &&
546 (ubyte_at(1)&0xC7) == 0x05 && /* Mod R/M == disp32 */ 563 (ubyte_at(1)&0xC7) == 0x05 && /* Mod R/M == disp32 */