comparison src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp @ 11080:b800986664f4

7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32 Summary: add intrinsics using new instruction to interpreter, C1, C2, for suitable x86; add test Reviewed-by: kvn, twisti
author drchase
date Tue, 02 Jul 2013 20:42:12 -0400
parents 46c544b8fbfc
children f98f5d48f511
comparison
equal deleted inserted replaced
11079:738e04fb1232 11080:b800986664f4
1 /* 1 /*
2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
2944 __ set(offset, dst); 2944 __ set(offset, dst);
2945 __ add(dst, reg, dst); 2945 __ add(dst, reg, dst);
2946 } 2946 }
2947 } 2947 }
2948 2948
2949 void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
2950 fatal("CRC32 intrinsic is not implemented on this platform");
2951 }
2949 2952
2950 void LIR_Assembler::emit_lock(LIR_OpLock* op) { 2953 void LIR_Assembler::emit_lock(LIR_OpLock* op) {
2951 Register obj = op->obj_opr()->as_register(); 2954 Register obj = op->obj_opr()->as_register();
2952 Register hdr = op->hdr_opr()->as_register(); 2955 Register hdr = op->hdr_opr()->as_register();
2953 Register lock = op->lock_opr()->as_register(); 2956 Register lock = op->lock_opr()->as_register();