Mercurial > hg > graal-jvmci-8
comparison src/share/vm/c1/c1_LIR.cpp @ 11080:b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
Summary: add intrinsics using new instruction to interpreter, C1, C2, for suitable x86; add test
Reviewed-by: kvn, twisti
author | drchase |
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date | Tue, 02 Jul 2013 20:42:12 -0400 |
parents | 87a6f2df28e2 |
children | d13d7aba8c12 |
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11079:738e04fb1232 | 11080:b800986664f4 |
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428 , _expected_type(expected_type) | 428 , _expected_type(expected_type) |
429 , _length(length) { | 429 , _length(length) { |
430 _stub = new ArrayCopyStub(this); | 430 _stub = new ArrayCopyStub(this); |
431 } | 431 } |
432 | 432 |
433 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) | |
434 : LIR_Op(lir_updatecrc32, res, NULL) | |
435 , _crc(crc) | |
436 , _val(val) { | |
437 } | |
433 | 438 |
434 //-------------------verify-------------------------- | 439 //-------------------verify-------------------------- |
435 | 440 |
436 void LIR_Op1::verify() const { | 441 void LIR_Op1::verify() const { |
437 switch(code()) { | 442 switch(code()) { |
874 | 879 |
875 break; | 880 break; |
876 } | 881 } |
877 | 882 |
878 | 883 |
884 // LIR_OpUpdateCRC32 | |
885 case lir_updatecrc32: { | |
886 assert(op->as_OpUpdateCRC32() != NULL, "must be"); | |
887 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op; | |
888 | |
889 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc); | |
890 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val); | |
891 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result); | |
892 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32"); | |
893 | |
894 break; | |
895 } | |
896 | |
897 | |
879 // LIR_OpLock | 898 // LIR_OpLock |
880 case lir_lock: | 899 case lir_lock: |
881 case lir_unlock: { | 900 case lir_unlock: { |
882 assert(op->as_OpLock() != NULL, "must be"); | 901 assert(op->as_OpLock() != NULL, "must be"); |
883 LIR_OpLock* opLock = (LIR_OpLock*)op; | 902 LIR_OpLock* opLock = (LIR_OpLock*)op; |
1052 } | 1071 } |
1053 | 1072 |
1054 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { | 1073 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { |
1055 masm->emit_arraycopy(this); | 1074 masm->emit_arraycopy(this); |
1056 masm->emit_code_stub(stub()); | 1075 masm->emit_code_stub(stub()); |
1076 } | |
1077 | |
1078 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) { | |
1079 masm->emit_updatecrc32(this); | |
1057 } | 1080 } |
1058 | 1081 |
1059 void LIR_Op0::emit_code(LIR_Assembler* masm) { | 1082 void LIR_Op0::emit_code(LIR_Assembler* masm) { |
1060 masm->emit_op0(this); | 1083 masm->emit_op0(this); |
1061 } | 1084 } |
1761 case lir_icvirtual_call: s = "icvirtual"; break; | 1784 case lir_icvirtual_call: s = "icvirtual"; break; |
1762 case lir_virtual_call: s = "virtual"; break; | 1785 case lir_virtual_call: s = "virtual"; break; |
1763 case lir_dynamic_call: s = "dynamic"; break; | 1786 case lir_dynamic_call: s = "dynamic"; break; |
1764 // LIR_OpArrayCopy | 1787 // LIR_OpArrayCopy |
1765 case lir_arraycopy: s = "arraycopy"; break; | 1788 case lir_arraycopy: s = "arraycopy"; break; |
1789 // LIR_OpUpdateCRC32 | |
1790 case lir_updatecrc32: s = "updatecrc32"; break; | |
1766 // LIR_OpLock | 1791 // LIR_OpLock |
1767 case lir_lock: s = "lock"; break; | 1792 case lir_lock: s = "lock"; break; |
1768 case lir_unlock: s = "unlock"; break; | 1793 case lir_unlock: s = "unlock"; break; |
1769 // LIR_OpDelay | 1794 // LIR_OpDelay |
1770 case lir_delay_slot: s = "delay"; break; | 1795 case lir_delay_slot: s = "delay"; break; |
1813 dst_pos()->print(out); out->print(" "); | 1838 dst_pos()->print(out); out->print(" "); |
1814 length()->print(out); out->print(" "); | 1839 length()->print(out); out->print(" "); |
1815 tmp()->print(out); out->print(" "); | 1840 tmp()->print(out); out->print(" "); |
1816 } | 1841 } |
1817 | 1842 |
1843 // LIR_OpUpdateCRC32 | |
1844 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const { | |
1845 crc()->print(out); out->print(" "); | |
1846 val()->print(out); out->print(" "); | |
1847 result_opr()->print(out); out->print(" "); | |
1848 } | |
1849 | |
1818 // LIR_OpCompareAndSwap | 1850 // LIR_OpCompareAndSwap |
1819 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { | 1851 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { |
1820 addr()->print(out); out->print(" "); | 1852 addr()->print(out); out->print(" "); |
1821 cmp_value()->print(out); out->print(" "); | 1853 cmp_value()->print(out); out->print(" "); |
1822 new_value()->print(out); out->print(" "); | 1854 new_value()->print(out); out->print(" "); |