graal-jvmci-8: src/cpu/sparc/vm/frame

7083786: dead various dead chunks of code Reviewed-by: iveresov, kvn

comparison

equal deleted inserted replaced

-:a64d352d1118
+:c124e2e7463e
 interpreter_frame_extra_outgoing_argument_words = 2
 };
 #endif /* CC_INTERP */
-// the compiler frame has many of the same fields as the interpreter frame
-// %%%%% factor out declarations of the shared fields
 enum compiler_frame_fixed_locals {
-compiler_frame_d_scratch_fp_offset          = -2,
+compiler_frame_vm_locals_fp_offset          = -2
-compiler_frame_vm_locals_fp_offset          = -2, // should be same as above
-compiler_frame_vm_local_words = -compiler_frame_vm_locals_fp_offset
 };
 private:
 constantPoolCacheOop* interpreter_frame_cpoolcache_addr() const;
 return (intptr_t**)sp_addr_at(Lesp->sp_offset_in_saved_window());
 }
 inline void interpreter_frame_set_tos_address(intptr_t* x);
-// %%%%% Another idea: instead of defining 3 fns per item, just define one returning a ref
 // monitors:
 // next two fns read and write Lmonitors value,
 private:
 BasicObjectLock* interpreter_frame_monitors()           const  { return *interpreter_frame_monitors_addr(); }
 public:
 inline interpreterState get_interpreterState() const {
 return ((interpreterState)sp_at(interpreter_state_ptr_offset));
 }
 #endif /* CC_INTERP */
+public:
-// Compiled frames
-public:
-// Tells if this register can hold 64 bits on V9 (really, V8+).
-static bool holds_a_doubleword(Register reg) {
-#ifdef _LP64
-//    return true;
-return reg->is_out() || reg->is_global();
-#else
-return reg->is_out() || reg->is_global();
-#endif
-}
 #endif // CPU_SPARC_VM_FRAME_SPARC_HPP

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