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comparison src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp @ 1297:c466efa608d5

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6932496: c1: deoptimization of jsr subroutine fails on sparcv9 Summary: store jsr ret bci as intptr constant in c1 debug info Reviewed-by: never
author roland
date Fri, 05 Mar 2010 13:58:34 +0100
parents 3cf667df43ef
children fc2c71045ada
comparison
equal deleted inserted replaced
1296:d8e270c4f609 1297:c466efa608d5
1070 1070
1071 void LIR_Assembler::const2stack(LIR_Opr src, LIR_Opr dest) { 1071 void LIR_Assembler::const2stack(LIR_Opr src, LIR_Opr dest) {
1072 LIR_Const* c = src->as_constant_ptr(); 1072 LIR_Const* c = src->as_constant_ptr();
1073 switch (c->type()) { 1073 switch (c->type()) {
1074 case T_INT: 1074 case T_INT:
1075 case T_FLOAT: { 1075 case T_FLOAT:
1076 case T_ADDRESS: {
1076 Register src_reg = O7; 1077 Register src_reg = O7;
1077 int value = c->as_jint_bits(); 1078 int value = c->as_jint_bits();
1078 if (value == 0) { 1079 if (value == 0) {
1079 src_reg = G0; 1080 src_reg = G0;
1080 } else { 1081 } else {
1126 if (info != NULL) { 1127 if (info != NULL) {
1127 add_debug_info_for_null_check_here(info); 1128 add_debug_info_for_null_check_here(info);
1128 } 1129 }
1129 switch (c->type()) { 1130 switch (c->type()) {
1130 case T_INT: 1131 case T_INT:
1131 case T_FLOAT: { 1132 case T_FLOAT:
1133 case T_ADDRESS: {
1132 LIR_Opr tmp = FrameMap::O7_opr; 1134 LIR_Opr tmp = FrameMap::O7_opr;
1133 int value = c->as_jint_bits(); 1135 int value = c->as_jint_bits();
1134 if (value == 0) { 1136 if (value == 0) {
1135 tmp = FrameMap::G0_opr; 1137 tmp = FrameMap::G0_opr;
1136 } else if (Assembler::is_simm13(value)) { 1138 } else if (Assembler::is_simm13(value)) {
1198 LIR_Const* c = src->as_constant_ptr(); 1200 LIR_Const* c = src->as_constant_ptr();
1199 LIR_Opr to_reg = dest; 1201 LIR_Opr to_reg = dest;
1200 1202
1201 switch (c->type()) { 1203 switch (c->type()) {
1202 case T_INT: 1204 case T_INT:
1205 case T_ADDRESS:
1203 { 1206 {
1204 jint con = c->as_jint(); 1207 jint con = c->as_jint();
1205 if (to_reg->is_single_cpu()) { 1208 if (to_reg->is_single_cpu()) {
1206 assert(patch_code == lir_patch_none, "no patching handled here"); 1209 assert(patch_code == lir_patch_none, "no patching handled here");
1207 __ set(con, to_reg->as_register()); 1210 __ set(con, to_reg->as_register());