comparison src/cpu/sparc/vm/sparc.ad @ 14435:da862781b584

Merge
author kvn
date Thu, 21 Nov 2013 12:30:35 -0800
parents 044b28168e20 208ebea980f8
children 50fdb38839eb
comparison
equal deleted inserted replaced
14434:318d0622a6d7 14435:da862781b584
2922 2922
2923 // Strings might not be equal 2923 // Strings might not be equal
2924 __ bind(LSkip2); 2924 __ bind(LSkip2);
2925 } 2925 }
2926 2926
2927 // We have no guarantee that on 64 bit the higher half of limit_reg is 0
2928 __ signx(limit_reg);
2929
2927 __ subcc(limit_reg, 1 * sizeof(jchar), chr1_reg); 2930 __ subcc(limit_reg, 1 * sizeof(jchar), chr1_reg);
2928 __ br(Assembler::equal, true, Assembler::pn, Ldone); 2931 __ br(Assembler::equal, true, Assembler::pn, Ldone);
2929 __ delayed()->mov(O7, result_reg); // result is difference in lengths 2932 __ delayed()->mov(O7, result_reg); // result is difference in lengths
2930 2933
2931 // Shift str1_reg and str2_reg to the end of the arrays, negate limit 2934 // Shift str1_reg and str2_reg to the end of the arrays, negate limit
2978 2981
2979 //rename registers 2982 //rename registers
2980 Register limit_reg = cnt_reg; 2983 Register limit_reg = cnt_reg;
2981 Register chr1_reg = result_reg; 2984 Register chr1_reg = result_reg;
2982 Register chr2_reg = tmp1_reg; 2985 Register chr2_reg = tmp1_reg;
2986
2987 // We have no guarantee that on 64 bit the higher half of limit_reg is 0
2988 __ signx(limit_reg);
2983 2989
2984 //check for alignment and position the pointers to the ends 2990 //check for alignment and position the pointers to the ends
2985 __ or3(str1_reg, str2_reg, chr1_reg); 2991 __ or3(str1_reg, str2_reg, chr1_reg);
2986 __ andcc(chr1_reg, 0x3, chr1_reg); 2992 __ andcc(chr1_reg, 0x3, chr1_reg);
2987 // notZero means at least one not 4-byte aligned. 2993 // notZero means at least one not 4-byte aligned.