Mercurial > hg > graal-jvmci-8
comparison graal/com.oracle.max.cri/src/com/sun/cri/ci/CiArchitecture.java @ 3733:e233f5660da4
Added Java files from Maxine project.
author | Thomas Wuerthinger <thomas.wuerthinger@oracle.com> |
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date | Sat, 17 Dec 2011 19:59:18 +0100 |
parents | |
children | bc8527f3071c |
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3732:3e2e8b8abdaf | 3733:e233f5660da4 |
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1 /* | |
2 * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved. | |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA | |
20 * or visit www.oracle.com if you need additional information or have any | |
21 * questions. | |
22 */ | |
23 package com.sun.cri.ci; | |
24 | |
25 import java.util.*; | |
26 | |
27 import com.oracle.max.cri.intrinsics.*; | |
28 import com.sun.cri.ci.CiRegister.RegisterFlag; | |
29 | |
30 | |
31 /** | |
32 * Represents a CPU architecture, including information such as its endianness, CPU | |
33 * registers, word width, etc. | |
34 */ | |
35 public abstract class CiArchitecture { | |
36 | |
37 /** | |
38 * The endianness of the architecture. | |
39 */ | |
40 public static enum ByteOrder { | |
41 LittleEndian, | |
42 BigEndian | |
43 } | |
44 | |
45 /** | |
46 * The number of bits required in a bit map covering all the registers that may store references. | |
47 * The bit position of a register in the map is the register's {@linkplain CiRegister#number number}. | |
48 */ | |
49 public final int registerReferenceMapBitCount; | |
50 | |
51 /** | |
52 * Represents the natural size of words (typically registers and pointers) of this architecture, in bytes. | |
53 */ | |
54 public final int wordSize; | |
55 | |
56 /** | |
57 * The name of this architecture (e.g. "AMD64", "SPARCv9"). | |
58 */ | |
59 public final String name; | |
60 | |
61 /** | |
62 * Array of all available registers on this architecture. The index of each register in this | |
63 * array is equal to its {@linkplain CiRegister#number number}. | |
64 */ | |
65 public final CiRegister[] registers; | |
66 | |
67 /** | |
68 * Map of all registers keyed by their {@linkplain CiRegister#name names}. | |
69 */ | |
70 public final HashMap<String, CiRegister> registersByName; | |
71 | |
72 /** | |
73 * The byte ordering can be either little or big endian. | |
74 */ | |
75 public final ByteOrder byteOrder; | |
76 | |
77 /** | |
78 * Mask of the barrier constants defined in {@link MemoryBarriers} denoting the barriers that | |
79 * are not required to be explicitly inserted under this architecture. | |
80 */ | |
81 public final int implicitMemoryBarriers; | |
82 | |
83 /** | |
84 * Determines the barriers in a given barrier mask that are explicitly required on this architecture. | |
85 * | |
86 * @param barriers a mask of the barrier constants defined in {@link MemoryBarriers} | |
87 * @return the value of {@code barriers} minus the barriers unnecessary on this architecture | |
88 */ | |
89 public final int requiredBarriers(int barriers) { | |
90 return barriers & ~implicitMemoryBarriers; | |
91 } | |
92 | |
93 /** | |
94 * Offset in bytes from the beginning of a call instruction to the displacement. | |
95 */ | |
96 public final int machineCodeCallDisplacementOffset; | |
97 | |
98 /** | |
99 * The size of the return address pushed to the stack by a call instruction. | |
100 * A value of 0 denotes that call linkage uses registers instead (e.g. SPARC). | |
101 */ | |
102 public final int returnAddressSize; | |
103 | |
104 private final EnumMap<RegisterFlag, CiRegister[]> registersByTypeAndEncoding; | |
105 | |
106 /** | |
107 * Gets the register for a given {@linkplain CiRegister#encoding encoding} and type. | |
108 * | |
109 * @param encoding a register value as used in a machine instruction | |
110 * @param type the type of the register | |
111 */ | |
112 public CiRegister registerFor(int encoding, RegisterFlag type) { | |
113 CiRegister[] regs = registersByTypeAndEncoding.get(type); | |
114 assert encoding >= 0 && encoding < regs.length; | |
115 CiRegister reg = regs[encoding]; | |
116 assert reg != null; | |
117 return reg; | |
118 } | |
119 | |
120 protected CiArchitecture(String name, | |
121 int wordSize, | |
122 ByteOrder byteOrder, | |
123 CiRegister[] registers, | |
124 int implicitMemoryBarriers, | |
125 int nativeCallDisplacementOffset, | |
126 int registerReferenceMapBitCount, | |
127 int returnAddressSize) { | |
128 this.name = name; | |
129 this.registers = registers; | |
130 this.wordSize = wordSize; | |
131 this.byteOrder = byteOrder; | |
132 this.implicitMemoryBarriers = implicitMemoryBarriers; | |
133 this.machineCodeCallDisplacementOffset = nativeCallDisplacementOffset; | |
134 this.registerReferenceMapBitCount = registerReferenceMapBitCount; | |
135 this.returnAddressSize = returnAddressSize; | |
136 | |
137 registersByName = new HashMap<String, CiRegister>(registers.length); | |
138 for (CiRegister register : registers) { | |
139 registersByName.put(register.name, register); | |
140 assert registers[register.number] == register; | |
141 } | |
142 | |
143 registersByTypeAndEncoding = new EnumMap<CiRegister.RegisterFlag, CiRegister[]>(RegisterFlag.class); | |
144 EnumMap<RegisterFlag, CiRegister[]> categorizedRegs = CiRegister.categorize(registers); | |
145 for (RegisterFlag type : RegisterFlag.values()) { | |
146 CiRegister[] regs = categorizedRegs.get(type); | |
147 int max = CiRegister.maxRegisterEncoding(regs); | |
148 CiRegister[] regsByEnc = new CiRegister[max + 1]; | |
149 for (CiRegister reg : regs) { | |
150 regsByEnc[reg.encoding] = reg; | |
151 } | |
152 registersByTypeAndEncoding.put(type, regsByEnc); | |
153 } | |
154 } | |
155 | |
156 /** | |
157 * Converts this architecture to a string. | |
158 * @return the string representation of this architecture | |
159 */ | |
160 @Override | |
161 public final String toString() { | |
162 return name.toLowerCase(); | |
163 } | |
164 | |
165 /** | |
166 * Checks whether this is a 32-bit architecture. | |
167 * @return {@code true} if this architecture is 32-bit | |
168 */ | |
169 public final boolean is32bit() { | |
170 return wordSize == 4; | |
171 } | |
172 | |
173 /** | |
174 * Checks whether this is a 64-bit architecture. | |
175 * @return {@code true} if this architecture is 64-bit | |
176 */ | |
177 public final boolean is64bit() { | |
178 return wordSize == 8; | |
179 } | |
180 | |
181 // The following methods are architecture specific and not dependent on state | |
182 // stored in this class. They have convenient default implementations. | |
183 | |
184 /** | |
185 * Checks whether this architecture's normal arithmetic instructions use a two-operand form | |
186 * (e.g. x86 which overwrites one operand register with the result when adding). | |
187 * @return {@code true} if this architecture uses two-operand mode | |
188 */ | |
189 public boolean twoOperandMode() { | |
190 return false; | |
191 } | |
192 | |
193 // TODO: Why enumerate the concrete subclasses here rather | |
194 // than use instanceof comparisons in code that cares? | |
195 | |
196 /** | |
197 * Checks whether the architecture is x86. | |
198 * @return {@code true} if the architecture is x86 | |
199 */ | |
200 public boolean isX86() { | |
201 return false; | |
202 } | |
203 | |
204 /** | |
205 * Checks whether the architecture is SPARC. | |
206 * @return {@code true} if the architecture is SPARC | |
207 */ | |
208 public boolean isSPARC() { | |
209 return false; | |
210 } | |
211 | |
212 } |