Mercurial > hg > graal-jvmci-8
comparison src/cpu/x86/vm/c1_LIRAssembler_x86.cpp @ 1579:e9ff18c4ace7
Merge
author | jrose |
---|---|
date | Wed, 02 Jun 2010 22:45:42 -0700 |
parents | c18cbe5936b8 87fc6aca31ab |
children | d5d065957597 |
comparison
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1562:dfe27f03244a | 1579:e9ff18c4ace7 |
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2460 break; | 2460 break; |
2461 default: ShouldNotReachHere(); | 2461 default: ShouldNotReachHere(); |
2462 } | 2462 } |
2463 #endif // _LP64 | 2463 #endif // _LP64 |
2464 } else { | 2464 } else { |
2465 #ifdef _LP64 | |
2466 Register r_lo; | |
2467 if (right->type() == T_OBJECT || right->type() == T_ARRAY) { | |
2468 r_lo = right->as_register(); | |
2469 } else { | |
2470 r_lo = right->as_register_lo(); | |
2471 } | |
2472 #else | |
2465 Register r_lo = right->as_register_lo(); | 2473 Register r_lo = right->as_register_lo(); |
2466 Register r_hi = right->as_register_hi(); | 2474 Register r_hi = right->as_register_hi(); |
2467 assert(l_lo != r_hi, "overwriting registers"); | 2475 assert(l_lo != r_hi, "overwriting registers"); |
2476 #endif | |
2468 switch (code) { | 2477 switch (code) { |
2469 case lir_logic_and: | 2478 case lir_logic_and: |
2470 __ andptr(l_lo, r_lo); | 2479 __ andptr(l_lo, r_lo); |
2471 NOT_LP64(__ andptr(l_hi, r_hi);) | 2480 NOT_LP64(__ andptr(l_hi, r_hi);) |
2472 break; | 2481 break; |
2782 | 2791 |
2783 void LIR_Assembler::call(LIR_OpJavaCall* op, relocInfo::relocType rtype) { | 2792 void LIR_Assembler::call(LIR_OpJavaCall* op, relocInfo::relocType rtype) { |
2784 assert(!os::is_MP() || (__ offset() + NativeCall::displacement_offset) % BytesPerWord == 0, | 2793 assert(!os::is_MP() || (__ offset() + NativeCall::displacement_offset) % BytesPerWord == 0, |
2785 "must be aligned"); | 2794 "must be aligned"); |
2786 __ call(AddressLiteral(op->addr(), rtype)); | 2795 __ call(AddressLiteral(op->addr(), rtype)); |
2787 add_call_info(code_offset(), op->info(), op->is_method_handle_invoke()); | 2796 add_call_info(code_offset(), op->info()); |
2788 } | 2797 } |
2789 | 2798 |
2790 | 2799 |
2791 void LIR_Assembler::ic_call(LIR_OpJavaCall* op) { | 2800 void LIR_Assembler::ic_call(LIR_OpJavaCall* op) { |
2792 RelocationHolder rh = virtual_call_Relocation::spec(pc()); | 2801 RelocationHolder rh = virtual_call_Relocation::spec(pc()); |
2793 __ movoop(IC_Klass, (jobject)Universe::non_oop_word()); | 2802 __ movoop(IC_Klass, (jobject)Universe::non_oop_word()); |
2794 assert(!os::is_MP() || | 2803 assert(!os::is_MP() || |
2795 (__ offset() + NativeCall::displacement_offset) % BytesPerWord == 0, | 2804 (__ offset() + NativeCall::displacement_offset) % BytesPerWord == 0, |
2796 "must be aligned"); | 2805 "must be aligned"); |
2797 __ call(AddressLiteral(op->addr(), rh)); | 2806 __ call(AddressLiteral(op->addr(), rh)); |
2798 add_call_info(code_offset(), op->info(), op->is_method_handle_invoke()); | 2807 add_call_info(code_offset(), op->info()); |
2799 } | 2808 } |
2800 | 2809 |
2801 | 2810 |
2802 /* Currently, vtable-dispatch is only enabled for sparc platforms */ | 2811 /* Currently, vtable-dispatch is only enabled for sparc platforms */ |
2803 void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) { | 2812 void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) { |
2804 ShouldNotReachHere(); | 2813 ShouldNotReachHere(); |
2805 } | |
2806 | |
2807 | |
2808 void LIR_Assembler::preserve_SP(LIR_OpJavaCall* op) { | |
2809 __ movptr(FrameMap::method_handle_invoke_SP_save_opr()->as_register(), rsp); | |
2810 } | |
2811 | |
2812 | |
2813 void LIR_Assembler::restore_SP(LIR_OpJavaCall* op) { | |
2814 __ movptr(rsp, FrameMap::method_handle_invoke_SP_save_opr()->as_register()); | |
2815 } | 2814 } |
2816 | 2815 |
2817 | 2816 |
2818 void LIR_Assembler::emit_static_call_stub() { | 2817 void LIR_Assembler::emit_static_call_stub() { |
2819 address call_pc = __ pc(); | 2818 address call_pc = __ pc(); |