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comparison src/cpu/sparc/vm/assembler_sparc.hpp @ 362:f8199438385b

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Merge
author apetrusenko
date Wed, 17 Sep 2008 16:49:18 +0400
parents 1ee8caae33af
children a1980da045cc
comparison
equal deleted inserted replaced
316:5fa96a5a7e76 362:f8199438385b
1437 inline void rett( Register s1, int simm13a, relocInfo::relocType rt = relocInfo::none); 1437 inline void rett( Register s1, int simm13a, relocInfo::relocType rt = relocInfo::none);
1438 1438
1439 // pp 214 1439 // pp 214
1440 1440
1441 void save( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | rs2(s2) ); } 1441 void save( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | rs2(s2) ); }
1442 void save( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } 1442 void save( Register s1, int simm13a, Register d ) {
1443 // make sure frame is at least large enough for the register save area
1444 assert(-simm13a >= 16 * wordSize, "frame too small");
1445 emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) );
1446 }
1443 1447
1444 void restore( Register s1 = G0, Register s2 = G0, Register d = G0 ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | rs2(s2) ); } 1448 void restore( Register s1 = G0, Register s2 = G0, Register d = G0 ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | rs2(s2) ); }
1445 void restore( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } 1449 void restore( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
1446 1450
1447 // pp 216 1451 // pp 216
1592 u_field(1, 13, 13) | 1596 u_field(1, 13, 13) |
1593 simm(simm13a, 13)); } 1597 simm(simm13a, 13)); }
1594 inline void wrasi( Register d) { v9_only(); emit_long( op(arith_op) | rs1(d) | op3(wrreg_op3) | u_field(3, 29, 25)); } 1598 inline void wrasi( Register d) { v9_only(); emit_long( op(arith_op) | rs1(d) | op3(wrreg_op3) | u_field(3, 29, 25)); }
1595 inline void wrfprs( Register d) { v9_only(); emit_long( op(arith_op) | rs1(d) | op3(wrreg_op3) | u_field(6, 29, 25)); } 1599 inline void wrfprs( Register d) { v9_only(); emit_long( op(arith_op) | rs1(d) | op3(wrreg_op3) | u_field(6, 29, 25)); }
1596 1600
1601 // For a given register condition, return the appropriate condition code
1602 // Condition (the one you would use to get the same effect after "tst" on
1603 // the target register.)
1604 Assembler::Condition reg_cond_to_cc_cond(RCondition in);
1605
1597 1606
1598 // Creation 1607 // Creation
1599 Assembler(CodeBuffer* code) : AbstractAssembler(code) { 1608 Assembler(CodeBuffer* code) : AbstractAssembler(code) {
1600 #ifdef CHECK_DELAY 1609 #ifdef CHECK_DELAY
1601 delay_state = no_delay; 1610 delay_state = no_delay;
1628 // gen asm code to save regs 1637 // gen asm code to save regs
1629 static void save_registers(MacroAssembler* a); 1638 static void save_registers(MacroAssembler* a);
1630 1639
1631 // restore global registers in case C code disturbed them 1640 // restore global registers in case C code disturbed them
1632 static void restore_registers(MacroAssembler* a, Register r); 1641 static void restore_registers(MacroAssembler* a, Register r);
1642
1643
1633 }; 1644 };
1634 1645
1635 1646
1636 // MacroAssembler extends Assembler by a few frequently used macros. 1647 // MacroAssembler extends Assembler by a few frequently used macros.
1637 // 1648 //
1720 // Compares a pointer register with zero and branches on (not)null. 1731 // Compares a pointer register with zero and branches on (not)null.
1721 // Does a test & branch on 32-bit systems and a register-branch on 64-bit. 1732 // Does a test & branch on 32-bit systems and a register-branch on 64-bit.
1722 void br_null ( Register s1, bool a, Predict p, Label& L ); 1733 void br_null ( Register s1, bool a, Predict p, Label& L );
1723 void br_notnull( Register s1, bool a, Predict p, Label& L ); 1734 void br_notnull( Register s1, bool a, Predict p, Label& L );
1724 1735
1736 // These versions will do the most efficient thing on v8 and v9. Perhaps
1737 // this is what the routine above was meant to do, but it didn't (and
1738 // didn't cover both target address kinds.)
1739 void br_on_reg_cond( RCondition c, bool a, Predict p, Register s1, address d, relocInfo::relocType rt = relocInfo::none );
1740 void br_on_reg_cond( RCondition c, bool a, Predict p, Register s1, Label& L);
1741
1725 inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none ); 1742 inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
1726 inline void bp( Condition c, bool a, CC cc, Predict p, Label& L ); 1743 inline void bp( Condition c, bool a, CC cc, Predict p, Label& L );
1727 1744
1728 // Branch that tests xcc in LP64 and icc in !LP64 1745 // Branch that tests xcc in LP64 and icc in !LP64
1729 inline void brx( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none ); 1746 inline void brx( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
2054 void read_ccr_v8_assert(Register ccr_save); 2071 void read_ccr_v8_assert(Register ccr_save);
2055 void write_ccr_v8_assert(Register ccr_save); 2072 void write_ccr_v8_assert(Register ccr_save);
2056 #endif // ASSERT 2073 #endif // ASSERT
2057 2074
2058 public: 2075 public:
2059 // Stores 2076
2060 void store_check(Register tmp, Register obj); // store check for obj - register is destroyed afterwards 2077 // Write to card table for - register is destroyed afterwards.
2061 void store_check(Register tmp, Register obj, Register offset); // store check for obj - register is destroyed afterwards 2078 void card_table_write(jbyte* byte_map_base, Register tmp, Register obj);
2079
2080 void card_write_barrier_post(Register store_addr, Register new_val, Register tmp);
2081
2082 #ifndef SERIALGC
2083 // Array store and offset
2084 void g1_write_barrier_pre(Register obj, Register index, int offset, Register tmp, bool preserve_o_regs);
2085
2086 void g1_write_barrier_post(Register store_addr, Register new_val, Register tmp);
2087
2088 // May do filtering, depending on the boolean arguments.
2089 void g1_card_table_write(jbyte* byte_map_base,
2090 Register tmp, Register obj, Register new_val,
2091 bool region_filter, bool null_filter);
2092 #endif // SERIALGC
2062 2093
2063 // pushes double TOS element of FPU stack on CPU stack; pops from FPU stack 2094 // pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
2064 void push_fTOS(); 2095 void push_fTOS();
2065 2096
2066 // pops double TOS element from CPU stack and pushes on FPU stack 2097 // pops double TOS element from CPU stack and pushes on FPU stack