diff src/cpu/x86/vm/assembler_x86.cpp @ 2479:15c9a0e16269

7035713: 3DNow Prefetch Instruction Support Summary: The upcoming processors from AMD are the first that support 3dnow prefetch without supporting the 3dnow instruction set. Reviewed-by: kvn Contributed-by: tom.deneau@amd.com
author kvn
date Mon, 11 Apr 2011 15:30:31 -0700
parents d86923d96dca
children 0654ee04b214 732454aaf5cb
line wrap: on
line diff
--- a/src/cpu/x86/vm/assembler_x86.cpp	Sat Apr 09 22:55:25 2011 -0700
+++ b/src/cpu/x86/vm/assembler_x86.cpp	Mon Apr 11 15:30:31 2011 -0700
@@ -2317,7 +2317,7 @@
 }
 
 void Assembler::prefetchr(Address src) {
-  NOT_LP64(assert(VM_Version::supports_3dnow(), "must support"));
+  NOT_LP64(assert(VM_Version::supports_3dnow_prefetch(), "must support"));
   InstructionMark im(this);
   prefetch_prefix(src);
   emit_byte(0x0D);
@@ -2349,7 +2349,7 @@
 }
 
 void Assembler::prefetchw(Address src) {
-  NOT_LP64(assert(VM_Version::supports_3dnow(), "must support"));
+  NOT_LP64(assert(VM_Version::supports_3dnow_prefetch(), "must support"));
   InstructionMark im(this);
   prefetch_prefix(src);
   emit_byte(0x0D);