Mercurial > hg > graal-jvmci-8
diff src/os_cpu/solaris_sparc/vm/assembler_solaris_sparc.cpp @ 237:1fdb98a17101
6716785: implicit null checks not triggering with CompressedOops
Summary: allocate alignment-sized page(s) below java heap so that memory accesses at heap_base+1page give signal and cause an implicit null check
Reviewed-by: kvn, jmasa, phh, jcoomes
| author | coleenp |
|---|---|
| date | Sat, 19 Jul 2008 17:38:22 -0400 |
| parents | a61af66fc99e |
| children | 9ee9cf798b59 |
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--- a/src/os_cpu/solaris_sparc/vm/assembler_solaris_sparc.cpp Fri Jul 11 01:14:44 2008 -0700 +++ b/src/os_cpu/solaris_sparc/vm/assembler_solaris_sparc.cpp Sat Jul 19 17:38:22 2008 -0400 @@ -28,18 +28,6 @@ #include <sys/trap.h> // For trap numbers #include <v9/sys/psr_compat.h> // For V8 compatibility -bool MacroAssembler::needs_explicit_null_check(intptr_t offset) { - // The first page of virtual addresses is unmapped on SPARC. - // Thus, any access the VM makes through a null pointer with an offset of - // less than 4K will get a recognizable SIGSEGV, which the signal handler - // will transform into a NullPointerException. - // (Actually, the first 64K or so is unmapped, but it's simpler - // to depend only on the first 4K or so.) - - bool offset_in_first_page = 0 <= offset && offset < os::vm_page_size(); - return !offset_in_first_page; -} - void MacroAssembler::read_ccr_trap(Register ccr_save) { // Execute a trap to get the PSR, mask and shift // to get the condition codes.