Mercurial > hg > graal-jvmci-8
diff src/cpu/sparc/vm/nativeInst_sparc.hpp @ 22690:3da4f19cf93b
Implement inline metaspace constant patching for SPARC (Compressed/Uncompressed)
author | Stefan Anzinger <stefan.anzinger@oracle.com> |
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date | Fri, 16 Oct 2015 14:06:20 +0200 |
parents | 89152779163c |
children |
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--- a/src/cpu/sparc/vm/nativeInst_sparc.hpp Fri Oct 16 13:44:47 2015 +0200 +++ b/src/cpu/sparc/vm/nativeInst_sparc.hpp Fri Oct 16 14:06:20 2015 +0200 @@ -520,6 +520,46 @@ #endif // _LP64 +// An interface for accessing/manipulating 32 bit native set_metadata imm, reg instructions +// (used to manipulate inlined data references, etc.) +// set_metadata imm, reg +// == sethi %hi22(imm), reg ; add reg, %lo10(imm), reg +class NativeMovConstReg32; +inline NativeMovConstReg32* nativeMovConstReg32_at(address address); +class NativeMovConstReg32: public NativeInstruction { + public: + enum Sparc_specific_constants { + sethi_offset = 0, + add_offset = 4, + instruction_size = 8 + }; + + address instruction_address() const { return addr_at(0); } + address next_instruction_address() const { return addr_at(instruction_size); } + + // (The [set_]data accessor respects oop_type relocs also.) + intptr_t data() const; + void set_data(intptr_t x); + + // report the destination register + Register destination() { return inv_rd(long_at(sethi_offset)); } + + void verify(); + void print(); + + // unit test stuff + static void test(); + + // Creation + friend inline NativeMovConstReg32* nativeMovConstReg32_at(address address) { + NativeMovConstReg32* test = (NativeMovConstReg32*)address; + #ifdef ASSERT + test->verify(); + #endif + return test; + } +}; + // An interface for accessing/manipulating native set_metadata imm, reg instructions. // (used to manipulate inlined data references, etc.) // set_metadata imm, reg