Mercurial > hg > graal-jvmci-8
diff src/cpu/sparc/vm/macroAssembler_sparc.cpp @ 12835:69944b868a32
8014555: G1: Memory ordering problem with Conc refinement and card marking
Summary: Add a StoreLoad barrier in the G1 post-barrier to fix a race with concurrent refinement. Also-reviewed-by: martin.doerr@sap.com
Reviewed-by: iveresov, tschatzl, brutisso, roland, kvn
author | mgerdin |
---|---|
date | Tue, 08 Oct 2013 17:35:51 +0200 |
parents | 7944aba7ba41 |
children | 252d541466ea 209aa13ab8c0 |
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--- a/src/cpu/sparc/vm/macroAssembler_sparc.cpp Fri Oct 04 13:33:02 2013 +0200 +++ b/src/cpu/sparc/vm/macroAssembler_sparc.cpp Tue Oct 08 17:35:51 2013 +0200 @@ -3752,7 +3752,7 @@ #define __ masm. address start = __ pc(); - Label not_already_dirty, restart, refill; + Label not_already_dirty, restart, refill, young_card; #ifdef _LP64 __ srlx(O0, CardTableModRefBS::card_shift, O0); @@ -3763,9 +3763,15 @@ __ set(addrlit, O1); // O1 := <card table base> __ ldub(O0, O1, O2); // O2 := [O0 + O1] + __ cmp_and_br_short(O2, G1SATBCardTableModRefBS::g1_young_card_val(), Assembler::equal, Assembler::pt, young_card); + + __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); + __ ldub(O0, O1, O2); // O2 := [O0 + O1] + assert(CardTableModRefBS::dirty_card_val() == 0, "otherwise check this code"); __ cmp_and_br_short(O2, G0, Assembler::notEqual, Assembler::pt, not_already_dirty); + __ bind(young_card); // We didn't take the branch, so we're already dirty: return. // Use return-from-leaf __ retl();