Mercurial > hg > graal-jvmci-8

diff src/cpu/x86/vm/x86.ad @ 6183:6f8f439e247d

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
7177923: SIGBUS on sparc in compiled code for java.util.Calendar.clear() Summary: disable vectorization of a memory access with more elements per vector than one which is used for alignment on sparc Reviewed-by: twisti
author kvn
date Tue, 19 Jun 2012 15:12:56 -0700
parents 8c92982cbbc4
children 2c368ea3e844
line wrap: on
line diff
--- a/src/cpu/x86/vm/x86.ad	Mon Jun 18 15:17:30 2012 -0700
+++ b/src/cpu/x86/vm/x86.ad	Tue Jun 19 15:12:56 2012 -0700
@@ -2061,7 +2061,7 @@
 // Integer could be loaded into xmm register directly from memory.
 instruct Repl2I_mem(vecD dst, memory mem) %{
   predicate(n->as_Vector()->length() == 2);
-  match(Set dst (ReplicateI mem));
+  match(Set dst (ReplicateI (LoadVector mem)));
   format %{ "movd    $dst,$mem\n\t"
             "pshufd  $dst,$dst,0x00\t! replicate2I" %}
   ins_encode %{
@@ -2073,7 +2073,7 @@
 
 instruct Repl4I_mem(vecX dst, memory mem) %{
   predicate(n->as_Vector()->length() == 4);
-  match(Set dst (ReplicateI mem));
+  match(Set dst (ReplicateI (LoadVector mem)));
   format %{ "movd    $dst,$mem\n\t"
             "pshufd  $dst,$dst,0x00\t! replicate4I" %}
   ins_encode %{
@@ -2085,7 +2085,7 @@
 
 instruct Repl8I_mem(vecY dst, memory mem) %{
   predicate(n->as_Vector()->length() == 8);
-  match(Set dst (ReplicateI mem));
+  match(Set dst (ReplicateI (LoadVector mem)));
   format %{ "movd    $dst,$mem\n\t"
             "pshufd  $dst,$dst,0x00\n\t"
             "vinsertf128h $dst,$dst,$dst\t! replicate8I" %}
@@ -2225,7 +2225,7 @@
 // Long could be loaded into xmm register directly from memory.
 instruct Repl2L_mem(vecX dst, memory mem) %{
   predicate(n->as_Vector()->length() == 2);
-  match(Set dst (ReplicateL mem));
+  match(Set dst (ReplicateL (LoadVector mem)));
   format %{ "movq    $dst,$mem\n\t"
             "movlhps $dst,$dst\t! replicate2L" %}
   ins_encode %{
@@ -2237,7 +2237,7 @@
 
 instruct Repl4L_mem(vecY dst, memory mem) %{
   predicate(n->as_Vector()->length() == 4);
-  match(Set dst (ReplicateL mem));
+  match(Set dst (ReplicateL (LoadVector mem)));
   format %{ "movq    $dst,$mem\n\t"
             "movlhps $dst,$dst\n\t"
             "vinsertf128h $dst,$dst,$dst\t! replicate4L" %}