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diff src/cpu/x86/vm/vm_version_x86_32.cpp @ 219:ab65a4c9b2e8

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6708714: Optimize long LShift on 32-bits x86 Summary: For small (1-3 bits) left long shifts in 32-bits VM use sets of add+addc instructions instead of shld+shl on new AMD cpus. Reviewed-by: never Contributed-by: shrinivas.joshi@amd.com
author kvn
date Mon, 23 Jun 2008 14:11:12 -0700
parents 3d62cb85208d
children 9c2ecc2ffb12
line wrap: on
line diff
--- a/src/cpu/x86/vm/vm_version_x86_32.cpp	Sat Jun 21 10:03:31 2008 -0700
+++ b/src/cpu/x86/vm/vm_version_x86_32.cpp	Mon Jun 23 14:11:12 2008 -0700
@@ -307,6 +307,10 @@
       // Use it on new AMD cpus starting from Opteron.
       UseAddressNop = true;
     }
+    if( supports_sse2() && FLAG_IS_DEFAULT(UseNewLongLShift) ) {
+      // Use it on new AMD cpus starting from Opteron.
+      UseNewLongLShift = true;
+    }
     if( FLAG_IS_DEFAULT(UseXmmLoadAndClearUpper) ) {
       if( supports_sse4a() ) {
         UseXmmLoadAndClearUpper = true; // use movsd only on '10h' Opteron