diff src/cpu/x86/vm/c1_Defs_x86.hpp @ 2002:ac637b7220d1

6985015: C1 needs to support compressed oops Summary: This change implements compressed oops for C1 for x64 and sparc. The changes are mostly on the codegen level, with a few exceptions when we do access things outside of the heap that are uncompressed from the IR. Compressed oops are now also enabled with tiered. Reviewed-by: twisti, kvn, never, phh
author iveresov
date Tue, 30 Nov 2010 23:23:40 -0800
parents f95d63e2154a
children
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line diff
--- a/src/cpu/x86/vm/c1_Defs_x86.hpp	Tue Nov 23 13:22:55 2010 -0800
+++ b/src/cpu/x86/vm/c1_Defs_x86.hpp	Tue Nov 30 23:23:40 2010 -0800
@@ -61,8 +61,8 @@
   pd_nof_xmm_regs_linearscan = pd_nof_xmm_regs_frame_map, // number of registers visible to linear scan
   pd_first_cpu_reg = 0,
   pd_last_cpu_reg = NOT_LP64(5) LP64_ONLY(11),
-  pd_first_byte_reg = 2,
-  pd_last_byte_reg = 5,
+  pd_first_byte_reg = NOT_LP64(2) LP64_ONLY(0),
+  pd_last_byte_reg = NOT_LP64(5) LP64_ONLY(11),
   pd_first_fpu_reg = pd_nof_cpu_regs_frame_map,
   pd_last_fpu_reg =  pd_first_fpu_reg + 7,
   pd_first_xmm_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map,