Mercurial > hg > graal-jvmci-8
diff src/cpu/sparc/vm/c1_CodeStubs_sparc.cpp @ 1848:c393f046f4c5
6991512: G1 barriers fail with 64bit C1
Summary: Fix compare-and-swap intrinsic problem with G1 post-barriers and issue with branch ranges in G1 stubs on sparc
Reviewed-by: never, kvn
author | iveresov |
---|---|
date | Tue, 12 Oct 2010 23:51:20 -0700 |
parents | f02a8bbe6ed4 |
children | f95d63e2154a |
line wrap: on
line diff
--- a/src/cpu/sparc/vm/c1_CodeStubs_sparc.cpp Tue Oct 12 02:21:06 2010 -0700 +++ b/src/cpu/sparc/vm/c1_CodeStubs_sparc.cpp Tue Oct 12 23:51:20 2010 -0700 @@ -425,8 +425,13 @@ Register pre_val_reg = pre_val()->as_register(); ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false); - __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pt, - pre_val_reg, _continuation); + if (__ is_in_wdisp16_range(_continuation)) { + __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pt, + pre_val_reg, _continuation); + } else { + __ cmp(pre_val_reg, G0); + __ brx(Assembler::equal, false, Assembler::pn, _continuation); + } __ delayed()->nop(); __ call(Runtime1::entry_for(Runtime1::Runtime1::g1_pre_barrier_slow_id)); @@ -452,8 +457,13 @@ assert(new_val()->is_register(), "Precondition."); Register addr_reg = addr()->as_pointer_register(); Register new_val_reg = new_val()->as_register(); - __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pt, - new_val_reg, _continuation); + if (__ is_in_wdisp16_range(_continuation)) { + __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pt, + new_val_reg, _continuation); + } else { + __ cmp(new_val_reg, G0); + __ brx(Assembler::equal, false, Assembler::pn, _continuation); + } __ delayed()->nop(); __ call(Runtime1::entry_for(Runtime1::Runtime1::g1_post_barrier_slow_id));