Mercurial > hg > graal-jvmci-8
diff src/share/vm/opto/coalesce.cpp @ 1730:f55c4f82ab9d
6978249: spill between cpu and fpu registers when those moves are fast
Reviewed-by: kvn
author | never |
---|---|
date | Thu, 19 Aug 2010 14:51:47 -0700 |
parents | c18cbe5936b8 |
children | f95d63e2154a |
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--- a/src/share/vm/opto/coalesce.cpp Wed Aug 18 01:22:16 2010 -0700 +++ b/src/share/vm/opto/coalesce.cpp Thu Aug 19 14:51:47 2010 -0700 @@ -780,6 +780,14 @@ // Number of bits free uint rm_size = rm.Size(); + if (UseFPUForSpilling && rm.is_AllStack() ) { + // Don't coalesce when frequency difference is large + Block *dst_b = _phc._cfg._bbs[dst_copy->_idx]; + Block *src_def_b = _phc._cfg._bbs[src_def->_idx]; + if (src_def_b->_freq > 10*dst_b->_freq ) + return false; + } + // If we can use any stack slot, then effective size is infinite if( rm.is_AllStack() ) rm_size += 1000000; // Incompatible masks, no way to coalesce