Mercurial > hg > graal-jvmci-8
view graal/com.oracle.graal.snippets/src/com/oracle/graal/snippets/target/amd64/AMD64BitScanOp.java @ 5874:f0d4304243ff
Add intrinsics for (Long|Integer).(reverseBytes|numberOf(Trail|Lead)ingZeros)
Add tests for those methods
author | Gilles Duboscq <duboscq@ssw.jku.at> |
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date | Tue, 24 Jul 2012 17:32:42 +0200 |
parents | |
children | 000fb0550afe |
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/* * Copyright (c) 2012, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. */ package com.oracle.graal.snippets.target.amd64; import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.lir.amd64.*; import com.oracle.graal.lir.asm.*; import com.oracle.max.asm.target.amd64.*; public class AMD64BitScanOp extends AMD64LIRInstruction { public enum IntrinsicOpcode { BSF, BSR; } @Opcode private final IntrinsicOpcode opcode; @Def protected Value result; @Use({OperandFlag.REG, OperandFlag.ADDR}) protected Value input; public AMD64BitScanOp(IntrinsicOpcode opcode, Value result, Value input) { this.opcode = opcode; this.result = result; this.input = input; } @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { switch(opcode) { case BSF: if (ValueUtil.isAddress(input)) { masm.bsfq(ValueUtil.asIntReg(result), ValueUtil.asAddress(input)); } else { masm.bsfq(ValueUtil.asIntReg(result), ValueUtil.asRegister(input)); } break; case BSR: if (ValueUtil.isAddress(input)) { masm.bsrq(ValueUtil.asIntReg(result), ValueUtil.asAddress(input)); } else { masm.bsrq(ValueUtil.asIntReg(result), ValueUtil.asRegister(input)); } break; } } }