# HG changeset patch
# User zmajo
# Date 1422610808 -3600
# Node ID 11b575a5169b499551ea93ab581c21aa0df1baaf
# Parent  d9c03a9ead9666a16fa44a74179264c97cbe3a48
8071818: Incorrect addressing mode used for ldf in SPARC assembler
Summary: Update MacroAssembler::ldf to select addressing mode depending on Address parameter.
Reviewed-by: kvn, dlong

diff -r d9c03a9ead96 -r 11b575a5169b src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp
--- a/src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp	Wed Jan 28 21:43:06 2015 +0000
+++ b/src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp	Fri Jan 30 10:40:08 2015 +0100
@@ -630,7 +630,12 @@
 
 inline void MacroAssembler::ldf(FloatRegisterImpl::Width w, const Address& a, FloatRegister d, int offset) {
   relocate(a.rspec(offset));
-  ldf(w, a.base(), a.disp() + offset, d);
+  if (a.has_index()) {
+    assert(offset == 0, "");
+    ldf(w, a.base(), a.index(), d);
+  } else {
+    ldf(w, a.base(), a.disp() + offset, d);
+  }
 }
 
 // returns if membar generates anything, obviously this code should mirror