# HG changeset patch
# User Doug Simon <doug.simon@oracle.com>
# Date 1369601363 -7200
# Node ID 26a4433252a301e89cc36c6870102dda7d686e02
# Parent  cff647969dfa7b9436429cc65729d72f295f1912
fixed Checkstyle errors

diff -r cff647969dfa -r 26a4433252a3 graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java	Sun May 26 22:48:43 2013 +0200
+++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java	Sun May 26 22:49:23 2013 +0200
@@ -57,25 +57,84 @@
 import com.oracle.graal.lir.asm.TargetMethodAssembler;
 
 public enum SPARCArithmetic {
-    IADD, ISUB, IMUL, IDIV, IDIVREM, IREM, IUDIV, IUREM, IAND, IOR, IXOR, ISHL, ISHR, IUSHR,
-    LADD, LSUB, LMUL, LDIV, LDIVREM, LREM, LUDIV, LUREM, LAND, LOR, LXOR, LSHL, LSHR, LUSHR,
-    FADD, FSUB, FMUL, FDIV, FREM, FAND, FOR, FXOR, DADD, DSUB, DMUL, DDIV, DREM, DAND, DOR, DXOR,
-    INEG, LNEG, FNEG, DNEG, I2L, L2I, I2B, I2C, I2S, F2D, D2F, I2F, I2D, F2I, D2I, L2F, L2D, F2L, D2L,
-    MOV_I2F, MOV_L2D, MOV_F2I, MOV_D2L;
+    IADD,
+    ISUB,
+    IMUL,
+    IDIV,
+    IDIVREM,
+    IREM,
+    IUDIV,
+    IUREM,
+    IAND,
+    IOR,
+    IXOR,
+    ISHL,
+    ISHR,
+    IUSHR,
+    LADD,
+    LSUB,
+    LMUL,
+    LDIV,
+    LDIVREM,
+    LREM,
+    LUDIV,
+    LUREM,
+    LAND,
+    LOR,
+    LXOR,
+    LSHL,
+    LSHR,
+    LUSHR,
+    FADD,
+    FSUB,
+    FMUL,
+    FDIV,
+    FREM,
+    FAND,
+    FOR,
+    FXOR,
+    DADD,
+    DSUB,
+    DMUL,
+    DDIV,
+    DREM,
+    DAND,
+    DOR,
+    DXOR,
+    INEG,
+    LNEG,
+    FNEG,
+    DNEG,
+    I2L,
+    L2I,
+    I2B,
+    I2C,
+    I2S,
+    F2D,
+    D2F,
+    I2F,
+    I2D,
+    F2I,
+    D2I,
+    L2F,
+    L2D,
+    F2L,
+    D2L,
+    MOV_I2F,
+    MOV_L2D,
+    MOV_F2I,
+    MOV_D2L;
 
     /**
      * Unary operation with separate source and destination operand.
      */
     public static class Unary2Op extends SPARCLIRInstruction {
-        @Opcode
-        private final SPARCArithmetic opcode;
-        @Def({ REG })
-        protected AllocatableValue result;
-        @Use({ REG, STACK })
-        protected AllocatableValue x;
 
-        public Unary2Op(SPARCArithmetic opcode, AllocatableValue result,
-                AllocatableValue x) {
+        @Opcode private final SPARCArithmetic opcode;
+        @Def({REG}) protected AllocatableValue result;
+        @Use({REG, STACK}) protected AllocatableValue x;
+
+        public Unary2Op(SPARCArithmetic opcode, AllocatableValue result, AllocatableValue x) {
             this.opcode = opcode;
             this.result = result;
             this.x = x;
@@ -92,15 +151,12 @@
      * Unary operation with single operand for source and destination.
      */
     public static class Unary1Op extends SPARCLIRInstruction {
-        @Opcode
-        private final SPARCArithmetic opcode;
-        @Def({ REG, HINT })
-        protected AllocatableValue result;
-        @Use({ REG, STACK })
-        protected AllocatableValue x;
 
-        public Unary1Op(SPARCArithmetic opcode, AllocatableValue result,
-                AllocatableValue x) {
+        @Opcode private final SPARCArithmetic opcode;
+        @Def({REG, HINT}) protected AllocatableValue result;
+        @Use({REG, STACK}) protected AllocatableValue x;
+
+        public Unary1Op(SPARCArithmetic opcode, AllocatableValue result, AllocatableValue x) {
             this.opcode = opcode;
             this.result = result;
             this.x = x;
@@ -113,12 +169,10 @@
     }
 
     public static class Op1Stack extends SPARCLIRInstruction {
-        @Opcode
-        private final SPARCArithmetic opcode;
-        @Def({ REG, HINT })
-        protected Value result;
-        @Use({ REG, STACK, CONST })
-        protected Value x;
+
+        @Opcode private final SPARCArithmetic opcode;
+        @Def({REG, HINT}) protected Value result;
+        @Use({REG, STACK, CONST}) protected Value x;
 
         public Op1Stack(SPARCArithmetic opcode, Value result, Value x) {
             this.opcode = opcode;
@@ -133,14 +187,11 @@
     }
 
     public static class Op2Stack extends SPARCLIRInstruction {
-        @Opcode
-        private final SPARCArithmetic opcode;
-        @Def({ REG, HINT })
-        protected Value result;
-        @Use({ REG, STACK, CONST })
-        protected Value x;
-        @Alive({ REG, STACK, CONST })
-        protected Value y;
+
+        @Opcode private final SPARCArithmetic opcode;
+        @Def({REG, HINT}) protected Value result;
+        @Use({REG, STACK, CONST}) protected Value x;
+        @Alive({REG, STACK, CONST}) protected Value y;
 
         public Op2Stack(SPARCArithmetic opcode, Value result, Value x, Value y) {
             this.opcode = opcode;
@@ -162,14 +213,11 @@
     }
 
     public static class Op2Reg extends SPARCLIRInstruction {
-        @Opcode
-        private final SPARCArithmetic opcode;
-        @Def({ REG, HINT })
-        protected Value result;
-        @Use({ REG, STACK, CONST })
-        protected Value x;
-        @Alive({ REG, CONST })
-        protected Value y;
+
+        @Opcode private final SPARCArithmetic opcode;
+        @Def({REG, HINT}) protected Value result;
+        @Use({REG, STACK, CONST}) protected Value x;
+        @Alive({REG, CONST}) protected Value y;
 
         public Op2Reg(SPARCArithmetic opcode, Value result, Value x, Value y) {
             this.opcode = opcode;
@@ -191,14 +239,11 @@
     }
 
     public static class ShiftOp extends SPARCLIRInstruction {
-        @Opcode
-        private final SPARCArithmetic opcode;
-        @Def({ REG, HINT })
-        protected Value result;
-        @Use({ REG, STACK, CONST })
-        protected Value x;
-        @Alive({ REG, CONST })
-        protected Value y;
+
+        @Opcode private final SPARCArithmetic opcode;
+        @Def({REG, HINT}) protected Value result;
+        @Use({REG, STACK, CONST}) protected Value x;
+        @Alive({REG, CONST}) protected Value y;
 
         public ShiftOp(SPARCArithmetic opcode, Value result, Value x, Value y) {
             this.opcode = opcode;
@@ -221,215 +266,194 @@
     }
 
     @SuppressWarnings("unused")
-    protected static void emit(SPARCAssembler masm, SPARCArithmetic opcode,
-            Value result) {
+    protected static void emit(SPARCAssembler masm, SPARCArithmetic opcode, Value result) {
         switch (opcode) {
-        case L2I:
-            new Sra(masm, asLongReg(result), 0, asIntReg(result));
-            break;
-        case I2C:
-            new Sll(masm, asIntReg(result), 16, asIntReg(result));
-            new Srl(masm, asIntReg(result), 16, asIntReg(result));
-            break;
-        default:
-            throw GraalInternalError.shouldNotReachHere("missing: " + opcode);
+            case L2I:
+                new Sra(masm, asLongReg(result), 0, asIntReg(result));
+                break;
+            case I2C:
+                new Sll(masm, asIntReg(result), 16, asIntReg(result));
+                new Srl(masm, asIntReg(result), 16, asIntReg(result));
+                break;
+            default:
+                throw GraalInternalError.shouldNotReachHere("missing: " + opcode);
         }
     }
 
     @SuppressWarnings("unused")
-    public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm,
-            SPARCArithmetic opcode, Value dst, Value src1, Value src2,
-            LIRFrameState info) {
+    public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm, SPARCArithmetic opcode, Value dst, Value src1, Value src2, LIRFrameState info) {
         int exceptionOffset = -1;
         if (isConstant(src1)) {
             switch (opcode) {
-            case ISUB:
-                assert is_simm13(tasm.asIntConst(src1));
-                new Add(masm, asIntReg(src2), -(tasm.asIntConst(src1)),
-                        asIntReg(dst));
-                break;
-            case IAND:
-                throw new InternalError("NYI");
-            case IDIV:
-                assert is_simm13(tasm.asIntConst(src1));
-                throw new InternalError("NYI");
-                // new Sdivx(masm, asIntReg(src1), asIntReg(src2),
-                // asIntReg(dst));
-            case FSUB:
-                throw new InternalError("NYI");
-            case FDIV:
-                throw new InternalError("NYI");
-            case DSUB:
-                throw new InternalError("NYI");
-            case DDIV:
-                throw new InternalError("NYI");
-            default:
-                throw GraalInternalError.shouldNotReachHere();
+                case ISUB:
+                    assert is_simm13(tasm.asIntConst(src1));
+                    new Add(masm, asIntReg(src2), -(tasm.asIntConst(src1)), asIntReg(dst));
+                    break;
+                case IAND:
+                    throw new InternalError("NYI");
+                case IDIV:
+                    assert is_simm13(tasm.asIntConst(src1));
+                    throw new InternalError("NYI");
+                    // new Sdivx(masm, asIntReg(src1), asIntReg(src2),
+                    // asIntReg(dst));
+                case FSUB:
+                    throw new InternalError("NYI");
+                case FDIV:
+                    throw new InternalError("NYI");
+                case DSUB:
+                    throw new InternalError("NYI");
+                case DDIV:
+                    throw new InternalError("NYI");
+                default:
+                    throw GraalInternalError.shouldNotReachHere();
             }
         } else if (isConstant(src2)) {
             switch (opcode) {
-            case IADD:
-                assert is_simm13(tasm.asIntConst(src2));
-                new Add(masm, asIntReg(src1), tasm.asIntConst(src2),
-                        asIntReg(dst));
-                break;
-            case ISUB:
-                assert is_simm13(tasm.asIntConst(src2));
-                new Sub(masm, asIntReg(src1), tasm.asIntConst(src2),
-                        asIntReg(dst));
-                break;
-            case IMUL:
-                assert is_simm13(tasm.asIntConst(src2));
-                new Mulx(masm, asIntReg(src1), tasm.asIntConst(src2),
-                        asIntReg(dst));
-                break;
-            case IAND:
-                assert is_simm13(tasm.asIntConst(src2));
-                new And(masm, asIntReg(src1), tasm.asIntConst(src2),
-                        asIntReg(dst));
-                break;
-            case ISHL:
-                assert is_simm13(tasm.asIntConst(src2));
-                new Sll(masm, asIntReg(src1), tasm.asIntConst(src2),
-                        asIntReg(dst));
-                break;
-            case ISHR:
-                assert is_simm13(tasm.asIntConst(src2));
-                new Srl(masm, asIntReg(src1), tasm.asIntConst(src2),
-                        asIntReg(dst));
-                break;
-            case IUSHR:
-                assert is_simm13(tasm.asIntConst(src2));
-                new Sra(masm, asIntReg(src1), tasm.asIntConst(src2),
-                        asIntReg(dst));
-                break;
-            case IXOR:
-                throw new InternalError("NYI");
-            case LXOR:
-                throw new InternalError("NYI");
-            case LUSHR:
-                throw new InternalError("NYI");
-            case FADD:
-                throw new InternalError("NYI");
-            case FMUL:
-                throw new InternalError("NYI");
-            case FDIV:
-                throw new InternalError("NYI");
-            case DADD:
-                throw new InternalError("NYI");
-            case DMUL:
-                throw new InternalError("NYI");
-            case DDIV:
-                throw new InternalError("NYI");
-            default:
-                throw GraalInternalError.shouldNotReachHere();
+                case IADD:
+                    assert is_simm13(tasm.asIntConst(src2));
+                    new Add(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst));
+                    break;
+                case ISUB:
+                    assert is_simm13(tasm.asIntConst(src2));
+                    new Sub(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst));
+                    break;
+                case IMUL:
+                    assert is_simm13(tasm.asIntConst(src2));
+                    new Mulx(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst));
+                    break;
+                case IAND:
+                    assert is_simm13(tasm.asIntConst(src2));
+                    new And(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst));
+                    break;
+                case ISHL:
+                    assert is_simm13(tasm.asIntConst(src2));
+                    new Sll(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst));
+                    break;
+                case ISHR:
+                    assert is_simm13(tasm.asIntConst(src2));
+                    new Srl(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst));
+                    break;
+                case IUSHR:
+                    assert is_simm13(tasm.asIntConst(src2));
+                    new Sra(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst));
+                    break;
+                case IXOR:
+                    throw new InternalError("NYI");
+                case LXOR:
+                    throw new InternalError("NYI");
+                case LUSHR:
+                    throw new InternalError("NYI");
+                case FADD:
+                    throw new InternalError("NYI");
+                case FMUL:
+                    throw new InternalError("NYI");
+                case FDIV:
+                    throw new InternalError("NYI");
+                case DADD:
+                    throw new InternalError("NYI");
+                case DMUL:
+                    throw new InternalError("NYI");
+                case DDIV:
+                    throw new InternalError("NYI");
+                default:
+                    throw GraalInternalError.shouldNotReachHere();
             }
         } else {
             switch (opcode) {
-            case IADD:
-                new Add(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case ISUB:
-                new Sub(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case IMUL:
-                new Mulx(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case IDIV:
-                new Sdivx(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case IAND:
-                new And(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case IOR:
-                new Or(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case IXOR:
-                new Xor(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case ISHL:
-                new Sll(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case ISHR:
-                new Srl(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case IUSHR:
-                new Sra(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
-                break;
-            case IREM:
-                throw new InternalError("NYI");
-            case LADD:
-                new Add(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
-                break;
-            case LSUB:
-                new Sub(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
-                break;
-            case LMUL:
-                new Mulx(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
-                break;
-            case LDIV:
-                new Sdivx(masm, asLongReg(src1), asLongReg(src2),
-                        asLongReg(dst));
-                break;
-            case LAND:
-                new And(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
-                break;
-            case LOR:
-                new Or(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
-                break;
-            case LXOR:
-                new Xor(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
-                break;
-            case LSHL:
-                new Sll(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
-                break;
-            case LSHR:
-                new Srl(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
-                break;
-            case LUSHR:
-                new Sra(masm, asLongReg(src1), asLongReg(src2), asIntReg(dst));
-                break;
-            case LREM:
-                throw new InternalError("NYI");
-            case FADD:
-                new Fadds(masm, asFloatReg(src1), asFloatReg(src2),
-                        asFloatReg(dst));
-                break;
-            case FSUB:
-                new Fsubs(masm, asFloatReg(src1), asFloatReg(src2),
-                        asFloatReg(dst));
-                break;
-            case FMUL:
-                new Fmuls(masm, asFloatReg(src1), asFloatReg(src2),
-                        asFloatReg(dst));
-                break;
-            case FDIV:
-                new Fdivs(masm, asFloatReg(src1), asFloatReg(src2),
-                        asFloatReg(dst));
-                break;
-            case FREM:
-                throw new InternalError("NYI");
-            case DADD:
-                new Faddd(masm, asDoubleReg(src1), asDoubleReg(src2),
-                        asDoubleReg(dst));
-                break;
-            case DSUB:
-                new Fsubd(masm, asDoubleReg(src1), asDoubleReg(src2),
-                        asDoubleReg(dst));
-                break;
-            case DMUL:
-                new Fmuld(masm, asDoubleReg(src1), asDoubleReg(src2),
-                        asDoubleReg(dst));
-                break;
-            case DDIV:
-                new Fdivd(masm, asDoubleReg(src1), asDoubleReg(src2),
-                        asDoubleReg(dst));
-                break;
-            case DREM:
-                throw new InternalError("NYI");
-            default:
-                throw GraalInternalError.shouldNotReachHere("missing: "
-                        + opcode);
+                case IADD:
+                    new Add(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case ISUB:
+                    new Sub(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case IMUL:
+                    new Mulx(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case IDIV:
+                    new Sdivx(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case IAND:
+                    new And(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case IOR:
+                    new Or(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case IXOR:
+                    new Xor(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case ISHL:
+                    new Sll(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case ISHR:
+                    new Srl(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case IUSHR:
+                    new Sra(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst));
+                    break;
+                case IREM:
+                    throw new InternalError("NYI");
+                case LADD:
+                    new Add(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LSUB:
+                    new Sub(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LMUL:
+                    new Mulx(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LDIV:
+                    new Sdivx(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LAND:
+                    new And(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LOR:
+                    new Or(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LXOR:
+                    new Xor(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LSHL:
+                    new Sll(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LSHR:
+                    new Srl(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst));
+                    break;
+                case LUSHR:
+                    new Sra(masm, asLongReg(src1), asLongReg(src2), asIntReg(dst));
+                    break;
+                case LREM:
+                    throw new InternalError("NYI");
+                case FADD:
+                    new Fadds(masm, asFloatReg(src1), asFloatReg(src2), asFloatReg(dst));
+                    break;
+                case FSUB:
+                    new Fsubs(masm, asFloatReg(src1), asFloatReg(src2), asFloatReg(dst));
+                    break;
+                case FMUL:
+                    new Fmuls(masm, asFloatReg(src1), asFloatReg(src2), asFloatReg(dst));
+                    break;
+                case FDIV:
+                    new Fdivs(masm, asFloatReg(src1), asFloatReg(src2), asFloatReg(dst));
+                    break;
+                case FREM:
+                    throw new InternalError("NYI");
+                case DADD:
+                    new Faddd(masm, asDoubleReg(src1), asDoubleReg(src2), asDoubleReg(dst));
+                    break;
+                case DSUB:
+                    new Fsubd(masm, asDoubleReg(src1), asDoubleReg(src2), asDoubleReg(dst));
+                    break;
+                case DMUL:
+                    new Fmuld(masm, asDoubleReg(src1), asDoubleReg(src2), asDoubleReg(dst));
+                    break;
+                case DDIV:
+                    new Fdivd(masm, asDoubleReg(src1), asDoubleReg(src2), asDoubleReg(dst));
+                    break;
+                case DREM:
+                    throw new InternalError("NYI");
+                default:
+                    throw GraalInternalError.shouldNotReachHere("missing: " + opcode);
             }
         }
 
@@ -440,45 +464,41 @@
     }
 
     @SuppressWarnings("unused")
-    public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm,
-            SPARCArithmetic opcode, Value dst, Value src, LIRFrameState info) {
+    public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm, SPARCArithmetic opcode, Value dst, Value src, LIRFrameState info) {
         int exceptionOffset = -1;
         if (isRegister(src)) {
             switch (opcode) {
-            case I2L:
-                new Sra(masm, asIntReg(src), 0, asLongReg(dst));
-                break;
-            case I2B:
-                new Sll(masm, asIntReg(src), 24, asIntReg(src));
-                new Srl(masm, asIntReg(dst), 24, asIntReg(src));
-                break;
-            case I2F:
-                new Fstoi(masm, asIntReg(src), asFloatReg(dst));
-                break;
-            case I2D:
-                new Fdtoi(masm, asIntReg(src), asDoubleReg(dst));
-                break;
-            case FNEG:
-                new Fnegs(masm, asFloatReg(src), asFloatReg(dst));
-                break;
-            case DNEG:
-                new Fnegd(masm, asDoubleReg(src), asDoubleReg(dst));
-                break;
-            default:
-                throw GraalInternalError.shouldNotReachHere("missing: "
-                        + opcode);
+                case I2L:
+                    new Sra(masm, asIntReg(src), 0, asLongReg(dst));
+                    break;
+                case I2B:
+                    new Sll(masm, asIntReg(src), 24, asIntReg(src));
+                    new Srl(masm, asIntReg(dst), 24, asIntReg(src));
+                    break;
+                case I2F:
+                    new Fstoi(masm, asIntReg(src), asFloatReg(dst));
+                    break;
+                case I2D:
+                    new Fdtoi(masm, asIntReg(src), asDoubleReg(dst));
+                    break;
+                case FNEG:
+                    new Fnegs(masm, asFloatReg(src), asFloatReg(dst));
+                    break;
+                case DNEG:
+                    new Fnegd(masm, asDoubleReg(src), asDoubleReg(dst));
+                    break;
+                default:
+                    throw GraalInternalError.shouldNotReachHere("missing: " + opcode);
             }
         } else if (isConstant(src)) {
             switch (opcode) {
-            default:
-                throw GraalInternalError.shouldNotReachHere("missing: "
-                        + opcode);
+                default:
+                    throw GraalInternalError.shouldNotReachHere("missing: " + opcode);
             }
         } else {
             switch (opcode) {
-            default:
-                throw GraalInternalError.shouldNotReachHere("missing: "
-                        + opcode);
+                default:
+                    throw GraalInternalError.shouldNotReachHere("missing: " + opcode);
             }
         }
 
@@ -495,27 +515,12 @@
         return min13 <= src && src <= max13;
     }
 
-    private static void verifyKind(SPARCArithmetic opcode, Value result,
-                                   Value x, Value y) {
-        String name = opcode.name();
-        if (((name.startsWith("I") && result.getKind() == Kind.Int
-                && x.getKind().getStackKind() == Kind.Int
-                && y.getKind().getStackKind() == Kind.Int)
-                || (name.startsWith("L")
-                        && result.getKind() == Kind.Long
-                        && x.getKind() == Kind.Long
-                        && y.getKind() == Kind.Long)
-                || (name.startsWith("F")
-                        && result.getKind() == Kind.Float
-                        && x.getKind() == Kind.Float
-                        && y.getKind() == Kind.Float)
-                || (name.startsWith("D")
-                        && result.getKind() == Kind.Double
-                        && x.getKind() == Kind.Double
-                        && y.getKind() == Kind.Double)) == false) {
-            throw GraalInternalError.shouldNotReachHere("opcode: "
-                    + opcode.name() + " x: " + x.getKind() + " y: "
-                    + y.getKind());
+    private static void verifyKind(SPARCArithmetic opcode, Value result, Value x, Value y) {
+        if (((opcode.name().startsWith("I") && result.getKind() == Kind.Int && x.getKind().getStackKind() == Kind.Int && y.getKind().getStackKind() == Kind.Int) ||
+                        (opcode.name().startsWith("L") && result.getKind() == Kind.Long && x.getKind() == Kind.Long && y.getKind() == Kind.Long) ||
+                        (opcode.name().startsWith("F") && result.getKind() == Kind.Float && x.getKind() == Kind.Float && y.getKind() == Kind.Float) || (opcode.name().startsWith("D") &&
+                        result.getKind() == Kind.Double && x.getKind() == Kind.Double && y.getKind() == Kind.Double)) == false) {
+            throw GraalInternalError.shouldNotReachHere("opcode: " + opcode.name() + " x: " + x.getKind() + " y: " + y.getKind());
         }
     }
 }