# HG changeset patch # User Thomas Wuerthinger # Date 1305724495 -7200 # Node ID bd4c3be86fb723c496e3b794b4b42daeeb567694 # Parent c4201554beebca2342eda9b5e493e3fcc0f1166e Backend clean up. diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/graph/IR.java --- a/graal/GraalCompiler/src/com/sun/c1x/graph/IR.java Wed May 18 15:05:00 2011 +0200 +++ b/graal/GraalCompiler/src/com/sun/c1x/graph/IR.java Wed May 18 15:14:55 2011 +0200 @@ -89,7 +89,6 @@ private void buildGraph() { // Graph builder must set the startBlock and the osrEntryBlock new GraphBuilder(compilation, this, compilation.graph).build(); - assert startBlock != null; verifyAndPrint("After graph building"); if (C1XOptions.PrintCompilation) { diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/lir/LIRAssembler.java --- a/graal/GraalCompiler/src/com/sun/c1x/lir/LIRAssembler.java Wed May 18 15:05:00 2011 +0200 +++ b/graal/GraalCompiler/src/com/sun/c1x/lir/LIRAssembler.java Wed May 18 15:14:55 2011 +0200 @@ -290,18 +290,6 @@ switch (op.code) { case Label: throw Util.shouldNotReachHere(); - case OsrEntry: - emitOsrEntry(); - break; - case Here: - emitHere(op.result(), op.info, false); - break; - case Info: - emitHere(op.result(), op.info, true); - break; - case Pause: - emitPause(); - break; case Breakpoint: emitBreakpoint(); break; @@ -446,12 +434,8 @@ protected abstract void emitNegate(LIRNegate negate); - protected abstract void emitHere(CiValue dst, LIRDebugInfo info, boolean infoOnly); - protected abstract void emitMonitorAddress(int monitor, CiValue dst); - protected abstract void emitPause(); - protected abstract void emitStackAllocate(StackBlock src, CiValue dst); protected abstract void emitReturn(CiValue inOpr); @@ -504,8 +488,6 @@ protected abstract void emitMemoryBarriers(int barriers); - protected abstract void emitOsrEntry(); - protected abstract void reg2stack(CiValue src, CiValue dest, CiKind kind); protected abstract void reg2mem(CiValue src, CiValue dest, CiKind kind, LIRDebugInfo info, boolean unaligned); diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/lir/LIRList.java --- a/graal/GraalCompiler/src/com/sun/c1x/lir/LIRList.java Wed May 18 15:05:00 2011 +0200 +++ b/graal/GraalCompiler/src/com/sun/c1x/lir/LIRList.java Wed May 18 15:14:55 2011 +0200 @@ -101,10 +101,6 @@ append(new LIRMemoryBarrier(barriers)); } - public void osrEntry(CiValue osrPointer) { - append(new LIROp0(LIROpcode.OsrEntry, osrPointer)); - } - public void branchDestination(Label lbl) { append(new LIRLabel(lbl)); } @@ -155,14 +151,6 @@ append(new LIRMonitorAddress(dst, monitor)); } - public void infopoint(LIROpcode opcode, CiValue dst, LIRDebugInfo info) { - append(new LIROp0(opcode, dst, info)); - } - - public void alloca(StackBlock stackBlock, CiValue dst) { - append(new LIRStackAllocate(dst, stackBlock)); - } - public void convert(int code, CiValue left, CiValue dst, GlobalStub globalStub) { LIRConvert op = new LIRConvert(code, left, dst); op.globalStub = globalStub; @@ -303,10 +291,6 @@ append(new LIRCall(runtimeCallOp, rtCall, result, arguments, info, null, false, null)); } - public void pause() { - append(new LIROp0(LIROpcode.Pause)); - } - public void breakpoint() { append(new LIROp0(LIROpcode.Breakpoint)); } diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/lir/LIROpcode.java --- a/graal/GraalCompiler/src/com/sun/c1x/lir/LIROpcode.java Wed May 18 15:05:00 2011 +0200 +++ b/graal/GraalCompiler/src/com/sun/c1x/lir/LIROpcode.java Wed May 18 15:14:55 2011 +0200 @@ -33,12 +33,7 @@ // @formatter:off BeginOp0, Label, - OsrEntry, - Here, - Info, - Alloca, Breakpoint, - Pause, RuntimeCall, Membar, Branch, diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/lir/LIRStackAllocate.java --- a/graal/GraalCompiler/src/com/sun/c1x/lir/LIRStackAllocate.java Wed May 18 15:05:00 2011 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,51 +0,0 @@ -/* - * Copyright (c) 2010, 2010, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.sun.c1x.lir; - -import com.sun.c1x.lir.FrameMap.*; -import com.sun.cri.bytecode.*; -import com.sun.cri.ci.*; - -/** - * LIR instruction used in translating {@link Bytecodes#ALLOCA}. - * - * @author Doug Simon - */ -public class LIRStackAllocate extends LIRInstruction { - - public final StackBlock stackBlock; - - /** - * Creates an LIR instruction modelling a stack block allocation. - * @param result - */ - public LIRStackAllocate(CiValue result, StackBlock stackBlock) { - super(LIROpcode.Alloca, result, null, false); - this.stackBlock = stackBlock; - } - - @Override - public void emitCode(LIRAssembler masm) { - masm.emitStackAllocate(stackBlock, this.result()); - } -} diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64LIRAssembler.java --- a/graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64LIRAssembler.java Wed May 18 15:05:00 2011 +0200 +++ b/graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64LIRAssembler.java Wed May 18 15:14:55 2011 +0200 @@ -81,11 +81,6 @@ } @Override - protected void emitOsrEntry() { - throw Util.unimplemented(); - } - - @Override protected int initialFrameSizeInBytes() { return frameMap.frameSize(); } @@ -97,26 +92,12 @@ } @Override - protected void emitHere(CiValue dst, LIRDebugInfo info, boolean infoOnly) { - tasm.recordSafepoint(codePos(), info); - if (!infoOnly) { - masm.codeBuffer.putMark(); - masm.leaq(dst.asRegister(), new CiAddress(CiKind.Word, InstructionRelative.asValue(), 0)); - } - } - - @Override protected void emitMonitorAddress(int monitor, CiValue dst) { CiStackSlot slot = frameMap.toMonitorBaseStackAddress(monitor); masm.leaq(dst.asRegister(), new CiAddress(slot.kind, AMD64.rsp.asValue(), slot.index() * target.arch.wordSize)); } @Override - protected void emitPause() { - masm.pause(); - } - - @Override protected void emitBreakpoint() { masm.int3(); } @@ -1336,7 +1317,7 @@ } else if (left.kind.isDouble()) { masm.cmpsd2int(asXmmDoubleReg(left), asXmmDoubleReg(right), dst.asRegister(), code == LIROpcode.Ucmpfd2i); } else { - throw Util.unimplemented("no fpu stack"); + assert false : "no fpu stack"; } } else { assert code == LIROpcode.Cmpl2i; @@ -2062,7 +2043,7 @@ break; } default: - throw Util.unimplemented("XIR operation " + inst.op); + assert false : "Unknown XIR operation " + inst.op; } } } diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64LIRGenerator.java --- a/graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64LIRGenerator.java Wed May 18 15:05:00 2011 +0200 +++ b/graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64LIRGenerator.java Wed May 18 15:14:55 2011 +0200 @@ -437,7 +437,7 @@ CiValue reg = createResultVariable(x); lir.lcmp2int(left.result(), right.result(), reg); } else { - Util.unimplemented(); + assert false; } } diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64XirAssembler.java --- a/graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64XirAssembler.java Wed May 18 15:05:00 2011 +0200 +++ b/graal/GraalCompiler/src/com/sun/c1x/target/amd64/AMD64XirAssembler.java Wed May 18 15:14:55 2011 +0200 @@ -194,7 +194,7 @@ case ShouldNotReachHere: break; default: - throw Util.unimplemented("XIR operation " + i.op); + assert false : "Unknown XIR operation " + i.op; } if (!appended) { currentList.add(i); diff -r c4201554beeb -r bd4c3be86fb7 graal/GraalCompiler/src/com/sun/c1x/target/sparc/SPARC.java --- a/graal/GraalCompiler/src/com/sun/c1x/target/sparc/SPARC.java Wed May 18 15:05:00 2011 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,97 +0,0 @@ -/* - * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.sun.c1x.target.sparc; - -import static com.sun.cri.bytecode.Bytecodes.MemoryBarriers.*; -import static com.sun.cri.ci.CiRegister.RegisterFlag.*; - -import com.sun.cri.ci.*; - -/** - * Represents the SPARC architecture. - * - * @author Thomas Wuerthinger - */ -public class SPARC extends CiArchitecture { - - // General purpose CPU registers - public static final CiRegister g0 = new CiRegister(0, 0, 8, "g0", CPU); - public static final CiRegister g1 = new CiRegister(1, 1, 8, "g1", CPU); - public static final CiRegister g2 = new CiRegister(2, 2, 8, "g2", CPU); - public static final CiRegister g3 = new CiRegister(3, 3, 8, "g3", CPU); - public static final CiRegister g4 = new CiRegister(4, 4, 8, "g4", CPU); - public static final CiRegister g5 = new CiRegister(5, 5, 8, "g5", CPU); - public static final CiRegister g6 = new CiRegister(6, 6, 8, "g6", CPU); - public static final CiRegister g7 = new CiRegister(7, 7, 8, "g7", CPU); - - public static final CiRegister o0 = new CiRegister(8, 8, 8, "o0", CPU); - public static final CiRegister o1 = new CiRegister(9, 9, 8, "o1", CPU); - public static final CiRegister o2 = new CiRegister(10, 10, 8, "o2", CPU); - public static final CiRegister o3 = new CiRegister(11, 11, 8, "o3", CPU); - public static final CiRegister o4 = new CiRegister(12, 12, 8, "o4", CPU); - public static final CiRegister o5 = new CiRegister(13, 13, 8, "o5", CPU); - public static final CiRegister o6 = new CiRegister(14, 14, 8, "o6", CPU); - public static final CiRegister o7 = new CiRegister(15, 15, 8, "o7", CPU); - - public static final CiRegister l0 = new CiRegister(16, 16, 8, "l0", CPU); - public static final CiRegister l1 = new CiRegister(17, 17, 8, "l1", CPU); - public static final CiRegister l2 = new CiRegister(18, 18, 8, "l2", CPU); - public static final CiRegister l3 = new CiRegister(19, 19, 8, "l3", CPU); - public static final CiRegister l4 = new CiRegister(20, 20, 8, "l4", CPU); - public static final CiRegister l5 = new CiRegister(21, 21, 8, "l5", CPU); - public static final CiRegister l6 = new CiRegister(22, 22, 8, "l6", CPU); - public static final CiRegister l7 = new CiRegister(23, 23, 8, "l7", CPU); - - public static final CiRegister i0 = new CiRegister(24, 24, 8, "i0", CPU); - public static final CiRegister i1 = new CiRegister(25, 25, 8, "i1", CPU); - public static final CiRegister i2 = new CiRegister(26, 26, 8, "i2", CPU); - public static final CiRegister i3 = new CiRegister(27, 27, 8, "i3", CPU); - public static final CiRegister i4 = new CiRegister(28, 28, 8, "i4", CPU); - public static final CiRegister i5 = new CiRegister(29, 29, 8, "i5", CPU); - public static final CiRegister i6 = new CiRegister(30, 30, 8, "i6", CPU); - public static final CiRegister i7 = new CiRegister(31, 31, 8, "i7", CPU); - - public static final CiRegister[] cpuRegisters = { - g0, g1, g2, g3, g4, g5, g6, g7, - o0, o1, o2, o3, o4, o5, o6, o7, - l0, l1, l2, l3, l4, l5, l6, l7, - i0, i1, i2, i3, i4, i5, i6, i7 - }; - - protected SPARC(int wordSize, CiRegister[] registers) { - super("SPARC", - wordSize, - ByteOrder.BigEndian, - registers, - LOAD_LOAD | LOAD_STORE | STORE_STORE, - 0, - i7.encoding + 1, - 0); - } - - @Override - public boolean isSPARC() { - return true; - } - -}